prio/Paper/Paper.thy
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(*<*)
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theory Paper
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imports "../CpsG" "../ExtGG" "~~/src/HOL/Library/LaTeXsugar"
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begin
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(*
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find_unused_assms CpsG 
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find_unused_assms ExtGG 
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find_unused_assms Moment 
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find_unused_assms Precedence_ord 
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find_unused_assms PrioG 
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find_unused_assms PrioGDef
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*)
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ML {*
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  open Printer;
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  show_question_marks_default := false;
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  *}
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notation (latex output)
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  Cons ("_::_" [78,77] 73) and
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  vt ("valid'_state") and
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  runing ("running") and
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  birthtime ("last'_set") and
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  If  ("(\<^raw:\textrm{>if\<^raw:}> (_)/ \<^raw:\textrm{>then\<^raw:}> (_)/ \<^raw:\textrm{>else\<^raw:}> (_))" 10) and
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  Prc ("'(_, _')") and
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  holding ("holds") and
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  waiting ("waits") and
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  Th ("T") and
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  Cs ("C") and
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  readys ("ready") and
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  depend ("RAG") and 
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  preced ("prec") and
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  cpreced ("cprec") and
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  dependents ("dependants") and
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  cp ("cprec") and
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  holdents ("resources") and
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  original_priority ("priority") and
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  DUMMY  ("\<^raw:\mbox{$\_\!\_$}>")
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163cd8034e5b key lemma
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abbreviation
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 "detached s th \<equiv> cntP s th = cntV s th"
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(*>*)
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section {* Introduction *}
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text {*
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  Many real-time systems need to support threads involving priorities and
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  locking of resources. Locking of resources ensures mutual exclusion
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  when accessing shared data or devices that cannot be
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  preempted. Priorities allow scheduling of threads that need to
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  finish their work within deadlines.  Unfortunately, both features
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  can interact in subtle ways leading to a problem, called
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  \emph{Priority Inversion}. Suppose three threads having priorities
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  $H$(igh), $M$(edium) and $L$(ow). We would expect that the thread
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  $H$ blocks any other thread with lower priority and the thread itself cannot
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  be blocked indefinitely by any thread with lower priority. Alas, in a naive
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  implementation of resource locking and priorities this property can
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  be violated. Even worse, $H$ can be delayed indefinitely by
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  threads with lower priorities. For this let $L$ be in the
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  possession of a lock for a resource that $H$ also needs. $H$ must
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  therefore wait for $L$ to exit the critical section and release this
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  lock. The problem is that $L$ might in turn be blocked by any
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  thread with priority $M$, and so $H$ sits there potentially waiting
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  indefinitely. Since $H$ is blocked by threads with lower
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  priorities, the problem is called Priority Inversion. It was first
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  described in \cite{Lampson80} in the context of the
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  Mesa programming language designed for concurrent programming.
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  If the problem of Priority Inversion is ignored, real-time systems
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  can become unpredictable and resulting bugs can be hard to diagnose.
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  The classic example where this happened is the software that
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  controlled the Mars Pathfinder mission in 1997 \cite{Reeves98}.
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  Once the spacecraft landed, the software shut down at irregular
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  intervals leading to loss of project time as normal operation of the
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  craft could only resume the next day (the mission and data already
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  collected were fortunately not lost, because of a clever system
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  design).  The reason for the shutdowns was that the scheduling
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  software fell victim to Priority Inversion: a low priority thread
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  locking a resource prevented a high priority thread from running in
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  time, leading to a system reset. Once the problem was found, it was
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  rectified by enabling the \emph{Priority Inheritance Protocol} (PIP)
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  \cite{Sha90}\footnote{Sha et al.~call it the \emph{Basic Priority
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  Inheritance Protocol} \cite{Sha90} and others sometimes also call it
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  \emph{Priority Boosting}.} in the scheduling software.
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  The idea behind PIP is to let the thread $L$ temporarily inherit
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  the high priority from $H$ until $L$ leaves the critical section
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  unlocking the resource. This solves the problem of $H$ having to
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  wait indefinitely, because $L$ cannot be blocked by threads having
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  priority $M$. While a few other solutions exist for the Priority
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  Inversion problem, PIP is one that is widely deployed and
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  implemented. This includes VxWorks (a proprietary real-time OS used
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  in the Mars Pathfinder mission, in Boeing's 787 Dreamliner, Honda's
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  ASIMO robot, etc.), but also the POSIX 1003.1c Standard realised for
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  example in libraries for FreeBSD, Solaris and Linux. ({\bf Is this True?})
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  One advantage of PIP is that increasing the priority of a thread
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  can be dynamically calculated by the scheduler. This is in contrast
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  to, for example, \emph{Priority Ceiling} \cite{Sha90}, another
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  solution to the Priority Inversion problem, which requires static
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  analysis of the program in order to prevent Priority
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  Inversion. However, there has also been strong criticism against
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  PIP. For instance, PIP cannot prevent deadlocks when lock
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  dependencies are circular, and also blocking times can be
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  substantial (more than just the duration of a critical section).
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  Though, most criticism against PIP centres around unreliable
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  implementations and PIP being too complicated and too inefficient.
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  For example, Yodaiken writes in \cite{Yodaiken02}:
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  \begin{quote}
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  \it{}``Priority inheritance is neither efficient nor reliable. Implementations
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  are either incomplete (and unreliable) or surprisingly complex and intrusive.''
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  \end{quote}
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  \noindent
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  He suggests avoiding PIP altogether by not allowing critical
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  sections to be preempted. Unfortunately, this solution does not
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  help in real-time systems with hard deadlines for high-priority 
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  threads.
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  In our opinion, there is clearly a need for investigating correct
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  algorithms for PIP. A few specifications for PIP exist (in English)
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  and also a few high-level descriptions of implementations (e.g.~in
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  the textbook \cite[Section 5.6.5]{Vahalia96}), but they help little
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  with actual implementations. That this is a problem in practice is
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  proved by an email from Baker, who wrote on 13 July 2009 on the Linux
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  Kernel mailing list:
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  \begin{quote}
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  \it{}``I observed in the kernel code (to my disgust), the Linux PIP
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  implementation is a nightmare: extremely heavy weight, involving
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  maintenance of a full wait-for graph, and requiring updates for a
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  range of events, including priority changes and interruptions of
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  wait operations.''
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  \end{quote}
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  \noindent
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  The criticism by Yodaiken, Baker and others suggests another look
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  at PIP from a more abstract level (but still concrete enough
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  to inform an implementation), and makes PIP a good candidate for a
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  formal verification. An additional reason is that the original
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  presentation of PIP~\cite{Sha90}, despite being informally
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  ``proved'' correct, is actually \emph{flawed}. 
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  Yodaiken \cite{Yodaiken02} points to a subtlety that had been
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  overlooked in the informal proof by Sha et al. They specify in
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  \cite{Sha90} that after the thread (whose priority has been raised)
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  completes its critical section and releases the lock, it ``returns
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  to its original priority level.'' This leads them to believe that an
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  implementation of PIP is ``rather straightforward''~\cite{Sha90}.
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  Unfortunately, as Yodaiken points out, this behaviour is too
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  simplistic.  Consider the case where the low priority thread $L$
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  locks \emph{two} resources, and two high-priority threads $H$ and
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  $H'$ each wait for one of them.  If $L$ releases one resource
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  so that $H$, say, can proceed, then we still have Priority Inversion
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  with $H'$ (which waits for the other resource). The correct
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  behaviour for $L$ is to switch to the highest remaining priority of
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  the threads that it blocks. The advantage of formalising the
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  correctness of a high-level specification of PIP in a theorem prover
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  is that such issues clearly show up and cannot be overlooked as in
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  informal reasoning (since we have to analyse all possible behaviours
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  of threads, i.e.~\emph{traces}, that could possibly happen).\medskip
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  \noindent
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  {\bf Contributions:} There have been earlier formal investigations
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  into PIP \cite{Faria08,Jahier09,Wellings07}, but they employ model
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  checking techniques. This paper presents a formalised and
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  mechanically checked proof for the correctness of PIP (to our
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  knowledge the first one). 
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  In contrast to model checking, our
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  formalisation provides insight into why PIP is correct and allows us
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  to prove stronger properties that, as we will show, can inform an
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  efficient implementation.  For example, we found by ``playing'' with the formalisation
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  that the choice of the next thread to take over a lock when a
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  resource is released is irrelevant for PIP being correct---a fact
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  that has not been mentioned in the literature. This is important
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  for an efficient implementation, because we can give the lock to the
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  thread with the highest priority so that it terminates more quickly.
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*}
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section {* Formal Model of the Priority Inheritance Protocol *}
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text {*
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  The Priority Inheritance Protocol, short PIP, is a scheduling
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  algorithm for a single-processor system.\footnote{We shall come back
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  later to the case of PIP on multi-processor systems.} 
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  Following good experience in earlier work \cite{Wang09},  
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  our model of PIP is based on Paulson's inductive approach to protocol
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  verification \cite{Paulson98}. In this approach a \emph{state} of a system is
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  given by a list of events that happened so far (with new events prepended to the list). 
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  \emph{Events} of PIP fall
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  into five categories defined as the datatype:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{r@ {\hspace{2mm}}c@ {\hspace{2mm}}l@ {\hspace{7mm}}l}
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  \isacommand{datatype} event 
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  & @{text "="} & @{term "Create thread priority"}\\
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  & @{text "|"} & @{term "Exit thread"} \\
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  & @{text "|"} & @{term "Set thread priority"} & {\rm reset of the priority for} @{text thread}\\
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  & @{text "|"} & @{term "P thread cs"} & {\rm request of resource} @{text "cs"} {\rm by} @{text "thread"}\\
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  & @{text "|"} & @{term "V thread cs"} & {\rm release of resource} @{text "cs"} {\rm by} @{text "thread"}
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  whereby threads, priorities and (critical) resources are represented
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  as natural numbers. The event @{term Set} models the situation that
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  a thread obtains a new priority given by the programmer or
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  user (for example via the {\tt nice} utility under UNIX).  As in Paulson's work, we
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  need to define functions that allow us to make some observations
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  about states.  One, called @{term threads}, calculates the set of
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  ``live'' threads that we have seen so far:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) threads.simps(1)} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(1)}\\
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  @{thm (lhs) threads.simps(2)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(2)[where thread="th"]}\\
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  @{thm (lhs) threads.simps(3)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(3)[where thread="th"]}\\
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  @{term "threads (DUMMY#s)"} & @{text "\<equiv>"} & @{term "threads s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition @{term "DUMMY # DUMMY"} stands for list-cons.
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  Another function calculates the priority for a thread @{text "th"}, which is 
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  defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) original_priority.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(1)[where thread="th"]}\\
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  @{thm (lhs) original_priority.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) original_priority.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "original_priority th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "original_priority th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition we set @{text 0} as the default priority for
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  threads that have not (yet) been created. The last function we need 
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  calculates the ``time'', or index, at which time a process had its 
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  priority last set.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) birthtime.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(1)[where thread="th"]}\\
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  @{thm (lhs) birthtime.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) birthtime.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "birthtime th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "birthtime th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition @{term "length s"} stands for the length of the list
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  of events @{text s}. Again the default value in this function is @{text 0}
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  for threads that have not been created yet. A \emph{precedence} of a thread @{text th} in a 
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  state @{text s} is the pair of natural numbers defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm preced_def[where thread="th"]}
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  \end{isabelle}
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  \noindent
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  The point of precedences is to schedule threads not according to priorities (because what should
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  we do in case two threads have the same priority), but according to precedences. 
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  Precedences allow us to always discriminate between two threads with equal priority by 
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  taking into account the time when the priority was last set. We order precedences so 
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  that threads with the same priority get a higher precedence if their priority has been 
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  set earlier, since for such threads it is more urgent to finish their work. In an implementation
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  this choice would translate to a quite natural FIFO-scheduling of processes with 
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  the same priority.
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  Next, we introduce the concept of \emph{waiting queues}. They are
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  lists of threads associated with every resource. The first thread in
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  this list (i.e.~the head, or short @{term hd}) is chosen to be the one 
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  that is in possession of the
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  ``lock'' of the corresponding resource. We model waiting queues as
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  functions, below abbreviated as @{text wq}. They take a resource as
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  argument and return a list of threads.  This allows us to define
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  when a thread \emph{holds}, respectively \emph{waits} for, a
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  resource @{text cs} given a waiting queue function @{text wq}.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \begin{tabular}{@ {}l}
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  @{thm cs_holding_def[where thread="th"]}\\
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  @{thm cs_waiting_def[where thread="th"]}
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  \end{tabular}
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  \end{isabelle}
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  \noindent
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  In this definition we assume @{text "set"} converts a list into a set.
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  At the beginning, that is in the state where no thread is created yet, 
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  the waiting queue function will be the function that returns the
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  empty list for every resource.
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{abbrev all_unlocked}\hfill\numbered{allunlocked}
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  \end{isabelle}
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  \noindent
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  Using @{term "holding"} and @{term waiting}, we can introduce \emph{Resource Allocation Graphs} 
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  (RAG), which represent the dependencies between threads and resources.
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  We represent RAGs as relations using pairs of the form
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{term "(Th th, Cs cs)"} \hspace{5mm}{\rm and}\hspace{5mm}
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  @{term "(Cs cs, Th th)"}
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  \end{isabelle}
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  \noindent
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  where the first stands for a \emph{waiting edge} and the second for a 
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  \emph{holding edge} (@{term Cs} and @{term Th} are constructors of a 
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  datatype for vertices). Given a waiting queue function, a RAG is defined 
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  as the union of the sets of waiting and holding edges, namely
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cs_depend_def}
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  \end{isabelle}
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  \noindent
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  Given four threads and three resources, an instance of a RAG can be pictured 
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  as follows:
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  \begin{center}
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  \newcommand{\fnt}{\fontsize{7}{8}\selectfont}
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  \begin{tikzpicture}[scale=1]
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  %%\draw[step=2mm] (-3,2) grid (1,-1);
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  \node (A) at (0,0) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>0"}};
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  \node (B) at (2,0) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>1"}};
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  \node (C) at (4,0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>1"}};
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  \node (D) at (4,-0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>2"}};
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  \node (E) at (6,-0.7) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>2"}};
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  \node (E1) at (6, 0.2) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>3"}};
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  \node (F) at (8,-0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>3"}};
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  \draw [<-,line width=0.6mm] (A) to node [pos=0.54,sloped,above=-0.5mm] {\fnt{}holding}  (B);
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  \draw [->,line width=0.6mm] (C) to node [pos=0.4,sloped,above=-0.5mm] {\fnt{}waiting}  (B);
298
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  \draw [->,line width=0.6mm] (D) to node [pos=0.4,sloped,below=-0.5mm] {\fnt{}waiting}  (B);
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  \draw [<-,line width=0.6mm] (D) to node [pos=0.54,sloped,below=-0.5mm] {\fnt{}holding}  (E);
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  \draw [<-,line width=0.6mm] (D) to node [pos=0.54,sloped,above=-0.5mm] {\fnt{}holding}  (E1);
298
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  \draw [->,line width=0.6mm] (F) to node [pos=0.45,sloped,below=-0.5mm] {\fnt{}waiting}  (E);
291
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  \end{tikzpicture}
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  \end{center}
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  \noindent
296
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   356
  The use of relations for representing RAGs allows us to conveniently define
306
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   357
  the notion of the \emph{dependants} of a thread using the transitive closure
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   358
  operation for relations. This gives
290
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   359
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  \begin{isabelle}\ \ \ \ \ %%%
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   361
  @{thm cs_dependents_def}
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   362
  \end{isabelle}
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   363
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   364
  \noindent
296
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   365
  This definition needs to account for all threads that wait for a thread to
290
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   366
  release a resource. This means we need to include threads that transitively
298
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   367
  wait for a resource being released (in the picture above this means the dependants
306
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   368
  of @{text "th\<^isub>0"} are @{text "th\<^isub>1"} and @{text "th\<^isub>2"}, which wait for resource @{text "cs\<^isub>1"}, 
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   369
  but also @{text "th\<^isub>3"}, 
298
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   370
  which cannot make any progress unless @{text "th\<^isub>2"} makes progress, which
332
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   371
  in turn needs to wait for @{text "th\<^isub>0"} to finish). If there is a circle of dependencies 
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   372
  in a RAG, then clearly
291
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   373
  we have a deadlock. Therefore when a thread requests a resource,
342
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   374
  we must ensure that the resulting RAG is not circular. In practice, the 
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   375
  programmer has to ensure this.
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   376
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   377
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   378
  {\bf define detached}
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   379
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diff changeset
   380
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  Next we introduce the notion of the \emph{current precedence} of a thread @{text th} in a 
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   382
  state @{text s}. It is defined as
291
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   383
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   384
  \begin{isabelle}\ \ \ \ \ %%%
299
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   385
  @{thm cpreced_def2}\hfill\numbered{cpreced}
291
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   386
  \end{isabelle}
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diff changeset
   387
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   388
  \noindent
306
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   389
  where the dependants of @{text th} are given by the waiting queue function.
342
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diff changeset
   390
  While the precedence @{term prec} of a thread is determined statically 
293
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   391
  (for example when the thread is
306
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   392
  created), the point of the current precedence is to let the scheduler increase this
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diff changeset
   393
  precedence, if needed according to PIP. Therefore the current precedence of @{text th} is
291
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   394
  given as the maximum of the precedence @{text th} has in state @{text s} \emph{and} all 
306
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diff changeset
   395
  threads that are dependants of @{text th}. Since the notion @{term "dependants"} is
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   396
  defined as the transitive closure of all dependent threads, we deal correctly with the 
306
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diff changeset
   397
  problem in the informal algorithm by Sha et al.~\cite{Sha90} where a priority of a thread is
291
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diff changeset
   398
  lowered prematurely.
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   399
  
298
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   400
  The next function, called @{term schs}, defines the behaviour of the scheduler. It will be defined
306
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   401
  by recursion on the state (a list of events); this function returns a \emph{schedule state}, which 
298
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diff changeset
   402
  we represent as a record consisting of two
296
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   403
  functions:
293
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diff changeset
   404
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   405
  \begin{isabelle}\ \ \ \ \ %%%
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   406
  @{text "\<lparr>wq_fun, cprec_fun\<rparr>"}
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   407
  \end{isabelle}
291
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diff changeset
   408
294
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   409
  \noindent
314
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diff changeset
   410
  The first function is a waiting queue function (that is, it takes a
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   411
  resource @{text "cs"} and returns the corresponding list of threads
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   412
  that lock, respectively wait for, it); the second is a function that
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diff changeset
   413
  takes a thread and returns its current precedence (see
332
5faa1b59e870 one typo
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diff changeset
   414
  the definition in \eqref{cpreced}). We assume the usual getter and setter methods for
314
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diff changeset
   415
  such records.
294
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diff changeset
   416
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   417
  In the initial state, the scheduler starts with all resources unlocked (the corresponding 
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diff changeset
   418
  function is defined in \eqref{allunlocked}) and the
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   419
  current precedence of every thread is initialised with @{term "Prc 0 0"}; that means 
299
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   420
  \mbox{@{abbrev initial_cprec}}. Therefore
332
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   421
  we have for the initial shedule state
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   422
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   423
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   424
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   425
  @{thm (lhs) schs.simps(1)} @{text "\<equiv>"}\\ 
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   426
  \hspace{5mm}@{term "(|wq_fun = all_unlocked, cprec_fun = (\<lambda>_::thread. Prc 0 0)|)"}
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   427
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   428
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   429
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   430
  \noindent
296
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diff changeset
   431
  The cases for @{term Create}, @{term Exit} and @{term Set} are also straightforward:
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diff changeset
   432
  we calculate the waiting queue function of the (previous) state @{text s}; 
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   433
  this waiting queue function @{text wq} is unchanged in the next schedule state---because
306
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diff changeset
   434
  none of these events lock or release any resource; 
5113aa1ae69a some polishing
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diff changeset
   435
  for calculating the next @{term "cprec_fun"}, we use @{text wq} and 
298
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diff changeset
   436
  @{term cpreced}. This gives the following three clauses for @{term schs}:
290
6a6d0bd16035 more on paper
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diff changeset
   437
6a6d0bd16035 more on paper
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diff changeset
   438
  \begin{isabelle}\ \ \ \ \ %%%
291
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diff changeset
   439
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   440
  @{thm (lhs) schs.simps(2)} @{text "\<equiv>"}\\ 
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   441
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
298
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diff changeset
   442
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Create th prio # s)|)"}\smallskip\\
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   443
  @{thm (lhs) schs.simps(3)} @{text "\<equiv>"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   444
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   445
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Exit th # s)|)"}\smallskip\\
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   446
  @{thm (lhs) schs.simps(4)} @{text "\<equiv>"}\\ 
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   447
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   448
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Set th prio # s)|)"}
291
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diff changeset
   449
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   450
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   451
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   452
  \noindent 
306
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diff changeset
   453
  More interesting are the cases where a resource, say @{text cs}, is locked or released. In these cases
300
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diff changeset
   454
  we need to calculate a new waiting queue function. For the event @{term "P th cs"}, we have to update
306
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diff changeset
   455
  the function so that the new thread list for @{text cs} is the old thread list plus the thread @{text th} 
314
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diff changeset
   456
  appended to the end of that list (remember the head of this list is assigned to be in the possession of this
306
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diff changeset
   457
  resource). This gives the clause
291
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diff changeset
   458
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   459
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   460
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   461
  @{thm (lhs) schs.simps(5)} @{text "\<equiv>"}\\ 
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   462
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   463
  \hspace{5mm}@{text "let"} @{text "new_wq = wq(cs := (wq cs @ [th]))"} @{text "in"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   464
  \hspace{8mm}@{term "(|wq_fun = new_wq, cprec_fun = cpreced new_wq (P th cs # s)|)"}
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   465
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   466
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   467
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   468
  \noindent
300
8524f94d251b correct RAG
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diff changeset
   469
  The clause for event @{term "V th cs"} is similar, except that we need to update the waiting queue function
301
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diff changeset
   470
  so that the thread that possessed the lock is deleted from the corresponding thread list. For this 
urbanc
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diff changeset
   471
  list transformation, we use
296
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diff changeset
   472
  the auxiliary function @{term release}. A simple version of @{term release} would
306
5113aa1ae69a some polishing
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diff changeset
   473
  just delete this thread and return the remaining threads, namely
291
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diff changeset
   474
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   475
  \begin{isabelle}\ \ \ \ \ %%%
296
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diff changeset
   476
  \begin{tabular}{@ {}lcl}
2c8dcf010567 spell check; release
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diff changeset
   477
  @{term "release []"} & @{text "\<equiv>"} & @{term "[]"}\\
2c8dcf010567 spell check; release
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diff changeset
   478
  @{term "release (DUMMY # qs)"} & @{text "\<equiv>"} & @{term "qs"}\\
2c8dcf010567 spell check; release
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diff changeset
   479
  \end{tabular}
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   480
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   481
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   482
  \noindent
300
8524f94d251b correct RAG
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diff changeset
   483
  In practice, however, often the thread with the highest precedence in the list will get the
296
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diff changeset
   484
  lock next. We have implemented this choice, but later found out that the choice 
300
8524f94d251b correct RAG
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diff changeset
   485
  of which thread is chosen next is actually irrelevant for the correctness of PIP.
296
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diff changeset
   486
  Therefore we prove the stronger result where @{term release} is defined as
2c8dcf010567 spell check; release
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diff changeset
   487
2c8dcf010567 spell check; release
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parents: 294
diff changeset
   488
  \begin{isabelle}\ \ \ \ \ %%%
2c8dcf010567 spell check; release
urbanc
parents: 294
diff changeset
   489
  \begin{tabular}{@ {}lcl}
2c8dcf010567 spell check; release
urbanc
parents: 294
diff changeset
   490
  @{term "release []"} & @{text "\<equiv>"} & @{term "[]"}\\
2c8dcf010567 spell check; release
urbanc
parents: 294
diff changeset
   491
  @{term "release (DUMMY # qs)"} & @{text "\<equiv>"} & @{term "SOME qs'. distinct qs' \<and> set qs' = set qs"}\\
2c8dcf010567 spell check; release
urbanc
parents: 294
diff changeset
   492
  \end{tabular}
2c8dcf010567 spell check; release
urbanc
parents: 294
diff changeset
   493
  \end{isabelle}
2c8dcf010567 spell check; release
urbanc
parents: 294
diff changeset
   494
2c8dcf010567 spell check; release
urbanc
parents: 294
diff changeset
   495
  \noindent
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   496
  where @{text "SOME"} stands for Hilbert's epsilon and implements an arbitrary
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   497
  choice for the next waiting list. It just has to be a list of distinctive threads and
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   498
  contain the same elements as @{text "qs"}. This gives for @{term V} the clause:
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   499
 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   500
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   501
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   502
  @{thm (lhs) schs.simps(6)} @{text "\<equiv>"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
urbanc
parents: 293
diff changeset
   503
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   504
  \hspace{5mm}@{text "let"} @{text "new_wq = release (wq cs)"} @{text "in"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
urbanc
parents: 293
diff changeset
   505
  \hspace{8mm}@{term "(|wq_fun = new_wq, cprec_fun = cpreced new_wq (V th cs # s)|)"}
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   506
  \end{tabular}
290
6a6d0bd16035 more on paper
urbanc
parents: 287
diff changeset
   507
  \end{isabelle}
6a6d0bd16035 more on paper
urbanc
parents: 287
diff changeset
   508
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   509
  Having the scheduler function @{term schs} at our disposal, we can ``lift'', or
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   510
  overload, the notions
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   511
  @{term waiting}, @{term holding}, @{term depend} and @{term cp} to operate on states only.
286
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   512
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   513
  \begin{isabelle}\ \ \ \ \ %%%
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   514
  \begin{tabular}{@ {}rcl}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   515
  @{thm (lhs) s_holding_abv} & @{text "\<equiv>"} & @{thm (rhs) s_holding_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   516
  @{thm (lhs) s_waiting_abv} & @{text "\<equiv>"} & @{thm (rhs) s_waiting_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   517
  @{thm (lhs) s_depend_abv}  & @{text "\<equiv>"} & @{thm (rhs) s_depend_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   518
  @{thm (lhs) cp_def}        & @{text "\<equiv>"} & @{thm (rhs) cp_def}
287
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   519
  \end{tabular}
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   520
  \end{isabelle}
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   521
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   522
  \noindent
335
urbanc
parents: 333
diff changeset
   523
  With these abbreviations in place we can introduce 
339
b3add51e2e0f added some of the comments of the reviewers and made it compile with current Isabelle
urbanc
parents: 337
diff changeset
   524
  the notion of a thread being @{term ready} in a state (i.e.~threads
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   525
  that do not wait for any resource) and the running thread.
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   526
287
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   527
  \begin{isabelle}\ \ \ \ \ %%%
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   528
  \begin{tabular}{@ {}l}
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   529
  @{thm readys_def}\\
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   530
  @{thm runing_def}\\
286
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   531
  \end{tabular}
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   532
  \end{isabelle}
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   533
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   534
  \noindent
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   535
  In the second definition @{term "DUMMY ` DUMMY"} stands for the image of a set under a function.
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   536
  Note that in the initial state, that is where the list of events is empty, the set 
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   537
  @{term threads} is empty and therefore there is neither a thread ready nor running.
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   538
  If there is one or more threads ready, then there can only be \emph{one} thread
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   539
  running, namely the one whose current precedence is equal to the maximum of all ready 
314
ccb6c0601614 some parts of the conclusion
urbanc
parents: 313
diff changeset
   540
  threads. We use sets to capture both possibilities.
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   541
  We can now also conveniently define the set of resources that are locked by a thread in a
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   542
  given state.
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   543
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   544
  \begin{isabelle}\ \ \ \ \ %%%
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   545
  @{thm holdents_def}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   546
  \end{isabelle}
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   547
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   548
  Finally we can define what a \emph{valid state} is in our model of PIP. For
304
bd05c5011c0f contribution section
urbanc
parents: 301
diff changeset
   549
  example we cannot expect to be able to exit a thread, if it was not
339
b3add51e2e0f added some of the comments of the reviewers and made it compile with current Isabelle
urbanc
parents: 337
diff changeset
   550
  created yet. 
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   551
  These validity constraints on states are characterised by the
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   552
  inductive predicate @{term "step"} and @{term vt}. We first give five inference rules
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   553
  for @{term step} relating a state and an event that can happen next.
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   554
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   555
  \begin{center}
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   556
  \begin{tabular}{c}
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   557
  @{thm[mode=Rule] thread_create[where thread=th]}\hspace{1cm}
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   558
  @{thm[mode=Rule] thread_exit[where thread=th]}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   559
  \end{tabular}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   560
  \end{center}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   561
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   562
  \noindent
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   563
  The first rule states that a thread can only be created, if it is not alive yet.
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   564
  Similarly, the second rule states that a thread can only be terminated if it was
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   565
  running and does not lock any resources anymore (this simplifies slightly our model;
314
ccb6c0601614 some parts of the conclusion
urbanc
parents: 313
diff changeset
   566
  in practice we would expect the operating system releases all locks held by a
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   567
  thread that is about to exit). The event @{text Set} can happen
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   568
  if the corresponding thread is running. 
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   569
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   570
  \begin{center}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   571
  @{thm[mode=Rule] thread_set[where thread=th]}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   572
  \end{center}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   573
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   574
  \noindent
301
urbanc
parents: 300
diff changeset
   575
  If a thread wants to lock a resource, then the thread needs to be
urbanc
parents: 300
diff changeset
   576
  running and also we have to make sure that the resource lock does
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
   577
  not lead to a cycle in the RAG. In practice, ensuring the latter
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
   578
  is the responsibility of the programmer.  In our formal
314
ccb6c0601614 some parts of the conclusion
urbanc
parents: 313
diff changeset
   579
  model we brush aside these problematic cases in order to be able to make
301
urbanc
parents: 300
diff changeset
   580
  some meaningful statements about PIP.\footnote{This situation is
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   581
  similar to the infamous \emph{occurs check} in Prolog: In order to say
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   582
  anything meaningful about unification, one needs to perform an occurs
331
c5442db6a5cb changes by Xingyuan
urbanc
parents: 329
diff changeset
   583
  check. But in practice the occurs check is omitted and the
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   584
  responsibility for avoiding problems rests with the programmer.}
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
   585
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   586
 
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   587
  \begin{center}
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   588
  @{thm[mode=Rule] thread_P[where thread=th]}
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   589
  \end{center}
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   590
 
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   591
  \noindent
301
urbanc
parents: 300
diff changeset
   592
  Similarly, if a thread wants to release a lock on a resource, then
urbanc
parents: 300
diff changeset
   593
  it must be running and in the possession of that lock. This is
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   594
  formally given by the last inference rule of @{term step}.
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   595
 
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   596
  \begin{center}
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   597
  @{thm[mode=Rule] thread_V[where thread=th]}
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   598
  \end{center}
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   599
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   600
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   601
  A valid state of PIP can then be conveniently be defined as follows:
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   602
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   603
  \begin{center}
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   604
  \begin{tabular}{c}
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   605
  @{thm[mode=Axiom] vt_nil}\hspace{1cm}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   606
  @{thm[mode=Rule] vt_cons}
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   607
  \end{tabular}
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   608
  \end{center}
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   609
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   610
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   611
  This completes our formal model of PIP. In the next section we present
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   612
  properties that show our model of PIP is correct.
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   613
*}
274
83b0317370c2 more on intro
urbanc
parents: 273
diff changeset
   614
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   615
section {* The Correctness Proof *}
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   616
301
urbanc
parents: 300
diff changeset
   617
(*<*)
urbanc
parents: 300
diff changeset
   618
context extend_highest_gen
urbanc
parents: 300
diff changeset
   619
begin
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   620
(*>*)
301
urbanc
parents: 300
diff changeset
   621
text {* 
329
urbanc
parents: 328
diff changeset
   622
  Sha et al.~state their first correctness criterion for PIP in terms
urbanc
parents: 328
diff changeset
   623
  of the number of low-priority threads \cite[Theorem 3]{Sha90}: if
urbanc
parents: 328
diff changeset
   624
  there are @{text n} low-priority threads, then a blocked job with
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   625
  high priority can only be blocked a maximum of @{text n} times.
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   626
  Their second correctness criterion is given
329
urbanc
parents: 328
diff changeset
   627
  in terms of the number of critical resources \cite[Theorem 6]{Sha90}: if there are
322
c37b387110d0 1st paragraph
urbanc
parents: 321
diff changeset
   628
  @{text m} critical resources, then a blocked job with high priority
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   629
  can only be blocked a maximum of @{text m} times. Both results on their own, strictly speaking, do
324
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   630
  \emph{not} prevent indefinite, or unbounded, Priority Inversion,
329
urbanc
parents: 328
diff changeset
   631
  because if a low-priority thread does not give up its critical
324
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   632
  resource (the one the high-priority thread is waiting for), then the
322
c37b387110d0 1st paragraph
urbanc
parents: 321
diff changeset
   633
  high-priority thread can never run.  The argument of Sha et al.~is
c37b387110d0 1st paragraph
urbanc
parents: 321
diff changeset
   634
  that \emph{if} threads release locked resources in a finite amount
324
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   635
  of time, then indefinite Priority Inversion cannot occur---the high-priority
322
c37b387110d0 1st paragraph
urbanc
parents: 321
diff changeset
   636
  thread is guaranteed to run eventually. The assumption is that
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   637
  programmers must ensure that threads are programmed in this way.  However, even
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   638
  taking this assumption into account, the correctness properties of
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   639
  Sha et al.~are
339
b3add51e2e0f added some of the comments of the reviewers and made it compile with current Isabelle
urbanc
parents: 337
diff changeset
   640
  \emph{not} true for their version of PIP---despite being ``proved''. As Yodaiken
324
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   641
  \cite{Yodaiken02} pointed out: If a low-priority thread possesses
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   642
  locks to two resources for which two high-priority threads are
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   643
  waiting for, then lowering the priority prematurely after giving up
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   644
  only one lock, can cause indefinite Priority Inversion for one of the
329
urbanc
parents: 328
diff changeset
   645
  high-priority threads, invalidating their two bounds.
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   646
323
eee031cc9634 1st paragraph
urbanc
parents: 322
diff changeset
   647
  Even when fixed, their proof idea does not seem to go through for
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   648
  us, because of the way we have set up our formal model of PIP.  One
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
   649
  reason is that we allow critical sections, which start with a @{text P}-event
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
   650
  and finish with a corresponding @{text V}-event, to arbitrarily overlap
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   651
  (something Sha et al.~explicitly exclude).  Therefore we have
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   652
  designed a different correctness criterion for PIP. The idea behind
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   653
  our criterion is as follows: for all states @{text s}, we know the
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   654
  corresponding thread @{text th} with the highest precedence; we show
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   655
  that in every future state (denoted by @{text "s' @ s"}) in which
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   656
  @{text th} is still alive, either @{text th} is running or it is
335
urbanc
parents: 333
diff changeset
   657
  blocked by a thread that was alive in the state @{text s} and was waiting 
337
urbanc
parents: 336
diff changeset
   658
  for or in the possession of a lock in @{text s}. Since in @{text s}, as in
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   659
  every state, the set of alive threads is finite, @{text th} can only
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   660
  be blocked a finite number of times. This is independent of how many
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   661
  threads of lower priority are created in @{text "s'"}. We will actually prove a
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   662
  stronger statement where we also provide the current precedence of
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   663
  the blocking thread. However, this correctness criterion hinges upon
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   664
  a number of assumptions about the states @{text s} and @{text "s' @
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   665
  s"}, the thread @{text th} and the events happening in @{text
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   666
  s'}. We list them next:
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   667
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   668
  \begin{quote}
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   669
  {\bf Assumptions on the states {\boldmath@{text s}} and 
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
   670
  {\boldmath@{text "s' @ s"}:}} We need to require that @{text "s"} and 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
   671
  @{text "s' @ s"} are valid states:
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   672
  \begin{isabelle}\ \ \ \ \ %%%
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   673
  \begin{tabular}{l}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   674
  @{term "vt s"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   675
  @{term "vt (s' @ s)"} 
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   676
  \end{tabular}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   677
  \end{isabelle}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   678
  \end{quote}
301
urbanc
parents: 300
diff changeset
   679
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   680
  \begin{quote}
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   681
  {\bf Assumptions on the thread {\boldmath@{text "th"}:}} 
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   682
  The thread @{text th} must be alive in @{text s} and 
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   683
  has the highest precedence of all alive threads in @{text s}. Furthermore the
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   684
  priority of @{text th} is @{text prio} (we need this in the next assumptions).
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   685
  \begin{isabelle}\ \ \ \ \ %%%
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   686
  \begin{tabular}{l}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   687
  @{term "th \<in> threads s"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   688
  @{term "prec th s = Max (cprec s ` threads s)"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   689
  @{term "prec th s = (prio, DUMMY)"}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   690
  \end{tabular}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   691
  \end{isabelle}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   692
  \end{quote}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   693
  
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   694
  \begin{quote}
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   695
  {\bf Assumptions on the events in {\boldmath@{text "s'"}:}} We want to prove that @{text th} cannot
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   696
  be blocked indefinitely. Of course this can happen if threads with higher priority
331
c5442db6a5cb changes by Xingyuan
urbanc
parents: 329
diff changeset
   697
  than @{text th} are continuously created in @{text s'}. Therefore we have to assume that  
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   698
  events in @{text s'} can only create (respectively set) threads with equal or lower 
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   699
  priority than @{text prio} of @{text th}. We also need to assume that the
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   700
  priority of @{text "th"} does not get reset and also that @{text th} does
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   701
  not get ``exited'' in @{text "s'"}. This can be ensured by assuming the following three implications. 
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   702
  \begin{isabelle}\ \ \ \ \ %%%
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   703
  \begin{tabular}{l}
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   704
  {If}~~@{text "Create th' prio' \<in> set s'"}~~{then}~~@{text "prio' \<le> prio"}\\
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   705
  {If}~~@{text "Set th' prio' \<in> set s'"}~~{then}~~@{text "th' \<noteq> th"}~~{and}~~@{text "prio' \<le> prio"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   706
  {If}~~@{text "Exit th' \<in> set s'"}~~{then}~~@{text "th' \<noteq> th"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   707
  \end{tabular}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   708
  \end{isabelle}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   709
  \end{quote}
301
urbanc
parents: 300
diff changeset
   710
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   711
  \noindent
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   712
  The locale mechanism of Isabelle helps us to manage conveniently such assumptions~\cite{Haftmann08}.
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   713
  Under these assumptions we shall prove the following correctness property:
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   714
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   715
  \begin{theorem}\label{mainthm}
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   716
  Given the assumptions about states @{text "s"} and @{text "s' @ s"},
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   717
  the thread @{text th} and the events in @{text "s'"},
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   718
  if @{term "th' \<in> running (s' @ s)"} and @{text "th' \<noteq> th"} then
329
urbanc
parents: 328
diff changeset
   719
  @{text "th' \<in> threads s"}, @{text "\<not> detached s th'"} and 
urbanc
parents: 328
diff changeset
   720
  @{term "cp (s' @ s) th' = prec th s"}.
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   721
  \end{theorem}
301
urbanc
parents: 300
diff changeset
   722
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   723
  \noindent
324
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   724
  This theorem ensures that the thread @{text th}, which has the
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   725
  highest precedence in the state @{text s}, can only be blocked in
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   726
  the state @{text "s' @ s"} by a thread @{text th'} that already
329
urbanc
parents: 328
diff changeset
   727
  existed in @{text s} and requested or had a lock on at least 
urbanc
parents: 328
diff changeset
   728
  one resource---that means the thread was not \emph{detached} in @{text s}. 
urbanc
parents: 328
diff changeset
   729
  As we shall see shortly, that means there are only finitely 
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   730
  many threads that can block @{text th} in this way and then they 
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   731
  need to run with the same current precedence as @{text th}.
329
urbanc
parents: 328
diff changeset
   732
urbanc
parents: 328
diff changeset
   733
  Like in the argument by Sha et al.~our
324
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   734
  finite bound does not guarantee absence of indefinite Priority
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   735
  Inversion. For this we further have to assume that every thread
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   736
  gives up its resources after a finite amount of time. We found that
324
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   737
  this assumption is awkward to formalise in our model. Therefore we
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   738
  leave it out and let the programmer assume the responsibility to
331
c5442db6a5cb changes by Xingyuan
urbanc
parents: 329
diff changeset
   739
  program threads in such a benign manner (in addition to causing no 
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   740
  circularity in the @{text RAG}). In this detail, we do not
324
41e4b331ce08 fixed 1st paragraph
urbanc
parents: 323
diff changeset
   741
  make any progress in comparison with the work by Sha et al.
329
urbanc
parents: 328
diff changeset
   742
  However, we are able to combine their two separate bounds into a
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   743
  single theorem improving their bound.
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   744
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   745
  In what follows we will describe properties of PIP that allow us to prove 
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   746
  Theorem~\ref{mainthm} and, when instructive, briefly describe our argument. 
339
b3add51e2e0f added some of the comments of the reviewers and made it compile with current Isabelle
urbanc
parents: 337
diff changeset
   747
  It is relatively easy to see that
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   748
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   749
  \begin{isabelle}\ \ \ \ \ %%%
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   750
  \begin{tabular}{@ {}l}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   751
  @{text "running s \<subseteq> ready s \<subseteq> threads s"}\\
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   752
  @{thm[mode=IfThen]  finite_threads}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   753
  \end{tabular}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   754
  \end{isabelle}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   755
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   756
  \noindent
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   757
  The second property is by induction of @{term vt}. The next three
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   758
  properties are 
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   759
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   760
  \begin{isabelle}\ \ \ \ \ %%%
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   761
  \begin{tabular}{@ {}l}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   762
  @{thm[mode=IfThen] waiting_unique[of _ _ "cs\<^isub>1" "cs\<^isub>2"]}\\
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   763
  @{thm[mode=IfThen] held_unique[of _ "th\<^isub>1" _ "th\<^isub>2"]}\\
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   764
  @{thm[mode=IfThen] runing_unique[of _ "th\<^isub>1" "th\<^isub>2"]}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   765
  \end{tabular}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   766
  \end{isabelle}
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   767
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   768
  \noindent
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   769
  The first property states that every waiting thread can only wait for a single
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   770
  resource (because it gets suspended after requesting that resource); the second 
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   771
  that every resource can only be held by a single thread; 
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   772
  the third property establishes that in every given valid state, there is
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   773
  at most one running thread. We can also show the following properties 
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   774
  about the @{term RAG} in @{text "s"}.
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   775
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   776
  \begin{isabelle}\ \ \ \ \ %%%
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   777
  \begin{tabular}{@ {}l}
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   778
  @{text If}~@{thm (prem 1) acyclic_depend}~@{text "then"}:\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   779
  \hspace{5mm}@{thm (concl) acyclic_depend},
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   780
  @{thm (concl) finite_depend} and
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   781
  @{thm (concl) wf_dep_converse},\\
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   782
  \hspace{5mm}@{text "if"}~@{thm (prem 2) dm_depend_threads}~@{text "then"}~@{thm (concl) dm_depend_threads}
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   783
  and\\
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   784
  \hspace{5mm}@{text "if"}~@{thm (prem 2) range_in}~@{text "then"}~@{thm (concl) range_in}.
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   785
  \end{tabular}
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   786
  \end{isabelle}
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   787
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   788
  \noindent
339
b3add51e2e0f added some of the comments of the reviewers and made it compile with current Isabelle
urbanc
parents: 337
diff changeset
   789
  The acyclicity property follows from how we restricted the events in
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   790
  @{text step}; similarly the finiteness and well-foundedness property.
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   791
  The last two properties establish that every thread in a @{text "RAG"}
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   792
  (either holding or waiting for a resource) is a live thread.
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   793
329
urbanc
parents: 328
diff changeset
   794
  The key lemma in our proof of Theorem~\ref{mainthm} is as follows:
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   795
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   796
  \begin{lemma}\label{mainlem}
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   797
  Given the assumptions about states @{text "s"} and @{text "s' @ s"},
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   798
  the thread @{text th} and the events in @{text "s'"},
339
b3add51e2e0f added some of the comments of the reviewers and made it compile with current Isabelle
urbanc
parents: 337
diff changeset
   799
  if @{term "th' \<in> threads (s' @ s)"}, @{text "th' \<noteq> th"} and @{text "detached (s' @ s) th'"}\\
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   800
  then @{text "th' \<notin> running (s' @ s)"}.
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   801
  \end{lemma}
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   802
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   803
  \noindent
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   804
  The point of this lemma is that a thread different from @{text th} (which has the highest
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   805
  precedence in @{text s}) and not holding any resource, cannot be running 
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   806
  in the state @{text "s' @ s"}.
301
urbanc
parents: 300
diff changeset
   807
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   808
  \begin{proof}
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   809
  Since thread @{text "th'"} does not hold any resource, no thread can depend on it. 
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   810
  Therefore its current precedence @{term "cp (s' @ s) th'"} equals its own precedence
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   811
  @{term "prec th' (s' @ s)"}. Since @{text "th"} has the highest precedence in the 
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   812
  state @{text "(s' @ s)"} and precedences are distinct among threads, we have
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   813
  @{term "prec th' (s' @s ) < prec th (s' @ s)"}. From this 
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   814
  we have @{term "cp (s' @ s) th' < prec th (s' @ s)"}.
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   815
  Since @{text "prec th (s' @ s)"} is already the highest 
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   816
  @{term "cp (s' @ s) th"} can not be higher than this and can not be lower either (by 
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   817
  definition of @{term "cp"}). Consequently, we have @{term "prec th (s' @ s) = cp (s' @ s) th"}.
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   818
  Finally we have @{term "cp (s' @ s) th' < cp (s' @ s) th"}.
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   819
  By defintion of @{text "running"}, @{text "th'"} can not be running in state
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   820
  @{text "s' @ s"}, as we had to show.\qed
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   821
  \end{proof}
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   822
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   823
  \noindent
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   824
  Since @{text "th'"} is not able to run in state @{text "s' @ s"}, it is not able to 
328
urbanc
parents: 327
diff changeset
   825
  issue a @{text "P"} or @{text "V"} event. Therefore if @{text "s' @ s"} is extended
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   826
  one step further, @{text "th'"} still cannot hold any resource. The situation will 
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   827
  not change in further extensions as long as @{text "th"} holds the highest precedence.
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   828
329
urbanc
parents: 328
diff changeset
   829
  From this lemma we can deduce Theorem~\ref{mainthm}: that @{text th} can only be 
urbanc
parents: 328
diff changeset
   830
  blocked by a thread @{text th'} that
326
urbanc
parents: 325
diff changeset
   831
  held some resource in state @{text s} (that is not @{text "detached"}). And furthermore
urbanc
parents: 325
diff changeset
   832
  that the current precedence of @{text th'} in state @{text "(s' @ s)"} must be equal to the 
urbanc
parents: 325
diff changeset
   833
  precedence of @{text th} in @{text "s"}.
urbanc
parents: 325
diff changeset
   834
  We show this theorem by induction on @{text "s'"} using Lemma~\ref{mainlem}.
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
   835
  This theorem gives a stricter bound on the threads that can block @{text th} than the
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   836
  one obtained by Sha et al.~\cite{Sha90}:
326
urbanc
parents: 325
diff changeset
   837
  only threads that were alive in state @{text s} and moreover held a resource.
329
urbanc
parents: 328
diff changeset
   838
  This means our bound is in terms of both---alive threads in state @{text s}
urbanc
parents: 328
diff changeset
   839
  and number of critical resources. Finally, the theorem establishes that the blocking threads have the
326
urbanc
parents: 325
diff changeset
   840
  current precedence raised to the precedence of @{text th}.
urbanc
parents: 325
diff changeset
   841
329
urbanc
parents: 328
diff changeset
   842
  We can furthermore prove that under our assumptions no deadlock exists in the state @{text "s' @ s"}
328
urbanc
parents: 327
diff changeset
   843
  by showing that @{text "running (s' @ s)"} is not empty.
urbanc
parents: 327
diff changeset
   844
urbanc
parents: 327
diff changeset
   845
  \begin{lemma}
urbanc
parents: 327
diff changeset
   846
  Given the assumptions about states @{text "s"} and @{text "s' @ s"},
urbanc
parents: 327
diff changeset
   847
  the thread @{text th} and the events in @{text "s'"},
urbanc
parents: 327
diff changeset
   848
  @{term "running (s' @ s) \<noteq> {}"}.
urbanc
parents: 327
diff changeset
   849
  \end{lemma}
urbanc
parents: 327
diff changeset
   850
urbanc
parents: 327
diff changeset
   851
  \begin{proof}
urbanc
parents: 327
diff changeset
   852
  If @{text th} is blocked, then by following its dependants graph, we can always 
urbanc
parents: 327
diff changeset
   853
  reach a ready thread @{text th'}, and that thread must have inherited the 
urbanc
parents: 327
diff changeset
   854
  precedence of @{text th}.\qed
urbanc
parents: 327
diff changeset
   855
  \end{proof}
urbanc
parents: 327
diff changeset
   856
urbanc
parents: 327
diff changeset
   857
326
urbanc
parents: 325
diff changeset
   858
  %The following lemmas show how every node in RAG can be chased to ready threads:
urbanc
parents: 325
diff changeset
   859
  %\begin{enumerate}
urbanc
parents: 325
diff changeset
   860
  %\item Every node in RAG can be chased to a ready thread (@{text "chain_building"}):
urbanc
parents: 325
diff changeset
   861
  %  @   {thm [display] chain_building[rule_format]}
urbanc
parents: 325
diff changeset
   862
  %\item The ready thread chased to is unique (@{text "dchain_unique"}):
urbanc
parents: 325
diff changeset
   863
  %  @   {thm [display] dchain_unique[of _ _ "th\<^isub>1" "th\<^isub>2"]}
urbanc
parents: 325
diff changeset
   864
  %\end{enumerate}
301
urbanc
parents: 300
diff changeset
   865
326
urbanc
parents: 325
diff changeset
   866
  %Some deeper results about the system:
urbanc
parents: 325
diff changeset
   867
  %\begin{enumerate}
urbanc
parents: 325
diff changeset
   868
  %\item The maximum of @{term "cp"} and @{term "preced"} are equal (@{text "max_cp_eq"}):
urbanc
parents: 325
diff changeset
   869
  %@  {thm [display] max_cp_eq}
urbanc
parents: 325
diff changeset
   870
  %\item There must be one ready thread having the max @{term "cp"}-value 
urbanc
parents: 325
diff changeset
   871
  %(@{text "max_cp_readys_threads"}):
urbanc
parents: 325
diff changeset
   872
  %@  {thm [display] max_cp_readys_threads}
urbanc
parents: 325
diff changeset
   873
  %\end{enumerate}
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   874
326
urbanc
parents: 325
diff changeset
   875
  %The relationship between the count of @{text "P"} and @{text "V"} and the number of 
urbanc
parents: 325
diff changeset
   876
  %critical resources held by a thread is given as follows:
urbanc
parents: 325
diff changeset
   877
  %\begin{enumerate}
urbanc
parents: 325
diff changeset
   878
  %\item The @{term "V"}-operation decreases the number of critical resources 
urbanc
parents: 325
diff changeset
   879
  %  one thread holds (@{text "cntCS_v_dec"})
urbanc
parents: 325
diff changeset
   880
  %   @  {thm [display]  cntCS_v_dec}
urbanc
parents: 325
diff changeset
   881
  %\item The number of @{text "V"} never exceeds the number of @{text "P"} 
urbanc
parents: 325
diff changeset
   882
  %  (@  {text "cnp_cnv_cncs"}):
urbanc
parents: 325
diff changeset
   883
  %  @  {thm [display]  cnp_cnv_cncs}
urbanc
parents: 325
diff changeset
   884
  %\item The number of @{text "V"} equals the number of @{text "P"} when 
urbanc
parents: 325
diff changeset
   885
  %  the relevant thread is not living:
urbanc
parents: 325
diff changeset
   886
  %  (@{text "cnp_cnv_eq"}):
urbanc
parents: 325
diff changeset
   887
  %  @  {thm [display]  cnp_cnv_eq}
urbanc
parents: 325
diff changeset
   888
  %\item When a thread is not living, it does not hold any critical resource 
urbanc
parents: 325
diff changeset
   889
  %  (@{text "not_thread_holdents"}):
urbanc
parents: 325
diff changeset
   890
  %  @  {thm [display] not_thread_holdents}
urbanc
parents: 325
diff changeset
   891
  %\item When the number of @{text "P"} equals the number of @{text "V"}, the relevant 
urbanc
parents: 325
diff changeset
   892
  %  thread does not hold any critical resource, therefore no thread can depend on it
urbanc
parents: 325
diff changeset
   893
  %  (@{text "count_eq_dependents"}):
urbanc
parents: 325
diff changeset
   894
  %  @  {thm [display] count_eq_dependents}
urbanc
parents: 325
diff changeset
   895
  %\end{enumerate}
313
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   896
326
urbanc
parents: 325
diff changeset
   897
  %The reason that only threads which already held some resoures
urbanc
parents: 325
diff changeset
   898
  %can be runing and block @{text "th"} is that if , otherwise, one thread 
urbanc
parents: 325
diff changeset
   899
  %does not hold any resource, it may never have its prioirty raised
urbanc
parents: 325
diff changeset
   900
  %and will not get a chance to run. This fact is supported by 
urbanc
parents: 325
diff changeset
   901
  %lemma @{text "moment_blocked"}:
urbanc
parents: 325
diff changeset
   902
  %@   {thm [display] moment_blocked}
urbanc
parents: 325
diff changeset
   903
  %When instantiating  @{text "i"} to @{text "0"}, the lemma means threads which did not hold any
urbanc
parents: 325
diff changeset
   904
  %resource in state @{text "s"} will not have a change to run latter. Rephrased, it means 
urbanc
parents: 325
diff changeset
   905
  %any thread which is running after @{text "th"} became the highest must have already held
urbanc
parents: 325
diff changeset
   906
  %some resource at state @{text "s"}.
313
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   907
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   908
326
urbanc
parents: 325
diff changeset
   909
  %When instantiating @{text "i"} to a number larger than @{text "0"}, the lemma means 
urbanc
parents: 325
diff changeset
   910
  %if a thread releases all its resources at some moment in @{text "t"}, after that, 
urbanc
parents: 325
diff changeset
   911
  %it may never get a change to run. If every thread releases its resource in finite duration,
urbanc
parents: 325
diff changeset
   912
  %then after a while, only thread @{text "th"} is left running. This shows how indefinite 
urbanc
parents: 325
diff changeset
   913
  %priority inversion can be avoided. 
313
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   914
326
urbanc
parents: 325
diff changeset
   915
  %All these assumptions are put into a predicate @{term "extend_highest_gen"}. 
urbanc
parents: 325
diff changeset
   916
  %It can be proved that @{term "extend_highest_gen"} holds 
urbanc
parents: 325
diff changeset
   917
  %for any moment @{text "i"} in it @{term "t"} (@{text "red_moment"}):
urbanc
parents: 325
diff changeset
   918
  %@   {thm [display] red_moment}
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   919
  
326
urbanc
parents: 325
diff changeset
   920
  %From this, an induction principle can be derived for @{text "t"}, so that 
urbanc
parents: 325
diff changeset
   921
  %properties already derived for @{term "t"} can be applied to any prefix 
urbanc
parents: 325
diff changeset
   922
  %of @{text "t"} in the proof of new properties 
urbanc
parents: 325
diff changeset
   923
  %about @{term "t"} (@{text "ind"}):
urbanc
parents: 325
diff changeset
   924
  %\begin{center}
urbanc
parents: 325
diff changeset
   925
  %@   {thm[display] ind}
urbanc
parents: 325
diff changeset
   926
  %\end{center}
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   927
326
urbanc
parents: 325
diff changeset
   928
  %The following properties can be proved about @{term "th"} in @{term "t"}:
urbanc
parents: 325
diff changeset
   929
  %\begin{enumerate}
urbanc
parents: 325
diff changeset
   930
  %\item In @{term "t"}, thread @{term "th"} is kept live and its 
urbanc
parents: 325
diff changeset
   931
  %  precedence is preserved as well
urbanc
parents: 325
diff changeset
   932
  %  (@{text "th_kept"}): 
urbanc
parents: 325
diff changeset
   933
  %  @   {thm [display] th_kept}
urbanc
parents: 325
diff changeset
   934
  %\item In @{term "t"}, thread @{term "th"}'s precedence is always the maximum among 
urbanc
parents: 325
diff changeset
   935
  %  all living threads
urbanc
parents: 325
diff changeset
   936
  %  (@{text "max_preced"}): 
urbanc
parents: 325
diff changeset
   937
  %  @   {thm [display] max_preced}
urbanc
parents: 325
diff changeset
   938
  %\item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum precedence
urbanc
parents: 325
diff changeset
   939
  %  among all living threads
urbanc
parents: 325
diff changeset
   940
  %  (@{text "th_cp_max_preced"}): 
urbanc
parents: 325
diff changeset
   941
  %  @   {thm [display] th_cp_max_preced}
urbanc
parents: 325
diff changeset
   942
  %\item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum current 
urbanc
parents: 325
diff changeset
   943
  %  precedence among all living threads
urbanc
parents: 325
diff changeset
   944
  %  (@{text "th_cp_max"}): 
urbanc
parents: 325
diff changeset
   945
  %  @   {thm [display] th_cp_max}
urbanc
parents: 325
diff changeset
   946
  %\item In @{term "t"}, thread @{term "th"}'s current precedence equals its precedence at moment 
urbanc
parents: 325
diff changeset
   947
  %  @{term "s"}
urbanc
parents: 325
diff changeset
   948
  %  (@{text "th_cp_preced"}): 
urbanc
parents: 325
diff changeset
   949
  %  @   {thm [display] th_cp_preced}
urbanc
parents: 325
diff changeset
   950
  %\end{enumerate}
urbanc
parents: 325
diff changeset
   951
urbanc
parents: 325
diff changeset
   952
  %The main theorem of this part is to characterizing the running thread during @{term "t"} 
urbanc
parents: 325
diff changeset
   953
  %(@{text "runing_inversion_2"}):
urbanc
parents: 325
diff changeset
   954
  %@   {thm [display] runing_inversion_2}
urbanc
parents: 325
diff changeset
   955
  %According to this, if a thread is running, it is either @{term "th"} or was
urbanc
parents: 325
diff changeset
   956
  %already live and held some resource 
urbanc
parents: 325
diff changeset
   957
  %at moment @{text "s"} (expressed by: @{text "cntV s th' < cntP s th'"}).
urbanc
parents: 325
diff changeset
   958
urbanc
parents: 325
diff changeset
   959
  %Since there are only finite many threads live and holding some resource at any moment,
urbanc
parents: 325
diff changeset
   960
  %if every such thread can release all its resources in finite duration, then after finite
urbanc
parents: 325
diff changeset
   961
  %duration, none of them may block @{term "th"} anymore. So, no priority inversion may happen
urbanc
parents: 325
diff changeset
   962
  %then.
325
163cd8034e5b key lemma
urbanc
parents: 324
diff changeset
   963
  *}
313
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   964
(*<*)
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   965
end
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   966
(*>*)
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   967
314
ccb6c0601614 some parts of the conclusion
urbanc
parents: 313
diff changeset
   968
section {* Properties for an Implementation\label{implement} *}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   969
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   970
text {*
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
   971
  While our formalised proof gives us confidence about the correctness of our model of PIP, 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
   972
  we found that the formalisation can even help us with efficiently implementing it.
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   973
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   974
  For example Baker complained that calculating the current precedence
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
   975
  in PIP is quite ``heavy weight'' in Linux (see the Introduction).
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   976
  In our model of PIP the current precedence of a thread in a state @{text s}
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   977
  depends on all its dependants---a ``global'' transitive notion,
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   978
  which is indeed heavy weight (see Def.~shown in \eqref{cpreced}).
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
   979
  We can however improve upon this. For this let us define the notion
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
   980
  of @{term children} of a thread @{text th} in a state @{text s} as
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   981
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   982
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   983
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   984
  @{thm children_def2}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   985
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   986
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   987
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   988
  \noindent
339
b3add51e2e0f added some of the comments of the reviewers and made it compile with current Isabelle
urbanc
parents: 337
diff changeset
   989
  where a child is a thread that is only one ``hop'' away from the thread
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
   990
  @{text th} in the @{term RAG} (and waiting for @{text th} to release
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
   991
  a resource). We can prove the following lemma.
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   992
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   993
  \begin{lemma}\label{childrenlem}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   994
  @{text "If"} @{thm (prem 1) cp_rec} @{text "then"}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   995
  \begin{center}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   996
  @{thm (concl) cp_rec}.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   997
  \end{center}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   998
  \end{lemma}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   999
  
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1000
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1001
  That means the current precedence of a thread @{text th} can be
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1002
  computed locally by considering only the children of @{text th}. In
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1003
  effect, it only needs to be recomputed for @{text th} when one of
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1004
  its children changes its current precedence.  Once the current 
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1005
  precedence is computed in this more efficient manner, the selection
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1006
  of the thread with highest precedence from a set of ready threads is
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1007
  a standard scheduling operation implemented in most operating
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1008
  systems.
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1009
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1010
  Of course the main work for implementing PIP involves the
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1011
  scheduler and coding how it should react to events.  Below we
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1012
  outline how our formalisation guides this implementation for each
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1013
  kind of event.\smallskip
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1014
*}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1015
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1016
(*<*)
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1017
context step_create_cps
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1018
begin
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1019
(*>*)
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1020
text {*
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1021
  \noindent
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1022
  \colorbox{mygrey}{@{term "Create th prio"}:} We assume that the current state @{text s'} and 
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1023
  the next state @{term "s \<equiv> Create th prio#s'"} are both valid (meaning the event
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1024
  is allowed to occur). In this situation we can show that
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1025
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1026
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1027
  \begin{tabular}{@ {}l}
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1028
  @{thm eq_dep},\\
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1029
  @{thm eq_cp_th}, and\\
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1030
  @{thm[mode=IfThen] eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1031
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1032
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1033
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1034
  \noindent
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1035
  This means in an implementation we do not have recalculate the @{text RAG} and also none of the
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1036
  current precedences of the other threads. The current precedence of the created
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1037
  thread @{text th} is just its precedence, namely the pair @{term "(prio, length (s::event list))"}.
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1038
  \smallskip
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1039
  *}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1040
(*<*)
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1041
end
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1042
context step_exit_cps
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1043
begin
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1044
(*>*)
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1045
text {*
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1046
  \noindent
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1047
  \colorbox{mygrey}{@{term "Exit th"}:} We again assume that the current state @{text s'} and 
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1048
  the next state @{term "s \<equiv> Exit th#s'"} are both valid. We can show that
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1049
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1050
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1051
  \begin{tabular}{@ {}l}
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1052
  @{thm eq_dep}, and\\
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1053
  @{thm[mode=IfThen] eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1054
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1055
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1056
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1057
  \noindent
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1058
  This means again we do not have to recalculate the @{text RAG} and
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1059
  also not the current precedences for the other threads. Since @{term th} is not
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1060
  alive anymore in state @{term "s"}, there is no need to calculate its
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1061
  current precedence.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1062
  \smallskip
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1063
*}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1064
(*<*)
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1065
end
311
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urbanc
parents: 310
diff changeset
  1066
context step_set_cps
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urbanc
parents: 310
diff changeset
  1067
begin
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1068
(*>*)
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1069
text {*
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1070
  \noindent
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1071
  \colorbox{mygrey}{@{term "Set th prio"}:} We assume that @{text s'} and 
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1072
  @{term "s \<equiv> Set th prio#s'"} are both valid. We can show that
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1073
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1074
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1075
  \begin{tabular}{@ {}l}
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1076
  @{thm[mode=IfThen] eq_dep}, and\\
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1077
  @{thm[mode=IfThen] eq_cp_pre}
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1078
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1079
  \end{isabelle}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1080
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1081
  \noindent
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1082
  The first property is again telling us we do not need to change the @{text RAG}. 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1083
  The second shows that the @{term cp}-values of all threads other than @{text th} 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1084
  are unchanged. The reason is that @{text th} is running; therefore it is not in 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1085
  the @{term dependants} relation of any thread. This in turn means that the 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1086
  change of its priority cannot affect the threads.
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1087
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1088
  %The second
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1089
  %however states that only threads that are \emph{not} dependants of @{text th} have their
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1090
  %current precedence unchanged. For the others we have to recalculate the current
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1091
  %precedence. To do this we can start from @{term "th"} 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1092
  %and follow the @{term "depend"}-edges to recompute  using Lemma~\ref{childrenlem} 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1093
  %the @{term "cp"} of every 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1094
  %thread encountered on the way. Since the @{term "depend"}
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1095
  %is assumed to be loop free, this procedure will always stop. The following two lemmas show, however, 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1096
  %that this procedure can actually stop often earlier without having to consider all
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1097
  %dependants.
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1098
  %
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1099
  %\begin{isabelle}\ \ \ \ \ %%%
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1100
  %\begin{tabular}{@ {}l}
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1101
  %@{thm[mode=IfThen] eq_up_self}\\
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1102
  %@{text "If"} @{thm (prem 1) eq_up}, @{thm (prem 2) eq_up} and @{thm (prem 3) eq_up}\\
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1103
  %@{text "then"} @{thm (concl) eq_up}.
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1104
  %\end{tabular}
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1105
  %\end{isabelle}
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1106
  %
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1107
  %\noindent
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1108
  %The first lemma states that if the current precedence of @{text th} is unchanged,
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1109
  %then the procedure can stop immediately (all dependent threads have their @{term cp}-value unchanged).
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1110
  %The second states that if an intermediate @{term cp}-value does not change, then
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1111
  %the procedure can also stop, because none of its dependent threads will
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1112
  %have their current precedence changed.
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1113
  \smallskip
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1114
  *}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1115
(*<*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1116
end
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1117
context step_v_cps_nt
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1118
begin
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1119
(*>*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1120
text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1121
  \noindent
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1122
  \colorbox{mygrey}{@{term "V th cs"}:} We assume that @{text s'} and 
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1123
  @{term "s \<equiv> V th cs#s'"} are both valid. We have to consider two
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1124
  subcases: one where there is a thread to ``take over'' the released
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1125
  resource @{text cs}, and one where there is not. Let us consider them
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1126
  in turn. Suppose in state @{text s}, the thread @{text th'} takes over
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1127
  resource @{text cs} from thread @{text th}. We can prove
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1128
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1129
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1130
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1131
  @{thm depend_s}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1132
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1133
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1134
  \noindent
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1135
  which shows how the @{text RAG} needs to be changed. The next lemma suggests
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1136
  how the current precedences need to be recalculated. For threads that are
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1137
  not @{text "th"} and @{text "th'"} nothing needs to be changed, since we
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1138
  can show
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1139
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1140
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1141
  @{thm[mode=IfThen] cp_kept}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1142
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1143
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1144
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1145
  For @{text th} and @{text th'} we need to use Lemma~\ref{childrenlem} to
331
c5442db6a5cb changes by Xingyuan
urbanc
parents: 329
diff changeset
  1146
  recalculate their current precedence since their children have changed. *}(*<*)end context step_v_cps_nnt begin (*>*)text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1147
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1148
  In the other case where there is no thread that takes over @{text cs}, we can show how
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1149
  to recalculate the @{text RAG} and also show that no current precedence needs
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1150
  to be recalculated.
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1151
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1152
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1153
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1154
  @{thm depend_s}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1155
  @{thm eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1156
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1157
  \end{isabelle}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1158
  *}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1159
(*<*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1160
end
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1161
context step_P_cps_e
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urbanc
parents: 310
diff changeset
  1162
begin
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1163
(*>*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1164
text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1165
  \noindent
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1166
  \colorbox{mygrey}{@{term "P th cs"}:} We assume that @{text s'} and 
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1167
  @{term "s \<equiv> P th cs#s'"} are both valid. We again have to analyse two subcases, namely
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1168
  the one where @{text cs} is not locked, and one where it is. We treat the former case
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1169
  first by showing that
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1170
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1171
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1172
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1173
  @{thm depend_s}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1174
  @{thm eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1175
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1176
  \end{isabelle}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1177
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1178
  \noindent
336
f9e0d3274c14 fixed typo
urbanc
parents: 335
diff changeset
  1179
  This means we need to add a holding edge to the @{text RAG} and no
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1180
  current precedence needs to be recalculated.*}(*<*)end context step_P_cps_ne begin(*>*) text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1181
  \noindent
331
c5442db6a5cb changes by Xingyuan
urbanc
parents: 329
diff changeset
  1182
  In the second case we know that resource @{text cs} is locked. We can show that
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1183
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1184
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1185
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1186
  @{thm depend_s}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1187
  @{thm[mode=IfThen] eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1188
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1189
  \end{isabelle}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1190
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1191
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1192
  That means we have to add a waiting edge to the @{text RAG}. Furthermore
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1193
  the current precedence for all threads that are not dependants of @{text th}
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1194
  are unchanged. For the others we need to follow the edges 
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1195
  in the @{text RAG} and recompute the @{term "cp"}. However, like in the 
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1196
  case of @{text Set}, this operation can stop often earlier, namely when intermediate
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1197
  values do not change.
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1198
  *}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1199
(*<*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1200
end
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1201
(*>*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1202
text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1203
  \noindent
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1204
  As can be seen, a pleasing byproduct of our formalisation is that the properties in
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1205
  this section closely inform an implementation of PIP, namely whether the
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1206
  @{text RAG} needs to be reconfigured or current precedences need to
339
b3add51e2e0f added some of the comments of the reviewers and made it compile with current Isabelle
urbanc
parents: 337
diff changeset
  1207
  be recalculated for an event. This information is provided by the lemmas we proved.
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1208
*}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1209
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
  1210
section {* Conclusion *}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
  1211
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1212
text {* 
314
ccb6c0601614 some parts of the conclusion
urbanc
parents: 313
diff changeset
  1213
  The Priority Inheritance Protocol (PIP) is a classic textbook
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1214
  algorithm used in many real-time operating systems in order to avoid the problem of
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1215
  Priority Inversion.  Although classic and widely used, PIP does have
317
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1216
  its faults: for example it does not prevent deadlocks in cases where threads
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1217
  have circular lock dependencies.
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1218
317
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1219
  We had two goals in mind with our formalisation of PIP: One is to
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1220
  make the notions in the correctness proof by Sha et al.~\cite{Sha90}
317
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1221
  precise so that they can be processed by a theorem prover. The reason is
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1222
  that a mechanically checked proof avoids the flaws that crept into their
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1223
  informal reasoning. We achieved this goal: The correctness of PIP now
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1224
  only hinges on the assumptions behind our formal model. The reasoning, which is
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1225
  sometimes quite intricate and tedious, has been checked by Isabelle/HOL. 
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1226
  We can also confirm that Paulson's
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1227
  inductive method for protocol verification~\cite{Paulson98} is quite
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1228
  suitable for our formal model and proof. The traditional application
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1229
  area of this method is security protocols. 
301
urbanc
parents: 300
diff changeset
  1230
317
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1231
  The second goal of our formalisation is to provide a specification for actually
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1232
  implementing PIP. Textbooks, for example \cite[Section 5.6.5]{Vahalia96},
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1233
  explain how to use various implementations of PIP and abstractly
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1234
  discuss their properties, but surprisingly lack most details important for a
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1235
  programmer who wants to implement PIP (similarly Sha et al.~\cite{Sha90}).  
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1236
  That this is an issue in practice is illustrated by the
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1237
  email from Baker we cited in the Introduction. We achieved also this
317
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1238
  goal: The formalisation gives the first author enough data to enable
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1239
  his undergraduate students to implement PIP (as part of their OS course)
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1240
  on top of PINTOS, a small operating system for teaching
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1241
  purposes. A byproduct of our formalisation effort is that nearly all
314
ccb6c0601614 some parts of the conclusion
urbanc
parents: 313
diff changeset
  1242
  design choices for the PIP scheduler are backed up with a proved
317
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1243
  lemma. We were also able to establish the property that the choice of
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1244
  the next thread which takes over a lock is irrelevant for the correctness
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1245
  of PIP. Earlier model checking approaches which verified particular implementations
317
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1246
  of PIP \cite{Faria08,Jahier09,Wellings07} cannot
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1247
  provide this kind of ``deep understanding'' about the principles behind 
2d268a0afc07 more conclusion
urbanc
parents: 316
diff changeset
  1248
  PIP and its correctness.
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1249
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1250
  {\bf rewrite the following slightly}
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1251
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1252
  PIP is a scheduling algorithm for single-processor systems. We are
316
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1253
  now living in a multi-processor world. So the question naturally
318
b1c3be7ab341 more conclusion
urbanc
parents: 317
diff changeset
  1254
  arises whether PIP has any relevance in such a world beyond
b1c3be7ab341 more conclusion
urbanc
parents: 317
diff changeset
  1255
  teaching. Priority Inversion certainly occurs also in
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1256
  multi-processor systems.  However, the surprising answer, according
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1257
  to \cite{Steinberg10}, is that except for one unsatisfactory
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1258
  proposal nobody has a good idea for how PIP should be modified to
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1259
  work correctly on multi-processor systems. The difficulties become
333
813e7257c7c3 some polishing of the repository
urbanc
parents: 332
diff changeset
  1260
  clear when considering the fact that releasing and re-locking a resource always
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1261
  requires a small amount of time. If processes work independently,
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1262
  then a low priority process can ``steal'' in such an unguarded
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1263
  moment a lock for a resource that was supposed to allow a high-priority
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1264
  process to run next. Thus the problem of Priority Inversion is not
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1265
  really prevented by the classic PIP. It seems difficult to design a PIP-algorithm with
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1266
  a meaningful correctness property on a multi-processor systems where
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1267
  processes work independently.  We can imagine PIP to be of use in
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1268
  situations where processes are \emph{not} independent, but
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1269
  coordinated via a master process that distributes work over some
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1270
  slave processes. However, a formal investigation of this idea is beyond
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1271
  the scope of this paper.  We are not aware of any proofs in this
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1272
  area, not even informal or flawed ones.
265
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1273
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1274
  The most closely related work to ours is the formal verification in
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1275
  PVS of the Priority Ceiling Protocol done by Dutertre
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1276
  \cite{dutertre99b}---another solution to the Priority Inversion
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1277
  problem, which however needs static analysis of programs in order to
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1278
  avoid it. {\bf mention model-checking approaches}
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1279
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1280
  Our formalisation
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1281
  consists of around 210 lemmas and overall 6950 lines of readable Isabelle/Isar
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1282
  code with a few apply-scripts interspersed. The formal model of PIP
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1283
  is 385 lines long; the formal correctness proof 3800 lines. Some auxiliary
332
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1284
  definitions and proofs span over 770 lines of code. The properties relevant
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1285
  for an implementation require 2000 lines. The code of our formalisation 
5faa1b59e870 one typo
urbanc
parents: 331
diff changeset
  1286
  can be downloaded from
339
b3add51e2e0f added some of the comments of the reviewers and made it compile with current Isabelle
urbanc
parents: 337
diff changeset
  1287
  \url{http://www.inf.kcl.ac.uk/staff/urbanc/pip.html}.
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1288
342
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1289
  {\bf say:
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1290
  So this paper is a good witness for one
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1291
of the major reasons to be interested in machine checked reasoning:
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1292
gaining deeper understanding of the subject matter.
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1293
  }
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1294
a40a35d1bc91 changes requested by the reviewers
urbanc
parents: 341
diff changeset
  1295
321
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1296
  \bibliographystyle{plain}
6a4249608ad0 polished implementation
urbanc
parents: 320
diff changeset
  1297
  \bibliography{root}
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1298
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1299
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1300
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1301
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1302
end
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1303
(*>*)