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(*<*)
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theory Paper
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imports CpsG ExtGG LaTeXsugar
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begin
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(*>*)
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section {* Introduction *}
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text {*
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  Many realtime systems need to support processes with priorities and
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  locking of resources. Locking of resources ensures...  Priorities
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  are needed so that some processes can finish their work within ``hard''
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  deadlines.  Unfortunately both features interact in subtle ways
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  leading to the problem, called Priority Inversion. Suppose three
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  processes with priorities $H$(igh), $M$(edium) and $L$(ow). We would
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  assume that process $H$ cannot be blocked by any process with lower
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  priority. Unfortunately in a naive implementation, this can happen
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  and $H$ even can be delayed indefinitely by processes with lower
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  priorities. For this let $L$ be in the posession of lock for a
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  research which also $H$ needs. $H$ must therefore wait for $L$ to
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  release this lock. Unfortunately, $L$ can in turn be blocked by any
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  process with priority $M$, and so $H$ sits there potentially waiting
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  indefinitely.
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  If this problem of inversion of priorities is left untreated,
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  systems can become unpredictable and have dire consequences.  The
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  classic example where this happened in practice is the software on
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  the Mars pathfinder project.  This software shut down at irregulare
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  intervals leading to loss of project time (the mission and data was
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  fortunately not lost, because of clever system design). The problem
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  was that a high priority process and could only be restarted the
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  next day.
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  Priority inversion referrers to the phenomena where tasks with higher 
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  priority are blocked by ones with lower priority. If priority inversion 
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  is not controlled, there will be no guarantee the urgent tasks will be 
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  processed in time. As reported in \cite{Reeves-Glenn-1998}, 
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  priority inversion used to cause software system resets and data lose in 
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  JPL's Mars pathfinder project. Therefore, the avoiding, detecting and controlling 
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  of priority inversion is a key issue to attain predictability in priority 
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  based real-time systems. 
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  The priority inversion phenomenon was first published in \cite{Lampson:Redell:cacm:1980}. 
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  The two protocols widely used to eliminate priority inversion, namely 
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  PI (Priority Inheritance) and PCE (Priority Ceiling Emulation), were proposed 
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  in \cite{journals/tc/ShaRL90}. PCE is less convenient to use because it requires 
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  static analysis of programs. Therefore, PI is more commonly used in 
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  practice\cite{locke-july02}. However, as pointed out in the literature, 
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  the analysis of priority inheritance protocol is quite subtle\cite{yodaiken-july02}. 
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  A formal analysis will certainly be helpful for us to understand and correctly 
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  implement PI. All existing formal analysis of PI
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  \cite{conf/fase/JahierHR09,WellingsBSB07,Faria08} are based on the model checking 
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  technology. Because of the state explosion problem, model check 
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  is much like an exhaustive testing of finite models with limited size. 
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  The results obtained can not be safely generalized to models with arbitrarily 
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  large size. Worse still, since model checking is fully automatic, it give little 
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  insight on why the formal model is correct. It is therefore 
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  definitely desirable to analyze PI using theorem proving, which gives 
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  more general results as well as deeper insight. And this is the purpose 
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  of this paper which gives a formal analysis of PI in the interactive 
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  theorem prover Isabelle using Higher Order Logic (HOL). The formalization 
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  focuses on on two issues:
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  \begin{enumerate}
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  \item The correctness of the protocol model itself. A series of desirable properties is 
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    derived until we are fully convinced that the formal model of PI does 
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    eliminate priority inversion. And a better understanding of PI is so obtained 
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    in due course. For example, we find through formalization that the choice of 
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    next thread to take hold when a 
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    resource is released is irrelevant for the very basic property of PI to hold. 
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    A point never mentioned in literature. 
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  \item The correctness of the implementation. A series of properties is derived the meaning 
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    of which can be used as guidelines on how PI can be implemented efficiently and correctly. 
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  \end{enumerate} 
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  The rest of the paper is organized as follows: Section \ref{overview} gives an overview 
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  of PI. Section \ref{model} introduces the formal model of PI. Section \ref{general} 
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  discusses a series of basic properties of PI. Section \ref{extension} shows formally 
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  how priority inversion is controlled by PI. Section \ref{implement} gives properties 
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  which can be used for guidelines of implementation. Section \ref{related} discusses 
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  related works. Section \ref{conclusion} concludes the whole paper.
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  Contributions
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  Despite the wide use of Priority Inheritance Protocol in real time operating
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  system, it's correctness has never been formally proved and mechanically checked. 
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  All existing verification are based on model checking technology. Full automatic
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  verification gives little help to understand why the protocol is correct. 
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  And results such obtained only apply to models of limited size. 
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  This paper presents a formal verification based on theorem proving. 
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  Machine checked formal proof does help to get deeper understanding. We found 
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  the fact which is not mentioned in the literature, that the choice of next 
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  thread to take over when an critical resource is release does not affect the correctness
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  of the protocol. The paper also shows how formal proof can help to construct 
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  correct and efficient implementation.\bigskip 
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*}
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section {* An overview of priority inversion and priority inheritance \label{overview} *}
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text {*
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  Priority inversion refers to the phenomenon when a thread with high priority is blocked 
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  by a thread with low priority. Priority happens when the high priority thread requests 
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  for some critical resource already taken by the low priority thread. Since the high 
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  priority thread has to wait for the low priority thread to complete, it is said to be 
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  blocked by the low priority thread. Priority inversion might prevent high priority 
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  thread from fulfill its task in time if the duration of priority inversion is indefinite 
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  and unpredictable. Indefinite priority inversion happens when indefinite number 
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  of threads with medium priorities is activated during the period when the high 
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  priority thread is blocked by the low priority thread. Although these medium 
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  priority threads can not preempt the high priority thread directly, they are able 
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  to preempt the low priority threads and cause it to stay in critical section for 
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  an indefinite long duration. In this way, the high priority thread may be blocked indefinitely. 
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  Priority inheritance is one protocol proposed to avoid indefinite priority inversion. 
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  The basic idea is to let the high priority thread donate its priority to the low priority 
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  thread holding the critical resource, so that it will not be preempted by medium priority 
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  threads. The thread with highest priority will not be blocked unless it is requesting 
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  some critical resource already taken by other threads. Viewed from a different angle, 
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  any thread which is able to block the highest priority threads must already hold some 
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  critical resource. Further more, it must have hold some critical resource at the 
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  moment the highest priority is created, otherwise, it may never get change to run and 
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  get hold. Since the number of such resource holding lower priority threads is finite, 
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  if every one of them finishes with its own critical section in a definite duration, 
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  the duration the highest priority thread is blocked is definite as well. The key to 
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  guarantee lower priority threads to finish in definite is to donate them the highest 
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  priority. In such cases, the lower priority threads is said to have inherited the 
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  highest priority. And this explains the name of the protocol: 
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  {\em Priority Inheritance} and how Priority Inheritance prevents indefinite delay.
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  The objectives of this paper are:
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  \begin{enumerate}
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  \item Build the above mentioned idea into formal model and prove a series of properties 
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    until we are convinced that the formal model does fulfill the original idea. 
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  \item Show how formally derived properties can be used as guidelines for correct 
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    and efficient implementation.
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  \end{enumerate}
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  The proof is totally formal in the sense that every detail is reduced to the 
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  very first principles of Higher Order Logic. The nature of interactive theorem 
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  proving is for the human user to persuade computer program to accept its arguments. 
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  A clear and simple understanding of the problem at hand is both a prerequisite and a 
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  byproduct of such an effort, because everything has finally be reduced to the very 
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  first principle to be checked mechanically. The former intuitive explanation of 
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  Priority Inheritance is just such a byproduct. 
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  *}
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section {* Formal model of Priority Inheritance \label{model} *}
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text {*
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  \input{../../generated/PrioGDef}
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*}
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section {* General properties of Priority Inheritance \label{general} *}
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(*<*)
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ML {*
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  (*val () = show_question_marks_default := false;*)
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*}
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(*>*)
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text {*
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  The following are several very basic prioprites:
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  \begin{enumerate}
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  \item All runing threads must be ready (@{text "runing_ready"}):
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          @{thm[display] "runing_ready"}  
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  \item All ready threads must be living (@{text "readys_threads"}):
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          @{thm[display] "readys_threads"} 
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  \item There are finite many living threads at any moment (@{text "finite_threads"}):
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          @{thm[display] "finite_threads"} 
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  \item Every waiting queue does not contain duplcated elements (@{text "wq_distinct"}): 
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          @{thm[display] "wq_distinct"} 
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  \item All threads in waiting queues are living threads (@{text "wq_threads"}): 
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   174
          @{thm[display] "wq_threads"} 
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   175
  \item The event which can get a thread into waiting queue must be @{term "P"}-events
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   176
         (@{text "block_pre"}): 
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   177
          @{thm[display] "block_pre"}   
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   178
  \item A thread may never wait for two different critical resources
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   179
         (@{text "waiting_unique"}): 
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   180
          @{thm[display] waiting_unique[of _ _ "cs\<^isub>1" "cs\<^isub>2"]}
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   181
  \item Every resource can only be held by one thread
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   182
         (@{text "held_unique"}): 
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          @{thm[display] held_unique[of _ "th\<^isub>1" _ "th\<^isub>2"]}
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   184
  \item Every living thread has an unique precedence
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         (@{text "preced_unique"}): 
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          @{thm[display] preced_unique[of "th\<^isub>1" _ "th\<^isub>2"]}
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  \end{enumerate}
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   188
*}
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   189
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text {* \noindent
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   191
  The following lemmas show how RAG is changed with the execution of events:
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   192
  \begin{enumerate}
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   193
  \item Execution of @{term "Set"} does not change RAG (@{text "depend_set_unchanged"}):
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    @{thm[display] depend_set_unchanged}
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   195
  \item Execution of @{term "Create"} does not change RAG (@{text "depend_create_unchanged"}):
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   196
    @{thm[display] depend_create_unchanged}
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   197
  \item Execution of @{term "Exit"} does not change RAG (@{text "depend_exit_unchanged"}):
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    @{thm[display] depend_exit_unchanged}
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   199
  \item Execution of @{term "P"} (@{text "step_depend_p"}):
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   200
    @{thm[display] step_depend_p}
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   201
  \item Execution of @{term "V"} (@{text "step_depend_v"}):
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    @{thm[display] step_depend_v}
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   203
  \end{enumerate}
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   204
  *}
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   205
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text {* \noindent
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   207
  These properties are used to derive the following important results about RAG:
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   208
  \begin{enumerate}
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   209
  \item RAG is loop free (@{text "acyclic_depend"}):
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   210
  @{thm [display] acyclic_depend}
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   211
  \item RAGs are finite (@{text "finite_depend"}):
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   212
  @{thm [display] finite_depend}
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   213
  \item Reverse paths in RAG are well founded (@{text "wf_dep_converse"}):
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   214
  @{thm [display] wf_dep_converse}
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   215
  \item The dependence relation represented by RAG has a tree structure (@{text "unique_depend"}):
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   216
  @{thm [display] unique_depend[of _ _ "n\<^isub>1" "n\<^isub>2"]}
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   217
  \item All threads in RAG are living threads 
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   218
    (@{text "dm_depend_threads"} and @{text "range_in"}):
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   219
    @{thm [display] dm_depend_threads range_in}
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   220
  \end{enumerate}
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   221
  *}
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diff changeset
   222
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   223
text {* \noindent
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   224
  The following lemmas show how every node in RAG can be chased to ready threads:
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   225
  \begin{enumerate}
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   226
  \item Every node in RAG can be chased to a ready thread (@{text "chain_building"}):
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   227
    @{thm [display] chain_building[rule_format]}
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   228
  \item The ready thread chased to is unique (@{text "dchain_unique"}):
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   229
    @{thm [display] dchain_unique[of _ _ "th\<^isub>1" "th\<^isub>2"]}
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   230
  \end{enumerate}
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   231
  *}
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   232
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   233
text {* \noindent
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   234
  Properties about @{term "next_th"}:
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   235
  \begin{enumerate}
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   236
  \item The thread taking over is different from the thread which is releasing
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   237
  (@{text "next_th_neq"}):
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   238
  @{thm [display] next_th_neq}
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   239
  \item The thread taking over is unique
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   240
  (@{text "next_th_unique"}):
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   241
  @{thm [display] next_th_unique[of _ _ _ "th\<^isub>1" "th\<^isub>2"]}  
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   242
  \end{enumerate}
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   243
  *}
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   244
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   245
text {* \noindent
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   246
  Some deeper results about the system:
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   247
  \begin{enumerate}
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   248
  \item There can only be one running thread (@{text "runing_unique"}):
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   249
  @{thm [display] runing_unique[of _ "th\<^isub>1" "th\<^isub>2"]}
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   250
  \item The maximum of @{term "cp"} and @{term "preced"} are equal (@{text "max_cp_eq"}):
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   251
  @{thm [display] max_cp_eq}
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   252
  \item There must be one ready thread having the max @{term "cp"}-value 
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   253
  (@{text "max_cp_readys_threads"}):
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   254
  @{thm [display] max_cp_readys_threads}
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   255
  \end{enumerate}
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   256
  *}
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   257
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   258
text {* \noindent
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   259
  The relationship between the count of @{text "P"} and @{text "V"} and the number of 
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   260
  critical resources held by a thread is given as follows:
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   261
  \begin{enumerate}
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   262
  \item The @{term "V"}-operation decreases the number of critical resources 
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   263
    one thread holds (@{text "cntCS_v_dec"})
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   264
     @{thm [display]  cntCS_v_dec}
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parents: 262
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   265
  \item The number of @{text "V"} never exceeds the number of @{text "P"} 
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   266
    (@{text "cnp_cnv_cncs"}):
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   267
    @{thm [display]  cnp_cnv_cncs}
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   268
  \item The number of @{text "V"} equals the number of @{text "P"} when 
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   269
    the relevant thread is not living:
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   270
    (@{text "cnp_cnv_eq"}):
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   271
    @{thm [display]  cnp_cnv_eq}
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   272
  \item When a thread is not living, it does not hold any critical resource 
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   273
    (@{text "not_thread_holdents"}):
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   274
    @{thm [display] not_thread_holdents}
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   275
  \item When the number of @{text "P"} equals the number of @{text "V"}, the relevant 
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   276
    thread does not hold any critical resource, therefore no thread can depend on it
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   277
    (@{text "count_eq_dependents"}):
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   278
    @{thm [display] count_eq_dependents}
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   279
  \end{enumerate}
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   280
  *}
262
4190df6f4488 initial version of the PIP formalisation
urbanc
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   281
4190df6f4488 initial version of the PIP formalisation
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   282
section {* Key properties \label{extension} *}
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   283
264
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   284
(*<*)
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   285
context extend_highest_gen
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   286
begin
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   287
(*>*)
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   288
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   289
text {*
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   290
  The essential of {\em Priority Inheritance} is to avoid indefinite priority inversion. For this 
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   291
  purpose, we need to investigate what happens after one thread takes the highest precedence. 
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   292
  A locale is used to describe such a situation, which assumes:
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   293
  \begin{enumerate}
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   294
  \item @{term "s"} is a valid state (@{text "vt_s"}):
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   295
    @{thm  vt_s}.
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   296
  \item @{term "th"} is a living thread in @{term "s"} (@{text "threads_s"}):
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   297
    @{thm threads_s}.
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   298
  \item @{term "th"} has the highest precedence in @{term "s"} (@{text "highest"}):
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   299
    @{thm highest}.
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   300
  \item The precedence of @{term "th"} is @{term "Prc prio tm"} (@{text "preced_th"}):
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   301
    @{thm preced_th}.
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   302
  \end{enumerate}
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   303
  *}
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   304
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   305
text {* \noindent
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   306
  Under these assumptions, some basic priority can be derived for @{term "th"}:
24199eb2c423 Newer version.
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parents: 262
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   307
  \begin{enumerate}
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   308
  \item The current precedence of @{term "th"} equals its own precedence (@{text "eq_cp_s_th"}):
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   309
    @{thm [display] eq_cp_s_th}
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   310
  \item The current precedence of @{term "th"} is the highest precedence in 
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zhang
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   311
    the system (@{text "highest_cp_preced"}):
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   312
    @{thm [display] highest_cp_preced}
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parents: 262
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   313
  \item The precedence of @{term "th"} is the highest precedence 
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zhang
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   314
    in the system (@{text "highest_preced_thread"}):
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   315
    @{thm [display] highest_preced_thread}
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parents: 262
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   316
  \item The current precedence of @{term "th"} is the highest current precedence 
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   317
    in the system (@{text "highest'"}):
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zhang
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   318
    @{thm [display] highest'}
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diff changeset
   319
  \end{enumerate}
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diff changeset
   320
  *}
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parents: 262
diff changeset
   321
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   322
text {* \noindent
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diff changeset
   323
  To analysis what happens after state @{term "s"} a sub-locale is defined, which 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   324
  assumes:
24199eb2c423 Newer version.
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   325
  \begin{enumerate}
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   326
  \item @{term "t"} is a valid extension of @{term "s"} (@{text "vt_t"}): @{thm vt_t}.
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parents: 262
diff changeset
   327
  \item Any thread created in @{term "t"} has priority no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
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diff changeset
   328
    its precedence can not be higher than @{term "th"},  therefore
24199eb2c423 Newer version.
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diff changeset
   329
    @{term "th"} remain to be the one with the highest precedence
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diff changeset
   330
    (@{text "create_low"}):
24199eb2c423 Newer version.
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diff changeset
   331
    @{thm [display] create_low}
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parents: 262
diff changeset
   332
  \item Any adjustment of priority in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   333
    @{term "t"} does not happen to @{term "th"} and 
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zhang
parents: 262
diff changeset
   334
    the priority set is no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   335
    @{term "th"} remain to be the one with the highest precedence (@{text "set_diff_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   336
    @{thm [display] set_diff_low}
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parents: 262
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   337
  \item Since we are investigating what happens to @{term "th"}, it is assumed 
24199eb2c423 Newer version.
zhang
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diff changeset
   338
    @{term "th"} does not exit during @{term "t"} (@{text "exit_diff"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   339
    @{thm [display] exit_diff}
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diff changeset
   340
  \end{enumerate}
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parents: 262
diff changeset
   341
*}
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zhang
parents: 262
diff changeset
   342
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   343
text {* \noindent
24199eb2c423 Newer version.
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   344
  All these assumptions are put into a predicate @{term "extend_highest_gen"}. 
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zhang
parents: 262
diff changeset
   345
  It can be proved that @{term "extend_highest_gen"} holds 
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zhang
parents: 262
diff changeset
   346
  for any moment @{text "i"} in it @{term "t"} (@{text "red_moment"}):
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zhang
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diff changeset
   347
  @{thm [display] red_moment}
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zhang
parents: 262
diff changeset
   348
  
24199eb2c423 Newer version.
zhang
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diff changeset
   349
  From this, an induction principle can be derived for @{text "t"}, so that 
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zhang
parents: 262
diff changeset
   350
  properties already derived for @{term "t"} can be applied to any prefix 
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zhang
parents: 262
diff changeset
   351
  of @{text "t"} in the proof of new properties 
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zhang
parents: 262
diff changeset
   352
  about @{term "t"} (@{text "ind"}):
24199eb2c423 Newer version.
zhang
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diff changeset
   353
  \begin{center}
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   354
  @{thm[display] ind}
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zhang
parents: 262
diff changeset
   355
  \end{center}
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zhang
parents: 262
diff changeset
   356
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   357
  The following properties can be proved about @{term "th"} in @{term "t"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   358
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   359
  \item In @{term "t"}, thread @{term "th"} is kept live and its 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   360
    precedence is preserved as well
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   361
    (@{text "th_kept"}): 
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zhang
parents: 262
diff changeset
   362
    @{thm [display] th_kept}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   363
  \item In @{term "t"}, thread @{term "th"}'s precedence is always the maximum among 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   364
    all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   365
    (@{text "max_preced"}): 
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zhang
parents: 262
diff changeset
   366
    @{thm [display] max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   367
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   368
    among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   369
    (@{text "th_cp_max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   370
    @{thm [display] th_cp_max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   371
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum current 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   372
    precedence among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   373
    (@{text "th_cp_max"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   374
    @{thm [display] th_cp_max}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   375
  \item In @{term "t"}, thread @{term "th"}'s current precedence equals its precedence at moment 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   376
    @{term "s"}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   377
    (@{text "th_cp_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   378
    @{thm [display] th_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   379
  \end{enumerate}
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zhang
parents: 262
diff changeset
   380
  *}
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zhang
parents: 262
diff changeset
   381
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zhang
parents: 262
diff changeset
   382
text {* \noindent
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zhang
parents: 262
diff changeset
   383
  The main theorem is to characterizing the running thread during @{term "t"} 
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zhang
parents: 262
diff changeset
   384
  (@{text "runing_inversion_2"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   385
  @{thm [display] runing_inversion_2}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   386
  According to this, if a thread is running, it is either @{term "th"} or was
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   387
  already live and held some resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   388
  at moment @{text "s"} (expressed by: @{text "cntV s th' < cntP s th'"}).
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   389
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   390
  Since there are only finite many threads live and holding some resource at any moment,
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   391
  if every such thread can release all its resources in finite duration, then after finite
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   392
  duration, none of them may block @{term "th"} anymore. So, no priority inversion may happen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   393
  then.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   394
  *}
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zhang
parents: 262
diff changeset
   395
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zhang
parents: 262
diff changeset
   396
(*<*)
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zhang
parents: 262
diff changeset
   397
end
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zhang
parents: 262
diff changeset
   398
(*>*)
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zhang
parents: 262
diff changeset
   399
262
4190df6f4488 initial version of the PIP formalisation
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   400
section {* Properties to guide implementation \label{implement} *}
4190df6f4488 initial version of the PIP formalisation
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   401
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   402
text {*
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   403
  The properties (especially @{text "runing_inversion_2"}) convinced us that model defined 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   404
  in section \ref{model} does prevent indefinite priority inversion and therefore fulfills 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   405
  the fundamental requirement of Priority Inheritance protocol. Another purpose of this paper 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   406
  is to show how this model can be used to guide a concrete implementation.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   407
  *}
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zhang
parents: 262
diff changeset
   408
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   409
262
4190df6f4488 initial version of the PIP formalisation
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   410
section {* Related works \label{related} *}
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   411
4190df6f4488 initial version of the PIP formalisation
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   412
text {*
4190df6f4488 initial version of the PIP formalisation
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   413
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   414
  \item {\em Integrating Priority Inheritance Algorithms in the Real-Time Specification for Java}
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   415
    \cite{WellingsBSB07} models and verifies the combination of Priority Inheritance (PI) and 
4190df6f4488 initial version of the PIP formalisation
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parents:
diff changeset
   416
    Priority Ceiling Emulation (PCE) protocols in the setting of Java virtual machine 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   417
    using extended Timed Automata(TA) formalism of the UPPAAL tool. Although a detailed 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   418
    formal model of combined PI and PCE is given, the number of properties is quite 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   419
    small and the focus is put on the harmonious working of PI and PCE. Most key features of PI 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   420
    (as well as PCE) are not shown. Because of the limitation of the model checking technique
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   421
    used there, properties are shown only for a small number of scenarios. Therefore, 
4190df6f4488 initial version of the PIP formalisation
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parents:
diff changeset
   422
    the verification does not show the correctness of the formal model itself in a 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   423
    convincing way.  
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   424
  \item {\em Formal Development of Solutions for Real-Time Operating Systems with TLA+/TLC}
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   425
    \cite{Faria08}. A formal model of PI is given in TLA+. Only 3 properties are shown 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   426
    for PI using model checking. The limitation of model checking is intrinsic to the work.
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   427
  \item {\em Synchronous modeling and validation of priority inheritance schedulers}
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   428
    \cite{conf/fase/JahierHR09}. Gives a formal model
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   429
    of PI and PCE in AADL (Architecture Analysis \& Design Language) and checked 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   430
    several properties using model checking. The number of properties shown there is 
4190df6f4488 initial version of the PIP formalisation
urbanc
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diff changeset
   431
    less than here and the scale is also limited by the model checking technique. 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   432
  \item {\em The Priority Ceiling Protocol: Formalization and Analysis Using PVS}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   433
    \cite{dutertre99b}. Formalized another protocol for Priority Inversion in the 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   434
    interactive theorem proving system PVS.
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   435
\end{enumerate}
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   436
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   437
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   438
  There are several works on inversion avoidance:
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   439
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   440
  \item {\em Solving the group priority inversion problem in a timed asynchronous system}
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   441
    \cite{Wang:2002:SGP}. The notion of Group Priority Inversion is introduced. The main 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   442
    strategy is still inversion avoidance. The method is by reordering requests 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   443
    in the setting of Client-Server.
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   444
  \item {\em A Formalization of Priority Inversion} \cite{journals/rts/BabaogluMS93}. 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   445
    Formalized the notion of Priority 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   446
    Inversion and proposes methods to avoid it. 
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   447
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   448
4190df6f4488 initial version of the PIP formalisation
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   449
  {\em Examples of inaccurate specification of the protocol ???}.
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   450
4190df6f4488 initial version of the PIP formalisation
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   451
*}
4190df6f4488 initial version of the PIP formalisation
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   452
4190df6f4488 initial version of the PIP formalisation
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   453
section {* Conclusions \label{conclusion} *}
4190df6f4488 initial version of the PIP formalisation
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   454
4190df6f4488 initial version of the PIP formalisation
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   455
(*<*)
4190df6f4488 initial version of the PIP formalisation
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   456
end
4190df6f4488 initial version of the PIP formalisation
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diff changeset
   457
(*>*)