prio/Paper/Paper.thy
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(*<*)
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theory Paper
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imports CpsG ExtGG "~~/src/HOL/Library/LaTeXsugar"
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begin
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ML {*
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  open Printer;
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  show_question_marks_default := false;
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  *}
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notation (latex output)
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  Cons ("_::_" [78,77] 73) and
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  vt ("valid'_state") and
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  runing ("running") and
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  birthtime ("last'_set") and
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  If  ("(\<^raw:\textrm{>if\<^raw:}> (_)/ \<^raw:\textrm{>then\<^raw:}> (_)/ \<^raw:\textrm{>else\<^raw:}> (_))" 10) and
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  Prc ("'(_, _')") and
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  holding ("holds") and
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  waiting ("waits") and
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  Th ("T") and
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  Cs ("C") and
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  readys ("ready") and
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  depend ("RAG") and 
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  preced ("prec") and
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  cpreced ("cprec") and
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  dependents ("dependants") and
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  cp ("cprec") and
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  holdents ("resources") and
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  original_priority ("priority") and
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  DUMMY  ("\<^raw:\mbox{$\_\!\_$}>")
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(*>*)
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section {* Introduction *}
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text {*
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  Many real-time systems need to support threads involving priorities and
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  locking of resources. Locking of resources ensures mutual exclusion
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  when accessing shared data or devices that cannot be
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  preempted. Priorities allow scheduling of threads that need to
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  finish their work within deadlines.  Unfortunately, both features
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  can interact in subtle ways leading to a problem, called
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  \emph{Priority Inversion}. Suppose three threads having priorities
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  $H$(igh), $M$(edium) and $L$(ow). We would expect that the thread
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  $H$ blocks any other thread with lower priority and itself cannot
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  be blocked by any thread with lower priority. Alas, in a naive
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  implementation of resource looking and priorities this property can
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  be violated. Even worse, $H$ can be delayed indefinitely by
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  threads with lower priorities. For this let $L$ be in the
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  possession of a lock for a resource that also $H$ needs. $H$ must
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  therefore wait for $L$ to exit the critical section and release this
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  lock. The problem is that $L$ might in turn be blocked by any
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  thread with priority $M$, and so $H$ sits there potentially waiting
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  indefinitely. Since $H$ is blocked by threads with lower
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  priorities, the problem is called Priority Inversion. It was first
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  described in \cite{Lampson80} in the context of the
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  Mesa programming language designed for concurrent programming.
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  If the problem of Priority Inversion is ignored, real-time systems
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  can become unpredictable and resulting bugs can be hard to diagnose.
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  The classic example where this happened is the software that
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  controlled the Mars Pathfinder mission in 1997 \cite{Reeves98}.
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  Once the spacecraft landed, the software shut down at irregular
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  intervals leading to loss of project time as normal operation of the
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  craft could only resume the next day (the mission and data already
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  collected were fortunately not lost, because of a clever system
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  design).  The reason for the shutdowns was that the scheduling
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  software fell victim of Priority Inversion: a low priority thread
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  locking a resource prevented a high priority thread from running in
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  time leading to a system reset. Once the problem was found, it was
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  rectified by enabling the \emph{Priority Inheritance Protocol} (PIP)
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  \cite{Sha90}\footnote{Sha et al.~call it the \emph{Basic Priority
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  Inheritance Protocol} \cite{Sha90} and others sometimes also call it
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  \emph{Priority Boosting}.} in the scheduling software.
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  The idea behind PIP is to let the thread $L$ temporarily inherit
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  the high priority from $H$ until $L$ leaves the critical section
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  unlocking the resource. This solves the problem of $H$ having to
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  wait indefinitely, because $L$ cannot be blocked by threads having
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  priority $M$. While a few other solutions exist for the Priority
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  Inversion problem, PIP is one that is widely deployed and
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  implemented. This includes VxWorks (a proprietary real-time OS used
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  in the Mars Pathfinder mission, in Boeing's 787 Dreamliner, Honda's
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  ASIMO robot, etc.), but also the POSIX 1003.1c Standard realised for
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  example in libraries for FreeBSD, Solaris and Linux.
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  One advantage of PIP is that increasing the priority of a thread
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  can be dynamically calculated by the scheduler. This is in contrast
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  to, for example, \emph{Priority Ceiling} \cite{Sha90}, another
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  solution to the Priority Inversion problem, which requires static
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  analysis of the program in order to prevent Priority
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  Inversion. However, there has also been strong criticism against
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  PIP. For instance, PIP cannot prevent deadlocks when lock
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  dependencies are circular, and also blocking times can be
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  substantial (more than just the duration of a critical section).
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  Though, most criticism against PIP centres around unreliable
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  implementations and PIP being too complicated and too inefficient.
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  For example, Yodaiken writes in \cite{Yodaiken02}:
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  \begin{quote}
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  \it{}``Priority inheritance is neither efficient nor reliable. Implementations
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  are either incomplete (and unreliable) or surprisingly complex and intrusive.''
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  \end{quote}
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  \noindent
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  He suggests to avoid PIP altogether by not allowing critical
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  sections to be preempted. Unfortunately, this solution does not
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  help in real-time systems with low latency \emph{requirements}.
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  In our opinion, there is clearly a need for investigating correct
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  algorithms for PIP. A few specifications for PIP exist (in English)
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  and also a few high-level descriptions of implementations (e.g.~in
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  the textbook \cite[Section 5.6.5]{Vahalia96}), but they help little
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  with actual implementations. That this is a problem in practise is
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  proved by an email from Baker, who wrote on 13 July 2009 on the Linux
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  Kernel mailing list:
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  \begin{quote}
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  \it{}``I observed in the kernel code (to my disgust), the Linux PIP
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  implementation is a nightmare: extremely heavy weight, involving
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  maintenance of a full wait-for graph, and requiring updates for a
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  range of events, including priority changes and interruptions of
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  wait operations.''
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  \end{quote}
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  \noindent
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  The criticism by Yodaiken, Baker and others suggests to us to look
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  again at PIP from a more abstract level (but still concrete enough
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  to inform an implementation), and makes PIP an ideal candidate for a
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  formal verification. One reason, of course, is that the original
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  presentation of PIP~\cite{Sha90}, despite being informally
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  ``proved'' correct, is actually \emph{flawed}. 
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  Yodaiken \cite{Yodaiken02} points to a subtlety that had been
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  overlooked in the informal proof by Sha et al. They specify in
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  \cite{Sha90} that after the thread (whose priority has been raised)
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  completes its critical section and releases the lock, it ``returns
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  to its original priority level.'' This leads them to believe that an
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  implementation of PIP is ``rather straightforward''~\cite{Sha90}.
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  Unfortunately, as Yodaiken points out, this behaviour is too
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  simplistic.  Consider the case where the low priority thread $L$
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  locks \emph{two} resources, and two high-priority threads $H$ and
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  $H'$ each wait for one of them.  If $L$ releases one resource
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  so that $H$, say, can proceed, then we still have Priority Inversion
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  with $H'$ (which waits for the other resource). The correct
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  behaviour for $L$ is to revert to the highest remaining priority of
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  the threads that it blocks. The advantage of formalising the
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  correctness of a high-level specification of PIP in a theorem prover
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  is that such issues clearly show up and cannot be overlooked as in
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  informal reasoning (since we have to analyse all possible behaviours
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  of threads, i.e.~\emph{traces}, that could possibly happen).\medskip
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  \noindent
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  {\bf Contributions:} There have been earlier formal investigations 
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  into PIP, but ...\cite{Faria08}
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  vt (valid trace) was introduced earlier, cite
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  distributed PIP
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  Paulson's method has not been used outside security field, except
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  work by Zhang et al.
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  no clue about multi-processor case according to \cite{Steinberg10} 
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*}
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section {* Formal Model of the Priority Inheritance Protocol *}
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text {*
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  The Priority Inheritance Protocol, short PIP, is a scheduling
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  algorithm for a single-processor system.\footnote{We shall come back
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  later to the case of PIP on multi-processor systems.} Our model of
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  PIP is based on Paulson's inductive approach to protocol
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  verification \cite{Paulson98}, where the \emph{state} of a system is
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  given by a list of events that happened so far.  \emph{Events} of PIP fall
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  into five categories defined as the datatype:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{r@ {\hspace{2mm}}c@ {\hspace{2mm}}l@ {\hspace{7mm}}l}
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  \isacommand{datatype} event 
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  & @{text "="} & @{term "Create thread priority"}\\
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  & @{text "|"} & @{term "Exit thread"} \\
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  & @{text "|"} & @{term "Set thread priority"} & {\rm reset of the priority for} @{text thread}\\
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  & @{text "|"} & @{term "P thread cs"} & {\rm request of resource} @{text "cs"} {\rm by} @{text "thread"}\\
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  & @{text "|"} & @{term "V thread cs"} & {\rm release of resource} @{text "cs"} {\rm by} @{text "thread"}
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  whereby threads, priorities and (critical) resources are represented
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  as natural numbers. The event @{term Set} models the situation that
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  a thread obtains a new priority given by the programmer or
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  user (for example via the {\tt nice} utility under UNIX).  As in Paulson's work, we
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  need to define functions that allow us to make some observations
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  about states.  One, called @{term threads}, calculates the set of
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  ``live'' threads that we have seen so far:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) threads.simps(1)} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(1)}\\
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  @{thm (lhs) threads.simps(2)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(2)[where thread="th"]}\\
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  @{thm (lhs) threads.simps(3)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(3)[where thread="th"]}\\
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  @{term "threads (DUMMY#s)"} & @{text "\<equiv>"} & @{term "threads s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition @{term "DUMMY # DUMMY"} stands for list-cons.
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  Another function calculates the priority for a thread @{text "th"}, which is 
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  defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) original_priority.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(1)[where thread="th"]}\\
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  @{thm (lhs) original_priority.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) original_priority.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "original_priority th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "original_priority th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition we set @{text 0} as the default priority for
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  threads that have not (yet) been created. The last function we need 
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  calculates the ``time'', or index, at which time a process had its 
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  priority last set.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) birthtime.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(1)[where thread="th"]}\\
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  @{thm (lhs) birthtime.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) birthtime.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "birthtime th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "birthtime th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition @{term "length s"} stands for the length of the list
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  of events @{text s}. Again the default value in this function is @{text 0}
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  for threads that have not been created yet. A \emph{precedence} of a thread @{text th} in a 
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  state @{text s} is the pair of natural numbers defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm preced_def[where thread="th"]}
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  \end{isabelle}
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  \noindent
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  The point of precedences is to schedule threads not according to priorities (because what should
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  we do in case two threads have the same priority), but according to precedences. 
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  Precedences allow us to always discriminate between two threads with equal priority by 
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  taking into account the time when the priority was last set. We order precedences so 
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  that threads with the same priority get a higher precedence if their priority has been 
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  set earlier, since for such threads it is more urgent to finish their work. In an implementation
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  this choice would translate to a quite natural FIFO-scheduling of processes with 
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  the same priority.
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  Next, we introduce the concept of \emph{waiting queues}. They are
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  lists of threads associated with every resource. The first thread in
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  this list (i.e.~the head, or short @{term hd}) is chosen to be the one 
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  that is in possession of the
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  ``lock'' of the corresponding resource. We model waiting queues as
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  functions, below abbreviated as @{text wq}. They take a resource as
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  argument and return a list of threads.  This allows us to define
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  when a thread \emph{holds}, respectively \emph{waits} for, a
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  resource @{text cs} given a waiting queue function @{text wq}.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \begin{tabular}{@ {}l}
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  @{thm cs_holding_def[where thread="th"]}\\
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  @{thm cs_waiting_def[where thread="th"]}
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  \end{tabular}
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  \end{isabelle}
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  \noindent
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  In this definition we assume @{text "set"} converts a list into a set.
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  At the beginning, that is in the state where no thread is created yet, 
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  the waiting queue function will be the function that returns the
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  empty list for every resource.
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{abbrev all_unlocked}
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  \end{isabelle}
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  \noindent
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  Using @{term "holding"} and @{term waiting}, we can introduce \emph{Resource Allocation Graphs} 
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  (RAG), which represent the dependencies between threads and resources.
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  We represent RAGs as relations using pairs of the form
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{term "(Th th, Cs cs)"} \hspace{5mm}{\rm and}\hspace{5mm}
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  @{term "(Cs cs, Th th)"}
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  \end{isabelle}
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  \noindent
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  where the first stands for a \emph{waiting edge} and the second for a 
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  \emph{holding edge} (@{term Cs} and @{term Th} are constructors of a 
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  datatype for vertices). Given a waiting queue function, a RAG is defined 
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  as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cs_depend_def}
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  \end{isabelle}
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  \noindent
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  Given three threads and three resources, an instance of a RAG is as follows:
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  \begin{center}
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  \newcommand{\fnt}{\fontsize{7}{8}\selectfont}
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  \begin{tikzpicture}[scale=1]
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  %%\draw[step=2mm] (-3,2) grid (1,-1);
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  \node (A) at (0,0) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>0"}};
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  \node (B) at (2,0) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>1"}};
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  \node (C) at (4,0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>1"}};
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  \node (D) at (4,-0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>2"}};
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  \node (E) at (6,-0.7) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>2"}};
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  \node (E1) at (6, 0.2) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>3"}};
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  \node (F) at (8,-0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>3"}};
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  \draw [<-,line width=0.6mm] (A) to node [pos=0.54,sloped,above=-0.5mm] {\fnt{}holding}  (B);
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  \draw [->,line width=0.6mm] (C) to node [pos=0.4,sloped,above=-0.5mm] {\fnt{}waiting}  (B);
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  \draw [->,line width=0.6mm] (D) to node [pos=0.4,sloped,below=-0.5mm] {\fnt{}waiting}  (B);
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  \draw [<-,line width=0.6mm] (D) to node [pos=0.54,sloped,below=-0.5mm] {\fnt{}holding}  (E);
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  \draw [<-,line width=0.6mm] (D) to node [pos=0.54,sloped,above=-0.5mm] {\fnt{}holding}  (E1);
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  \draw [->,line width=0.6mm] (F) to node [pos=0.45,sloped,below=-0.5mm] {\fnt{}waiting}  (E);
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  \end{tikzpicture}
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  \end{center}
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  \noindent
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  The use of relations for representing RAGs allows us to conveniently define
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  the notion of the \emph{dependants} of a thread. This is defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cs_dependents_def}
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  \end{isabelle}
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  \noindent
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  This definition needs to account for all threads that wait for a thread to
290
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  release a resource. This means we need to include threads that transitively
298
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  wait for a resource being released (in the picture above this means the dependants
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  of @{text "th\<^isub>0"} are @{text "th\<^isub>1"} and @{text "th\<^isub>2"}, but also @{text "th\<^isub>3"}, 
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  which cannot make any progress unless @{text "th\<^isub>2"} makes progress, which
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  in turn needs to wait for @{text "th\<^isub>1"} to finish). If there is a circle in a RAG, then clearly
291
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  we have a deadlock. Therefore when a thread requests a resource,
298
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  we must ensure that the resulting RAG is not circular. 
291
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  Next we introduce the notion of the \emph{current precedence} of a thread @{text th} in a 
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  state @{text s}. It is defined as
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  \begin{isabelle}\ \ \ \ \ %%%
299
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  @{thm cpreced_def2}\hfill\numbered{cpreced}
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  \end{isabelle}
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   359
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  \noindent
293
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   361
  While the precedence @{term prec} of a thread is determined by the programmer 
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   362
  (for example when the thread is
291
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   363
  created), the point of the current precedence is to let scheduler increase this
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   364
  priority, if needed according to PIP. Therefore the current precedence of @{text th} is
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  given as the maximum of the precedence @{text th} has in state @{text s} \emph{and} all 
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   366
  processes that are dependants of @{text th}. Since the notion @{term "dependants"} is
291
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   367
  defined as the transitive closure of all dependent threads, we deal correctly with the 
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   368
  problem in the algorithm by Sha et al.~\cite{Sha90} where a priority of a thread is
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   369
  lowered prematurely.
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   370
  
298
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   371
  The next function, called @{term schs}, defines the behaviour of the scheduler. It will be defined
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  by recursion on the state (a list of events); @{term "schs"} returns a \emph{schedule state}, which 
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  we represent as a record consisting of two
296
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   374
  functions:
293
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   375
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   376
  \begin{isabelle}\ \ \ \ \ %%%
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  @{text "\<lparr>wq_fun, cprec_fun\<rparr>"}
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  \end{isabelle}
291
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   379
294
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   380
  \noindent
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   381
  The first function is a waiting queue function (that is it takes a resource @{text "cs"} and returns the
296
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   382
  corresponding list of threads that wait for it), the second is a function that takes
299
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   383
  a thread and returns its current precedence (see \eqref{cpreced}). We assume the usual getter and 
296
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   384
  setter methods for such records.
294
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diff changeset
   385
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   386
  In the initial state, the scheduler starts with all resources unlocked and the
298
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   387
  current precedence of every thread is initialised with @{term "Prc 0 0"}; that means 
299
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   388
  \mbox{@{abbrev initial_cprec}}. Therefore
296
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   389
  we have
291
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diff changeset
   390
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   391
  \begin{isabelle}\ \ \ \ \ %%%
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diff changeset
   392
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   393
  @{thm (lhs) schs.simps(1)} @{text "\<equiv>"}\\ 
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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   394
  \hspace{5mm}@{term "(|wq_fun = all_unlocked, cprec_fun = (\<lambda>_::thread. Prc 0 0)|)"}
291
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diff changeset
   395
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   396
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   397
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   398
  \noindent
296
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   399
  The cases for @{term Create}, @{term Exit} and @{term Set} are also straightforward:
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   400
  we calculate the waiting queue function of the (previous) state @{text s}; 
298
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   401
  this waiting queue function @{text wq} is unchanged in the next schedule state---because
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   402
  none of these events lock or release any resources; 
296
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   403
  for calculating the next @{term "cprec_fun"}, we use @{text wq} and the function 
298
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diff changeset
   404
  @{term cpreced}. This gives the following three clauses for @{term schs}:
290
6a6d0bd16035 more on paper
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   405
6a6d0bd16035 more on paper
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diff changeset
   406
  \begin{isabelle}\ \ \ \ \ %%%
291
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diff changeset
   407
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   408
  @{thm (lhs) schs.simps(2)} @{text "\<equiv>"}\\ 
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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   409
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
298
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diff changeset
   410
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Create th prio # s)|)"}\smallskip\\
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   411
  @{thm (lhs) schs.simps(3)} @{text "\<equiv>"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   412
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   413
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Exit th # s)|)"}\smallskip\\
291
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diff changeset
   414
  @{thm (lhs) schs.simps(4)} @{text "\<equiv>"}\\ 
294
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diff changeset
   415
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   416
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Set th prio # s)|)"}
291
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diff changeset
   417
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   418
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   419
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   420
  \noindent 
300
8524f94d251b correct RAG
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   421
  More interesting are the cases when a resource, say @{text cs}, is locked or released. In these cases
8524f94d251b correct RAG
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diff changeset
   422
  we need to calculate a new waiting queue function. For the event @{term "P th cs"}, we have to update
296
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   423
  the function so that the new thread list for @{text cs} is old thread list plus the thread @{text th} 
300
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diff changeset
   424
  appended to the end of that list (remember the head of this list is seen to be in the possession of this
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   425
  resource).
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   426
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   427
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   428
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   429
  @{thm (lhs) schs.simps(5)} @{text "\<equiv>"}\\ 
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   430
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   431
  \hspace{5mm}@{text "let"} @{text "new_wq = wq(cs := (wq cs @ [th]))"} @{text "in"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   432
  \hspace{8mm}@{term "(|wq_fun = new_wq, cprec_fun = cpreced new_wq (P th cs # s)|)"}
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   433
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   434
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   435
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   436
  \noindent
300
8524f94d251b correct RAG
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diff changeset
   437
  The clause for event @{term "V th cs"} is similar, except that we need to update the waiting queue function
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   438
  so that the thread that possessed the lock is deleted from the corresponding thread list. For this we use
296
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diff changeset
   439
  the auxiliary function @{term release}. A simple version of @{term release} would
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   440
  just delete this thread and return the rest, namely
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   441
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   442
  \begin{isabelle}\ \ \ \ \ %%%
296
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diff changeset
   443
  \begin{tabular}{@ {}lcl}
2c8dcf010567 spell check; release
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diff changeset
   444
  @{term "release []"} & @{text "\<equiv>"} & @{term "[]"}\\
2c8dcf010567 spell check; release
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diff changeset
   445
  @{term "release (DUMMY # qs)"} & @{text "\<equiv>"} & @{term "qs"}\\
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diff changeset
   446
  \end{tabular}
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   447
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   448
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   449
  \noindent
300
8524f94d251b correct RAG
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diff changeset
   450
  In practice, however, often the thread with the highest precedence in the list will get the
296
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diff changeset
   451
  lock next. We have implemented this choice, but later found out that the choice 
300
8524f94d251b correct RAG
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diff changeset
   452
  of which thread is chosen next is actually irrelevant for the correctness of PIP.
296
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diff changeset
   453
  Therefore we prove the stronger result where @{term release} is defined as
2c8dcf010567 spell check; release
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diff changeset
   454
2c8dcf010567 spell check; release
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diff changeset
   455
  \begin{isabelle}\ \ \ \ \ %%%
2c8dcf010567 spell check; release
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diff changeset
   456
  \begin{tabular}{@ {}lcl}
2c8dcf010567 spell check; release
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diff changeset
   457
  @{term "release []"} & @{text "\<equiv>"} & @{term "[]"}\\
2c8dcf010567 spell check; release
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diff changeset
   458
  @{term "release (DUMMY # qs)"} & @{text "\<equiv>"} & @{term "SOME qs'. distinct qs' \<and> set qs' = set qs"}\\
2c8dcf010567 spell check; release
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diff changeset
   459
  \end{tabular}
2c8dcf010567 spell check; release
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diff changeset
   460
  \end{isabelle}
2c8dcf010567 spell check; release
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diff changeset
   461
2c8dcf010567 spell check; release
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diff changeset
   462
  \noindent
2c8dcf010567 spell check; release
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diff changeset
   463
  @{text "SOME"} stands for Hilbert's epsilon and implements an arbitrary
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   464
  choice for the next waiting list. It just has to be a list of distinctive threads and
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   465
  contain the same elements as @{text "qs"}. This gives for @{term V} the clause:
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   466
 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   467
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   468
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   469
  @{thm (lhs) schs.simps(6)} @{text "\<equiv>"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   470
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   471
  \hspace{5mm}@{text "let"} @{text "new_wq = release (wq cs)"} @{text "in"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   472
  \hspace{8mm}@{term "(|wq_fun = new_wq, cprec_fun = cpreced new_wq (V th cs # s)|)"}
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   473
  \end{tabular}
290
6a6d0bd16035 more on paper
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diff changeset
   474
  \end{isabelle}
6a6d0bd16035 more on paper
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diff changeset
   475
300
8524f94d251b correct RAG
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diff changeset
   476
  Having the scheduler function @{term schs} at our disposal, we can ``lift'', or
8524f94d251b correct RAG
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diff changeset
   477
  overload, the notions
8524f94d251b correct RAG
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diff changeset
   478
  @{term waiting}, @{term holding}, @{term depend} and @{term cp} to operate on states only.
286
572f202659ff corrections by Xingyuan
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parents: 285
diff changeset
   479
572f202659ff corrections by Xingyuan
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parents: 285
diff changeset
   480
  \begin{isabelle}\ \ \ \ \ %%%
298
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diff changeset
   481
  \begin{tabular}{@ {}rcl}
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   482
  @{thm (lhs) s_holding_abv} & @{text "\<equiv>"} & @{thm (rhs) s_holding_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   483
  @{thm (lhs) s_waiting_abv} & @{text "\<equiv>"} & @{thm (rhs) s_waiting_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   484
  @{thm (lhs) s_depend_abv}  & @{text "\<equiv>"} & @{thm (rhs) s_depend_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   485
  @{thm (lhs) cp_def}        & @{text "\<equiv>"} & @{thm (rhs) cp_def}
287
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parents: 286
diff changeset
   486
  \end{tabular}
440382eb6427 more on the specification section
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parents: 286
diff changeset
   487
  \end{isabelle}
440382eb6427 more on the specification section
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parents: 286
diff changeset
   488
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   489
  \noindent
300
8524f94d251b correct RAG
urbanc
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diff changeset
   490
  With these abbreviations we can introduce 
8524f94d251b correct RAG
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diff changeset
   491
  the notion of threads being @{term readys} in a state (i.e.~threads
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   492
  that do not wait for any resource) and the running thread.
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   493
287
440382eb6427 more on the specification section
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parents: 286
diff changeset
   494
  \begin{isabelle}\ \ \ \ \ %%%
440382eb6427 more on the specification section
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diff changeset
   495
  \begin{tabular}{@ {}l}
440382eb6427 more on the specification section
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parents: 286
diff changeset
   496
  @{thm readys_def}\\
440382eb6427 more on the specification section
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diff changeset
   497
  @{thm runing_def}\\
286
572f202659ff corrections by Xingyuan
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parents: 285
diff changeset
   498
  \end{tabular}
572f202659ff corrections by Xingyuan
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parents: 285
diff changeset
   499
  \end{isabelle}
284
d296cb127fcb more on paper
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diff changeset
   500
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   501
  \noindent
299
4fcd802eba59 small polishing
urbanc
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diff changeset
   502
  In this definition @{term "f ` S"} stands for the set @{text S} under the image of the 
4fcd802eba59 small polishing
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parents: 298
diff changeset
   503
  function @{text f}. 
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   504
  Note that in the initial case, that is where the list of events is empty, the set 
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   505
  @{term threads} is empty and therefore there is no thread ready nor a running.
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   506
  If there is one or more threads ready, then there can only be \emph{one} thread
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   507
  running, namely the one whose current precedence is equal to the maximum of all ready 
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   508
  threads. We use the set-comprehension to capture both possibilites.
8524f94d251b correct RAG
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diff changeset
   509
  We can now also define the set of resources that are locked by a thread in any
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   510
  given state.
284
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diff changeset
   511
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   512
  \begin{isabelle}\ \ \ \ \ %%%
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   513
  @{thm holdents_def}
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   514
  \end{isabelle}
284
d296cb127fcb more on paper
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diff changeset
   515
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   516
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   517
  These resources are given by the holding edges in the RAG.
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   518
299
4fcd802eba59 small polishing
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diff changeset
   519
  Finally we can define what a \emph{valid state} is in our PIP. For example we cannot exptect to
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   520
  be able to exit a thread, if it was not created yet. These validity constraints
299
4fcd802eba59 small polishing
urbanc
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diff changeset
   521
  are characterised by the inductive predicate @{term "step"}. We give five 
298
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diff changeset
   522
  inference rules relating a state and an event that can happen next.
284
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parents: 283
diff changeset
   523
d296cb127fcb more on paper
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diff changeset
   524
  \begin{center}
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diff changeset
   525
  \begin{tabular}{c}
d296cb127fcb more on paper
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diff changeset
   526
  @{thm[mode=Rule] thread_create[where thread=th]}\hspace{1cm}
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   527
  @{thm[mode=Rule] thread_exit[where thread=th]}
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   528
  \end{tabular}
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   529
  \end{center}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   530
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   531
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   532
  The first rule states that a thread can only be created, if it does not yet exists.
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   533
  Similarly, the second rule states that a thread can only be terminated if it was
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   534
  running and does not lock any resources anymore. The event @{text Set} can happen
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   535
  if the corresponding thread is running. 
284
d296cb127fcb more on paper
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parents: 283
diff changeset
   536
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   537
  \begin{center}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   538
  @{thm[mode=Rule] thread_set[where thread=th]}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   539
  \end{center}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   540
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   541
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   542
  If a thread wants to lock a resource, then the thread needs to be running and
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   543
  also we have to make sure that the resource lock doe not lead to a cycle in the 
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   544
  RAG. Similarly, if a thread wants to release a lock on a resource, then it must 
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   545
  be running and in the possession of that lock. This is formally given by the 
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   546
  last two inference rules of @{term step}.
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   547
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   548
  \begin{center}
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   549
  \begin{tabular}{c}
284
d296cb127fcb more on paper
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diff changeset
   550
  @{thm[mode=Rule] thread_P[where thread=th]}\medskip\\
d296cb127fcb more on paper
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parents: 283
diff changeset
   551
  @{thm[mode=Rule] thread_V[where thread=th]}\\
d296cb127fcb more on paper
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parents: 283
diff changeset
   552
  \end{tabular}
d296cb127fcb more on paper
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diff changeset
   553
  \end{center}
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   554
  
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   555
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   556
  A valid state of PIP can then be conveniently be defined as follows:
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   557
d296cb127fcb more on paper
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parents: 283
diff changeset
   558
  \begin{center}
d296cb127fcb more on paper
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diff changeset
   559
  \begin{tabular}{c}
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
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diff changeset
   560
  @{thm[mode=Axiom] vt_nil}\hspace{1cm}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   561
  @{thm[mode=Rule] vt_cons}
284
d296cb127fcb more on paper
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diff changeset
   562
  \end{tabular}
d296cb127fcb more on paper
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parents: 283
diff changeset
   563
  \end{center}
d296cb127fcb more on paper
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parents: 283
diff changeset
   564
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   565
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   566
  This completes our formal model of PIP. In the next section we present
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   567
  properties that show our version of PIP is correct.
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   568
*}
274
83b0317370c2 more on intro
urbanc
parents: 273
diff changeset
   569
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   570
section {* Correctness Proof *}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   571
f2e0d031a395 completed model section; vt has only state as argument
urbanc
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diff changeset
   572
text {* TO DO *}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   573
f2e0d031a395 completed model section; vt has only state as argument
urbanc
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diff changeset
   574
section {* Properties for an Implementation *}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   575
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   576
text {* TO DO *}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   577
f2e0d031a395 completed model section; vt has only state as argument
urbanc
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diff changeset
   578
section {* Conclusion *}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   579
300
8524f94d251b correct RAG
urbanc
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diff changeset
   580
text {* 
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   581
  The Priority Inheritance Protocol is a classic textbook algorithm
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   582
  used in real-time systems in order to avoid the problem of Priority
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   583
  Inversion.
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   584
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   585
  TO DO 
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   586
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   587
*}
273
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   588
280
c91c2dd08599 updated
urbanc
parents: 279
diff changeset
   589
text {*
c91c2dd08599 updated
urbanc
parents: 279
diff changeset
   590
  \bigskip
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   591
  The priority inversion phenomenon was first published in
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   592
  \cite{Lampson80}.  The two protocols widely used to eliminate
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   593
  priority inversion, namely PI (Priority Inheritance) and PCE
d296cb127fcb more on paper
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parents: 283
diff changeset
   594
  (Priority Ceiling Emulation), were proposed in \cite{Sha90}. PCE is
d296cb127fcb more on paper
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diff changeset
   595
  less convenient to use because it requires static analysis of
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   596
  programs. Therefore, PI is more commonly used in
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   597
  practice\cite{locke-july02}. However, as pointed out in the
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   598
  literature, the analysis of priority inheritance protocol is quite
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   599
  subtle\cite{yodaiken-july02}.  A formal analysis will certainly be
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   600
  helpful for us to understand and correctly implement PI. All
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   601
  existing formal analysis of PI
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   602
  \cite{conf/fase/JahierHR09,WellingsBSB07,Faria08} are based on the
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   603
  model checking technology. Because of the state explosion problem,
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   604
  model check is much like an exhaustive testing of finite models with
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   605
  limited size.  The results obtained can not be safely generalized to
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   606
  models with arbitrarily large size. Worse still, since model
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   607
  checking is fully automatic, it give little insight on why the
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   608
  formal model is correct. It is therefore definitely desirable to
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   609
  analyze PI using theorem proving, which gives more general results
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   610
  as well as deeper insight. And this is the purpose of this paper
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   611
  which gives a formal analysis of PI in the interactive theorem
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   612
  prover Isabelle using Higher Order Logic (HOL). The formalization
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   613
  focuses on on two issues:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   614
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   615
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   616
  \item The correctness of the protocol model itself. A series of desirable properties is 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   617
    derived until we are fully convinced that the formal model of PI does 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   618
    eliminate priority inversion. And a better understanding of PI is so obtained 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   619
    in due course. For example, we find through formalization that the choice of 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   620
    next thread to take hold when a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   621
    resource is released is irrelevant for the very basic property of PI to hold. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   622
    A point never mentioned in literature. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   623
  \item The correctness of the implementation. A series of properties is derived the meaning 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   624
    of which can be used as guidelines on how PI can be implemented efficiently and correctly. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   625
  \end{enumerate} 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   626
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   627
  The rest of the paper is organized as follows: Section \ref{overview} gives an overview 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   628
  of PI. Section \ref{model} introduces the formal model of PI. Section \ref{general} 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   629
  discusses a series of basic properties of PI. Section \ref{extension} shows formally 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   630
  how priority inversion is controlled by PI. Section \ref{implement} gives properties 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   631
  which can be used for guidelines of implementation. Section \ref{related} discusses 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   632
  related works. Section \ref{conclusion} concludes the whole paper.
265
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   633
273
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   634
  The basic priority inheritance protocol has two problems:
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   635
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   636
  It does not prevent a deadlock from happening in a program with circular lock dependencies.
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   637
  
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   638
  A chain of blocking may be formed; blocking duration can be substantial, though bounded.
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   639
265
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   640
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   641
  Contributions
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   642
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   643
  Despite the wide use of Priority Inheritance Protocol in real time operating
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   644
  system, it's correctness has never been formally proved and mechanically checked. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   645
  All existing verification are based on model checking technology. Full automatic
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   646
  verification gives little help to understand why the protocol is correct. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   647
  And results such obtained only apply to models of limited size. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   648
  This paper presents a formal verification based on theorem proving. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   649
  Machine checked formal proof does help to get deeper understanding. We found 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   650
  the fact which is not mentioned in the literature, that the choice of next 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   651
  thread to take over when an critical resource is release does not affect the correctness
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   652
  of the protocol. The paper also shows how formal proof can help to construct 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   653
  correct and efficient implementation.\bigskip 
993068ce745f changed abstract, intro and IsaMakefile
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parents: 264
diff changeset
   654
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   655
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   656
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   657
section {* An overview of priority inversion and priority inheritance \label{overview} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   658
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   659
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   660
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   661
  Priority inversion refers to the phenomenon when a thread with high priority is blocked 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   662
  by a thread with low priority. Priority happens when the high priority thread requests 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   663
  for some critical resource already taken by the low priority thread. Since the high 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   664
  priority thread has to wait for the low priority thread to complete, it is said to be 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   665
  blocked by the low priority thread. Priority inversion might prevent high priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   666
  thread from fulfill its task in time if the duration of priority inversion is indefinite 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   667
  and unpredictable. Indefinite priority inversion happens when indefinite number 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   668
  of threads with medium priorities is activated during the period when the high 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   669
  priority thread is blocked by the low priority thread. Although these medium 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   670
  priority threads can not preempt the high priority thread directly, they are able 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   671
  to preempt the low priority threads and cause it to stay in critical section for 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   672
  an indefinite long duration. In this way, the high priority thread may be blocked indefinitely. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   673
  
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   674
  Priority inheritance is one protocol proposed to avoid indefinite priority inversion. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   675
  The basic idea is to let the high priority thread donate its priority to the low priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   676
  thread holding the critical resource, so that it will not be preempted by medium priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   677
  threads. The thread with highest priority will not be blocked unless it is requesting 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   678
  some critical resource already taken by other threads. Viewed from a different angle, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   679
  any thread which is able to block the highest priority threads must already hold some 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   680
  critical resource. Further more, it must have hold some critical resource at the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   681
  moment the highest priority is created, otherwise, it may never get change to run and 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   682
  get hold. Since the number of such resource holding lower priority threads is finite, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   683
  if every one of them finishes with its own critical section in a definite duration, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   684
  the duration the highest priority thread is blocked is definite as well. The key to 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   685
  guarantee lower priority threads to finish in definite is to donate them the highest 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   686
  priority. In such cases, the lower priority threads is said to have inherited the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   687
  highest priority. And this explains the name of the protocol: 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   688
  {\em Priority Inheritance} and how Priority Inheritance prevents indefinite delay.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   689
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   690
  The objectives of this paper are:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   691
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   692
  \item Build the above mentioned idea into formal model and prove a series of properties 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   693
    until we are convinced that the formal model does fulfill the original idea. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   694
  \item Show how formally derived properties can be used as guidelines for correct 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   695
    and efficient implementation.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   696
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   697
  The proof is totally formal in the sense that every detail is reduced to the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   698
  very first principles of Higher Order Logic. The nature of interactive theorem 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   699
  proving is for the human user to persuade computer program to accept its arguments. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   700
  A clear and simple understanding of the problem at hand is both a prerequisite and a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   701
  byproduct of such an effort, because everything has finally be reduced to the very 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   702
  first principle to be checked mechanically. The former intuitive explanation of 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   703
  Priority Inheritance is just such a byproduct. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   704
  *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   705
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   706
section {* Formal model of Priority Inheritance \label{model} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   707
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   708
  \input{../../generated/PrioGDef}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   709
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   710
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   711
section {* General properties of Priority Inheritance \label{general} *}
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   712
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   713
text {*
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   714
  The following are several very basic prioprites:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   715
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   716
  \item All runing threads must be ready (@{text "runing_ready"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   717
          @{thm[display] "runing_ready"}  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   718
  \item All ready threads must be living (@{text "readys_threads"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   719
          @{thm[display] "readys_threads"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   720
  \item There are finite many living threads at any moment (@{text "finite_threads"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   721
          @{thm[display] "finite_threads"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   722
  \item Every waiting queue does not contain duplcated elements (@{text "wq_distinct"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   723
          @{thm[display] "wq_distinct"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   724
  \item All threads in waiting queues are living threads (@{text "wq_threads"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   725
          @{thm[display] "wq_threads"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   726
  \item The event which can get a thread into waiting queue must be @{term "P"}-events
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   727
         (@{text "block_pre"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   728
          @{thm[display] "block_pre"}   
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   729
  \item A thread may never wait for two different critical resources
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   730
         (@{text "waiting_unique"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   731
          @{thm[display] waiting_unique[of _ _ "cs\<^isub>1" "cs\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   732
  \item Every resource can only be held by one thread
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   733
         (@{text "held_unique"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   734
          @{thm[display] held_unique[of _ "th\<^isub>1" _ "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   735
  \item Every living thread has an unique precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   736
         (@{text "preced_unique"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   737
          @{thm[display] preced_unique[of "th\<^isub>1" _ "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   738
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   739
*}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   740
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   741
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   742
  The following lemmas show how RAG is changed with the execution of events:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   743
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   744
  \item Execution of @{term "Set"} does not change RAG (@{text "depend_set_unchanged"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   745
    @{thm[display] depend_set_unchanged}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   746
  \item Execution of @{term "Create"} does not change RAG (@{text "depend_create_unchanged"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   747
    @{thm[display] depend_create_unchanged}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   748
  \item Execution of @{term "Exit"} does not change RAG (@{text "depend_exit_unchanged"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   749
    @{thm[display] depend_exit_unchanged}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   750
  \item Execution of @{term "P"} (@{text "step_depend_p"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   751
    @{thm[display] step_depend_p}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   752
  \item Execution of @{term "V"} (@{text "step_depend_v"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   753
    @{thm[display] step_depend_v}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   754
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   755
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   756
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   757
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   758
  These properties are used to derive the following important results about RAG:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   759
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   760
  \item RAG is loop free (@{text "acyclic_depend"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   761
  @{thm [display] acyclic_depend}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   762
  \item RAGs are finite (@{text "finite_depend"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   763
  @{thm [display] finite_depend}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   764
  \item Reverse paths in RAG are well founded (@{text "wf_dep_converse"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   765
  @{thm [display] wf_dep_converse}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   766
  \item The dependence relation represented by RAG has a tree structure (@{text "unique_depend"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   767
  @{thm [display] unique_depend[of _ _ "n\<^isub>1" "n\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   768
  \item All threads in RAG are living threads 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   769
    (@{text "dm_depend_threads"} and @{text "range_in"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   770
    @{thm [display] dm_depend_threads range_in}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   771
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   772
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   773
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   774
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   775
  The following lemmas show how every node in RAG can be chased to ready threads:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   776
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   777
  \item Every node in RAG can be chased to a ready thread (@{text "chain_building"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   778
    @{thm [display] chain_building[rule_format]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   779
  \item The ready thread chased to is unique (@{text "dchain_unique"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   780
    @{thm [display] dchain_unique[of _ _ "th\<^isub>1" "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   781
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   782
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   783
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   784
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   785
  Properties about @{term "next_th"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   786
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   787
  \item The thread taking over is different from the thread which is releasing
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   788
  (@{text "next_th_neq"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   789
  @{thm [display] next_th_neq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   790
  \item The thread taking over is unique
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   791
  (@{text "next_th_unique"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   792
  @{thm [display] next_th_unique[of _ _ _ "th\<^isub>1" "th\<^isub>2"]}  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   793
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   794
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   795
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   796
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   797
  Some deeper results about the system:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   798
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   799
  \item There can only be one running thread (@{text "runing_unique"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   800
  @{thm [display] runing_unique[of _ "th\<^isub>1" "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   801
  \item The maximum of @{term "cp"} and @{term "preced"} are equal (@{text "max_cp_eq"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   802
  @{thm [display] max_cp_eq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   803
  \item There must be one ready thread having the max @{term "cp"}-value 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   804
  (@{text "max_cp_readys_threads"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   805
  @{thm [display] max_cp_readys_threads}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   806
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   807
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   808
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   809
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   810
  The relationship between the count of @{text "P"} and @{text "V"} and the number of 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   811
  critical resources held by a thread is given as follows:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   812
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   813
  \item The @{term "V"}-operation decreases the number of critical resources 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   814
    one thread holds (@{text "cntCS_v_dec"})
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   815
     @{thm [display]  cntCS_v_dec}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   816
  \item The number of @{text "V"} never exceeds the number of @{text "P"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   817
    (@{text "cnp_cnv_cncs"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   818
    @{thm [display]  cnp_cnv_cncs}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   819
  \item The number of @{text "V"} equals the number of @{text "P"} when 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   820
    the relevant thread is not living:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   821
    (@{text "cnp_cnv_eq"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   822
    @{thm [display]  cnp_cnv_eq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   823
  \item When a thread is not living, it does not hold any critical resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   824
    (@{text "not_thread_holdents"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   825
    @{thm [display] not_thread_holdents}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   826
  \item When the number of @{text "P"} equals the number of @{text "V"}, the relevant 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   827
    thread does not hold any critical resource, therefore no thread can depend on it
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   828
    (@{text "count_eq_dependents"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   829
    @{thm [display] count_eq_dependents}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   830
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   831
  *}
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   832
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   833
section {* Key properties \label{extension} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   834
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   835
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   836
context extend_highest_gen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   837
begin
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   838
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   839
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   840
text {*
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   841
  The essential of {\em Priority Inheritance} is to avoid indefinite priority inversion. For this 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   842
  purpose, we need to investigate what happens after one thread takes the highest precedence. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   843
  A locale is used to describe such a situation, which assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   844
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   845
  \item @{term "s"} is a valid state (@{text "vt_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   846
    @{thm  vt_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   847
  \item @{term "th"} is a living thread in @{term "s"} (@{text "threads_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   848
    @{thm threads_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   849
  \item @{term "th"} has the highest precedence in @{term "s"} (@{text "highest"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   850
    @{thm highest}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   851
  \item The precedence of @{term "th"} is @{term "Prc prio tm"} (@{text "preced_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   852
    @{thm preced_th}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   853
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   854
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   855
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   856
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   857
  Under these assumptions, some basic priority can be derived for @{term "th"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   858
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   859
  \item The current precedence of @{term "th"} equals its own precedence (@{text "eq_cp_s_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   860
    @{thm [display] eq_cp_s_th}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   861
  \item The current precedence of @{term "th"} is the highest precedence in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   862
    the system (@{text "highest_cp_preced"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   863
    @{thm [display] highest_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   864
  \item The precedence of @{term "th"} is the highest precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   865
    in the system (@{text "highest_preced_thread"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   866
    @{thm [display] highest_preced_thread}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   867
  \item The current precedence of @{term "th"} is the highest current precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   868
    in the system (@{text "highest'"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   869
    @{thm [display] highest'}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   870
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   871
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   872
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   873
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   874
  To analysis what happens after state @{term "s"} a sub-locale is defined, which 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   875
  assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   876
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   877
  \item @{term "t"} is a valid extension of @{term "s"} (@{text "vt_t"}): @{thm vt_t}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   878
  \item Any thread created in @{term "t"} has priority no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   879
    its precedence can not be higher than @{term "th"},  therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   880
    @{term "th"} remain to be the one with the highest precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   881
    (@{text "create_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   882
    @{thm [display] create_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   883
  \item Any adjustment of priority in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   884
    @{term "t"} does not happen to @{term "th"} and 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   885
    the priority set is no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   886
    @{term "th"} remain to be the one with the highest precedence (@{text "set_diff_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   887
    @{thm [display] set_diff_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   888
  \item Since we are investigating what happens to @{term "th"}, it is assumed 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   889
    @{term "th"} does not exit during @{term "t"} (@{text "exit_diff"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   890
    @{thm [display] exit_diff}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   891
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   892
*}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   893
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   894
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   895
  All these assumptions are put into a predicate @{term "extend_highest_gen"}. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   896
  It can be proved that @{term "extend_highest_gen"} holds 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   897
  for any moment @{text "i"} in it @{term "t"} (@{text "red_moment"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   898
  @{thm [display] red_moment}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   899
  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   900
  From this, an induction principle can be derived for @{text "t"}, so that 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   901
  properties already derived for @{term "t"} can be applied to any prefix 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   902
  of @{text "t"} in the proof of new properties 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   903
  about @{term "t"} (@{text "ind"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   904
  \begin{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   905
  @{thm[display] ind}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   906
  \end{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   907
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   908
  The following properties can be proved about @{term "th"} in @{term "t"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   909
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   910
  \item In @{term "t"}, thread @{term "th"} is kept live and its 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   911
    precedence is preserved as well
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   912
    (@{text "th_kept"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   913
    @{thm [display] th_kept}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   914
  \item In @{term "t"}, thread @{term "th"}'s precedence is always the maximum among 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   915
    all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   916
    (@{text "max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   917
    @{thm [display] max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   918
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   919
    among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   920
    (@{text "th_cp_max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   921
    @{thm [display] th_cp_max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   922
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum current 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   923
    precedence among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   924
    (@{text "th_cp_max"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   925
    @{thm [display] th_cp_max}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   926
  \item In @{term "t"}, thread @{term "th"}'s current precedence equals its precedence at moment 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   927
    @{term "s"}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   928
    (@{text "th_cp_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   929
    @{thm [display] th_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   930
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   931
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   932
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   933
text {* \noindent
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   934
  The main theorem of this part is to characterizing the running thread during @{term "t"} 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   935
  (@{text "runing_inversion_2"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   936
  @{thm [display] runing_inversion_2}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   937
  According to this, if a thread is running, it is either @{term "th"} or was
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   938
  already live and held some resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   939
  at moment @{text "s"} (expressed by: @{text "cntV s th' < cntP s th'"}).
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   940
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   941
  Since there are only finite many threads live and holding some resource at any moment,
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   942
  if every such thread can release all its resources in finite duration, then after finite
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   943
  duration, none of them may block @{term "th"} anymore. So, no priority inversion may happen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   944
  then.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   945
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   946
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   947
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   948
end
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   949
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   950
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   951
section {* Properties to guide implementation \label{implement} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   952
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   953
text {*
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   954
  The properties (especially @{text "runing_inversion_2"}) convinced us that the model defined 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   955
  in Section \ref{model} does prevent indefinite priority inversion and therefore fulfills 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   956
  the fundamental requirement of Priority Inheritance protocol. Another purpose of this paper 
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   957
  is to show how this model can be used to guide a concrete implementation. As discussed in
276
a821434474c9 more on intro
urbanc
parents: 275
diff changeset
   958
  Section 5.6.5 of \cite{Vahalia96}, the implementation of Priority Inheritance in Solaris 
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   959
  uses sophisticated linking data structure. Except discussing two scenarios to show how
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   960
  the data structure should be manipulated, a lot of details of the implementation are missing. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   961
  In \cite{Faria08,conf/fase/JahierHR09,WellingsBSB07} the protocol is described formally 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   962
  using different notations, but little information is given on how this protocol can be 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   963
  implemented efficiently, especially there is no information on how these data structure 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   964
  should be manipulated. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   965
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   966
  Because the scheduling of threads is based on current precedence, 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   967
  the central issue in implementation of Priority Inheritance is how to compute the precedence
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   968
  correctly and efficiently. As long as the precedence is correct, it is very easy to 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   969
  modify the scheduling algorithm to select the correct thread to execute. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   970
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   971
  First, it can be proved that the computation of current precedence @{term "cp"} of a threads
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   972
  only involves its children (@{text "cp_rec"}):
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   973
  @{thm [display] cp_rec} 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   974
  where @{term "children s th"} represents the set of children of @{term "th"} in the current
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   975
  RAG: 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   976
  \[
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   977
  @{thm (lhs) children_def} @{text "\<equiv>"} @{thm (rhs) children_def}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   978
  \]
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   979
  where the definition of @{term "child"} is: 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   980
  \[ @{thm (lhs) child_def} @{text "\<equiv>"}  @{thm (rhs) child_def}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   981
  \]
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   982
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   983
  The aim of this section is to fill the missing details of how current precedence should
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   984
  be changed with the happening of events, with each event type treated by one subsection,
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   985
  where the computation of @{term "cp"} uses lemma @{text "cp_rec"}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   986
  *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   987
 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   988
subsection {* Event @{text "Set th prio"} *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   989
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   990
(*<*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   991
context step_set_cps
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   992
begin
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   993
(*>*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   994
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   995
text {*
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   996
  The context under which event @{text "Set th prio"} happens is formalized as follows:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   997
  \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   998
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   999
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1000
      event @{text "Set th prio"} is eligible to happen under state @{term "s'"} and
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1001
      state @{term "s'"} is a valid state.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1002
  \end{enumerate}
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1003
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1004
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1005
text {* \noindent
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1006
  Under such a context, we investigated how the current precedence @{term "cp"} of 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1007
  threads change from state @{term "s'"} to @{term "s"} and obtained the following
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1008
  conclusions:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1009
  \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1010
  %% \item The RAG does not change (@{text "eq_dep"}): @{thm "eq_dep"}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1011
  \item All threads with no dependence relation with thread @{term "th"} have their
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1012
    @{term "cp"}-value unchanged (@{text "eq_cp"}):
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1013
    @{thm [display] eq_cp}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1014
    This lemma implies the @{term "cp"}-value of @{term "th"}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1015
    and those threads which have a dependence relation with @{term "th"} might need
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1016
    to be recomputed. The way to do this is to start from @{term "th"} 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1017
    and follow the @{term "depend"}-chain to recompute the @{term "cp"}-value of every 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1018
    encountered thread using lemma @{text "cp_rec"}. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1019
    Since the @{term "depend"}-relation is loop free, this procedure 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1020
    can always stop. The the following lemma shows this procedure actually could stop earlier.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1021
  \item The following two lemma shows, if a thread the re-computation of which
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1022
    gives an unchanged @{term "cp"}-value, the procedure described above can stop. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1023
    \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1024
      \item Lemma @{text "eq_up_self"} shows if the re-computation of
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1025
        @{term "th"}'s @{term "cp"} gives the same result, the procedure can stop:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1026
        @{thm [display] eq_up_self}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1027
      \item Lemma @{text "eq_up"}) shows if the re-computation at intermediate threads
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1028
        gives unchanged result, the procedure can stop:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1029
        @{thm [display] eq_up}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1030
  \end{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1031
  \end{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1032
  *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1033
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1034
(*<*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1035
end
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1036
(*>*)
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1037
272
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1038
subsection {* Event @{text "V th cs"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1039
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1040
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1041
context step_v_cps_nt
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1042
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1043
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1044
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1045
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1046
  The context under which event @{text "V th cs"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1047
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1048
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1049
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1050
      event @{text "V th cs"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1051
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1052
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1053
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1054
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1055
text {* \noindent
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1056
  Under such a context, we investigated how the current precedence @{term "cp"} of 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1057
  threads change from state @{term "s'"} to @{term "s"}. 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1058
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1059
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1060
  Two subcases are considerted, 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1061
  where the first is that there exits @{term "th'"} 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1062
  such that 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1063
  @{thm [display] nt} 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1064
  holds, which means there exists a thread @{term "th'"} to take over
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1065
  the resource release by thread @{term "th"}. 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1066
  In this sub-case, the following results are obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1067
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1068
  \item The change of RAG is given by lemma @{text "depend_s"}: 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1069
  @{thm [display] "depend_s"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1070
  which shows two edges are removed while one is added. These changes imply how
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1071
  the current precedences should be re-computed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1072
  \item First all threads different from @{term "th"} and @{term "th'"} have their
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1073
  @{term "cp"}-value kept, therefore do not need a re-computation
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1074
  (@{text "cp_kept"}): @{thm [display] cp_kept}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1075
  This lemma also implies, only the @{term "cp"}-values of @{term "th"} and @{term "th'"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1076
  need to be recomputed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1077
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1078
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1079
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1080
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1081
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1082
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1083
context step_v_cps_nnt
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1084
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1085
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1086
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1087
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1088
  The other sub-case is when for all @{text "th'"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1089
  @{thm [display] nnt}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1090
  holds, no such thread exists. The following results can be obtained for this 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1091
  sub-case:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1092
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1093
  \item The change of RAG is given by lemma @{text "depend_s"}:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1094
  @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1095
  which means only one edge is removed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1096
  \item In this case, no re-computation is needed (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1097
  @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1098
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1099
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1100
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1101
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1102
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1103
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1104
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1105
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1106
subsection {* Event @{text "P th cs"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1107
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1108
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1109
context step_P_cps_e
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1110
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1111
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1112
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1113
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1114
  The context under which event @{text "P th cs"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1115
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1116
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1117
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1118
      event @{text "P th cs"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1119
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1120
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1121
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1122
  This case is further divided into two sub-cases. The first is when @{thm ee} holds.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1123
  The following results can be obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1124
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1125
  \item One edge is added to the RAG (@{text "depend_s"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1126
    @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1127
  \item No re-computation is needed (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1128
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1129
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1130
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1131
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1132
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1133
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1134
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1135
context step_P_cps_ne
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1136
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1137
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1138
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1139
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1140
  The second is when @{thm ne} holds.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1141
  The following results can be obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1142
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1143
  \item One edge is added to the RAG (@{text "depend_s"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1144
    @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1145
  \item Threads with no dependence relation with @{term "th"} do not need a re-computation
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1146
    of their @{term "cp"}-values (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1147
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1148
    This lemma implies all threads with a dependence relation with @{term "th"} may need 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1149
    re-computation.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1150
  \item Similar to the case of @{term "Set"}, the computation procedure could stop earlier
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1151
    (@{text "eq_up"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1152
    @{thm [display] eq_up}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1153
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1154
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1155
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1156
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1157
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1158
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1159
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1160
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1161
subsection {* Event @{text "Create th prio"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1162
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1163
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1164
context step_create_cps
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1165
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1166
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1167
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1168
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1169
  The context under which event @{text "Create th prio"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1170
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1171
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1172
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1173
      event @{text "Create th prio"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1174
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1175
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1176
  The following results can be obtained under this context:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1177
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1178
  \item The RAG does not change (@{text "eq_dep"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1179
    @{thm [display] eq_dep}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1180
  \item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1181
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1182
  \item The @{term "cp"}-value of @{term "th"} equals its precedence 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1183
    (@{text "eq_cp_th"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1184
    @{thm [display] eq_cp_th}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1185
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1186
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1187
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1188
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1189
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1190
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1191
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1192
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1193
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1194
subsection {* Event @{text "Exit th"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1195
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1196
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1197
context step_exit_cps
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1198
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1199
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1200
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1201
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1202
  The context under which event @{text "Exit th"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1203
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1204
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1205
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1206
      event @{text "Exit th"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1207
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1208
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1209
  The following results can be obtained under this context:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1210
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1211
  \item The RAG does not change (@{text "eq_dep"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1212
    @{thm [display] eq_dep}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1213
  \item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1214
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1215
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1216
  Since @{term th} does not live in state @{term "s"}, there is no need to compute 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1217
  its @{term cp}-value.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1218
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1219
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1220
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1221
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1222
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1223
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1224
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1225
section {* Related works \label{related} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1226
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1227
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1228
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1229
  \item {\em Integrating Priority Inheritance Algorithms in the Real-Time Specification for Java}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1230
    \cite{WellingsBSB07} models and verifies the combination of Priority Inheritance (PI) and 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1231
    Priority Ceiling Emulation (PCE) protocols in the setting of Java virtual machine 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1232
    using extended Timed Automata(TA) formalism of the UPPAAL tool. Although a detailed 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1233
    formal model of combined PI and PCE is given, the number of properties is quite 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1234
    small and the focus is put on the harmonious working of PI and PCE. Most key features of PI 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1235
    (as well as PCE) are not shown. Because of the limitation of the model checking technique
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1236
    used there, properties are shown only for a small number of scenarios. Therefore, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1237
    the verification does not show the correctness of the formal model itself in a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1238
    convincing way.  
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1239
  \item {\em Formal Development of Solutions for Real-Time Operating Systems with TLA+/TLC}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1240
    \cite{Faria08}. A formal model of PI is given in TLA+. Only 3 properties are shown 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1241
    for PI using model checking. The limitation of model checking is intrinsic to the work.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1242
  \item {\em Synchronous modeling and validation of priority inheritance schedulers}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1243
    \cite{conf/fase/JahierHR09}. Gives a formal model
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1244
    of PI and PCE in AADL (Architecture Analysis \& Design Language) and checked 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1245
    several properties using model checking. The number of properties shown there is 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1246
    less than here and the scale is also limited by the model checking technique. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1247
  \item {\em The Priority Ceiling Protocol: Formalization and Analysis Using PVS}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1248
    \cite{dutertre99b}. Formalized another protocol for Priority Inversion in the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1249
    interactive theorem proving system PVS.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1250
\end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1251
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1252
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1253
  There are several works on inversion avoidance:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1254
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1255
  \item {\em Solving the group priority inversion problem in a timed asynchronous system}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1256
    \cite{Wang:2002:SGP}. The notion of Group Priority Inversion is introduced. The main 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1257
    strategy is still inversion avoidance. The method is by reordering requests 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1258
    in the setting of Client-Server.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1259
  \item {\em A Formalization of Priority Inversion} \cite{journals/rts/BabaogluMS93}. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1260
    Formalized the notion of Priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1261
    Inversion and proposes methods to avoid it. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1262
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1263
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1264
  {\em Examples of inaccurate specification of the protocol ???}.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1265
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1266
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1267
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1268
section {* Conclusions \label{conclusion} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1269
286
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1270
text {*
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1271
  The work in this paper only deals with single CPU configurations. The
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1272
  "one CPU" assumption is essential for our formalisation, because the
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1273
  main lemma fails in multi-CPU configuration. The lemma says that any
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1274
  runing thead must be the one with the highest prioirty or already held
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1275
  some resource when the highest priority thread was initiated. When
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1276
  there are multiple CPUs, it may well be the case that a threads did
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1277
  not hold any resource when the highest priority thread was initiated,
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1278
  but that thread still runs after that moment on a separate CPU. In
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1279
  this way, the main lemma does not hold anymore.
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1280
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1281
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1282
  There are some works deals with priority inversion in multi-CPU
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1283
  configurations[???], but none of them have given a formal correctness
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1284
  proof. The extension of our formal proof to deal with multi-CPU
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1285
  configurations is not obvious. One possibility, as suggested in paper
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1286
  [???], is change our formal model (the defiintion of "schs") to give
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1287
  the released resource to the thread with the highest prioirty. In this
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1288
  way, indefinite prioirty inversion can be avoided, but for a quite
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1289
  different reason from the one formalized in this paper (because the
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1290
  "mail lemma" will be different). This means a formal correctness proof
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1291
  for milt-CPU configuration would be quite different from the one given
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1292
  in this paper. The solution of prioirty inversion problem in mult-CPU
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1293
  configurations is a different problem which needs different solutions
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1294
  which is outside the scope of this paper.
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1295
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1296
*}
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1297
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1298
(*<*)
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1299
end
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1300
(*>*)