| author | urbanc |
| Mon, 13 Feb 2012 10:57:47 +0000 | |
| changeset 311 | 23632f329e10 |
| parent 310 | 4d93486cb302 |
| child 312 | 09281ccb31bd |
| permissions | -rwxr-xr-x |
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(*<*) |
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theory Paper |
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imports "../CpsG" "../ExtGG" "~~/src/HOL/Library/LaTeXsugar" |
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begin |
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ML {*
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open Printer; |
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show_question_marks_default := false; |
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*} |
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notation (latex output) |
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Cons ("_::_" [78,77] 73) and
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vt ("valid'_state") and
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runing ("running") and
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birthtime ("last'_set") and
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If ("(\<^raw:\textrm{>if\<^raw:}> (_)/ \<^raw:\textrm{>then\<^raw:}> (_)/ \<^raw:\textrm{>else\<^raw:}> (_))" 10) and
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Prc ("'(_, _')") and
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holding ("holds") and
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waiting ("waits") and
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Th ("T") and
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Cs ("C") and
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readys ("ready") and
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depend ("RAG") and
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preced ("prec") and
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cpreced ("cprec") and
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dependents ("dependants") and
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cp ("cprec") and
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holdents ("resources") and
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original_priority ("priority") and
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DUMMY ("\<^raw:\mbox{$\_\!\_$}>")
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(*>*) |
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||
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section {* Introduction *}
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||
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text {*
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Many real-time systems need to support threads involving priorities and |
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locking of resources. Locking of resources ensures mutual exclusion |
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when accessing shared data or devices that cannot be |
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preempted. Priorities allow scheduling of threads that need to |
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finish their work within deadlines. Unfortunately, both features |
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can interact in subtle ways leading to a problem, called |
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\emph{Priority Inversion}. Suppose three threads having priorities
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$H$(igh), $M$(edium) and $L$(ow). We would expect that the thread |
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$H$ blocks any other thread with lower priority and itself cannot |
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be blocked by any thread with lower priority. Alas, in a naive |
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implementation of resource looking and priorities this property can |
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be violated. Even worse, $H$ can be delayed indefinitely by |
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threads with lower priorities. For this let $L$ be in the |
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possession of a lock for a resource that also $H$ needs. $H$ must |
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therefore wait for $L$ to exit the critical section and release this |
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lock. The problem is that $L$ might in turn be blocked by any |
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thread with priority $M$, and so $H$ sits there potentially waiting |
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indefinitely. Since $H$ is blocked by threads with lower |
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priorities, the problem is called Priority Inversion. It was first |
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described in \cite{Lampson80} in the context of the
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Mesa programming language designed for concurrent programming. |
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If the problem of Priority Inversion is ignored, real-time systems |
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can become unpredictable and resulting bugs can be hard to diagnose. |
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The classic example where this happened is the software that |
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controlled the Mars Pathfinder mission in 1997 \cite{Reeves98}.
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Once the spacecraft landed, the software shut down at irregular |
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intervals leading to loss of project time as normal operation of the |
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craft could only resume the next day (the mission and data already |
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collected were fortunately not lost, because of a clever system |
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design). The reason for the shutdowns was that the scheduling |
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software fell victim of Priority Inversion: a low priority thread |
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locking a resource prevented a high priority thread from running in |
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time leading to a system reset. Once the problem was found, it was |
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rectified by enabling the \emph{Priority Inheritance Protocol} (PIP)
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\cite{Sha90}\footnote{Sha et al.~call it the \emph{Basic Priority
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Inheritance Protocol} \cite{Sha90} and others sometimes also call it
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\emph{Priority Boosting}.} in the scheduling software.
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The idea behind PIP is to let the thread $L$ temporarily inherit |
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the high priority from $H$ until $L$ leaves the critical section |
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unlocking the resource. This solves the problem of $H$ having to |
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wait indefinitely, because $L$ cannot be blocked by threads having |
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priority $M$. While a few other solutions exist for the Priority |
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Inversion problem, PIP is one that is widely deployed and |
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implemented. This includes VxWorks (a proprietary real-time OS used |
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in the Mars Pathfinder mission, in Boeing's 787 Dreamliner, Honda's |
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ASIMO robot, etc.), but also the POSIX 1003.1c Standard realised for |
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example in libraries for FreeBSD, Solaris and Linux. |
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One advantage of PIP is that increasing the priority of a thread |
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can be dynamically calculated by the scheduler. This is in contrast |
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to, for example, \emph{Priority Ceiling} \cite{Sha90}, another
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solution to the Priority Inversion problem, which requires static |
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analysis of the program in order to prevent Priority |
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Inversion. However, there has also been strong criticism against |
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PIP. For instance, PIP cannot prevent deadlocks when lock |
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dependencies are circular, and also blocking times can be |
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substantial (more than just the duration of a critical section). |
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Though, most criticism against PIP centres around unreliable |
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implementations and PIP being too complicated and too inefficient. |
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For example, Yodaiken writes in \cite{Yodaiken02}:
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\begin{quote}
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\it{}``Priority inheritance is neither efficient nor reliable. Implementations
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are either incomplete (and unreliable) or surprisingly complex and intrusive.'' |
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\end{quote}
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\noindent |
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He suggests to avoid PIP altogether by not allowing critical |
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sections to be preempted. Unfortunately, this solution does not |
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help in real-time systems with hard deadlines for high-priority |
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threads. |
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In our opinion, there is clearly a need for investigating correct |
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algorithms for PIP. A few specifications for PIP exist (in English) |
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and also a few high-level descriptions of implementations (e.g.~in |
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the textbook \cite[Section 5.6.5]{Vahalia96}), but they help little
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with actual implementations. That this is a problem in practise is |
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proved by an email from Baker, who wrote on 13 July 2009 on the Linux |
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Kernel mailing list: |
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\begin{quote}
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\it{}``I observed in the kernel code (to my disgust), the Linux PIP
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implementation is a nightmare: extremely heavy weight, involving |
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maintenance of a full wait-for graph, and requiring updates for a |
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range of events, including priority changes and interruptions of |
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wait operations.'' |
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\end{quote}
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||
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\noindent |
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The criticism by Yodaiken, Baker and others suggests to us to look |
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again at PIP from a more abstract level (but still concrete enough |
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to inform an implementation), and makes PIP an ideal candidate for a |
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formal verification. One reason, of course, is that the original |
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presentation of PIP~\cite{Sha90}, despite being informally
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``proved'' correct, is actually \emph{flawed}.
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Yodaiken \cite{Yodaiken02} points to a subtlety that had been
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overlooked in the informal proof by Sha et al. They specify in |
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\cite{Sha90} that after the thread (whose priority has been raised)
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completes its critical section and releases the lock, it ``returns |
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to its original priority level.'' This leads them to believe that an |
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implementation of PIP is ``rather straightforward''~\cite{Sha90}.
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Unfortunately, as Yodaiken points out, this behaviour is too |
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simplistic. Consider the case where the low priority thread $L$ |
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locks \emph{two} resources, and two high-priority threads $H$ and
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$H'$ each wait for one of them. If $L$ releases one resource |
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so that $H$, say, can proceed, then we still have Priority Inversion |
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with $H'$ (which waits for the other resource). The correct |
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behaviour for $L$ is to revert to the highest remaining priority of |
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the threads that it blocks. The advantage of formalising the |
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correctness of a high-level specification of PIP in a theorem prover |
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is that such issues clearly show up and cannot be overlooked as in |
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informal reasoning (since we have to analyse all possible behaviours |
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of threads, i.e.~\emph{traces}, that could possibly happen).\medskip
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\noindent |
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{\bf Contributions:} There have been earlier formal investigations
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into PIP \cite{Faria08,Jahier09,Wellings07}, but they employ model
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checking techniques. This paper presents a formalised and |
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mechanically checked proof for the correctness of PIP (to our |
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knowledge the first one; the earlier informal proof by Sha et |
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al.~\cite{Sha90} is flawed). In contrast to model checking, our
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formalisation provides insight into why PIP is correct and allows us |
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to prove stronger properties that, as we will show, can inform an |
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implementation. For example, we found by ``playing'' with the formalisation |
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that the choice of the next thread to take over a lock when a |
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resource is released is irrelevant for PIP being correct. Something |
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which has not been mentioned in the relevant literature. |
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*} |
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section {* Formal Model of the Priority Inheritance Protocol *}
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text {*
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The Priority Inheritance Protocol, short PIP, is a scheduling |
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algorithm for a single-processor system.\footnote{We shall come back
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later to the case of PIP on multi-processor systems.} Our model of |
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PIP is based on Paulson's inductive approach to protocol |
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verification \cite{Paulson98}, where the \emph{state} of a system is
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given by a list of events that happened so far. \emph{Events} of PIP fall
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into five categories defined as the datatype: |
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\begin{isabelle}\ \ \ \ \ %%%
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\mbox{\begin{tabular}{r@ {\hspace{2mm}}c@ {\hspace{2mm}}l@ {\hspace{7mm}}l}
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\isacommand{datatype} event
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& @{text "="} & @{term "Create thread priority"}\\
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& @{text "|"} & @{term "Exit thread"} \\
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& @{text "|"} & @{term "Set thread priority"} & {\rm reset of the priority for} @{text thread}\\
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& @{text "|"} & @{term "P thread cs"} & {\rm request of resource} @{text "cs"} {\rm by} @{text "thread"}\\
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& @{text "|"} & @{term "V thread cs"} & {\rm release of resource} @{text "cs"} {\rm by} @{text "thread"}
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\end{tabular}}
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\end{isabelle}
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\noindent |
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whereby threads, priorities and (critical) resources are represented |
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as natural numbers. The event @{term Set} models the situation that
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a thread obtains a new priority given by the programmer or |
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user (for example via the {\tt nice} utility under UNIX). As in Paulson's work, we
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need to define functions that allow us to make some observations |
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about states. One, called @{term threads}, calculates the set of
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``live'' threads that we have seen so far: |
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\begin{isabelle}\ \ \ \ \ %%%
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\mbox{\begin{tabular}{lcl}
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@{thm (lhs) threads.simps(1)} & @{text "\<equiv>"} &
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@{thm (rhs) threads.simps(1)}\\
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@{thm (lhs) threads.simps(2)[where thread="th"]} & @{text "\<equiv>"} &
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@{thm (rhs) threads.simps(2)[where thread="th"]}\\
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@{thm (lhs) threads.simps(3)[where thread="th"]} & @{text "\<equiv>"} &
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@{thm (rhs) threads.simps(3)[where thread="th"]}\\
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@{term "threads (DUMMY#s)"} & @{text "\<equiv>"} & @{term "threads s"}\\
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\end{tabular}}
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\end{isabelle}
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\noindent |
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In this definition @{term "DUMMY # DUMMY"} stands for list-cons.
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Another function calculates the priority for a thread @{text "th"}, which is
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defined as |
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\begin{isabelle}\ \ \ \ \ %%%
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\mbox{\begin{tabular}{lcl}
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@{thm (lhs) original_priority.simps(1)[where thread="th"]} & @{text "\<equiv>"} &
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@{thm (rhs) original_priority.simps(1)[where thread="th"]}\\
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@{thm (lhs) original_priority.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} &
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@{thm (rhs) original_priority.simps(2)[where thread="th" and thread'="th'"]}\\
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@{thm (lhs) original_priority.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} &
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@{thm (rhs) original_priority.simps(3)[where thread="th" and thread'="th'"]}\\
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@{term "original_priority th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "original_priority th s"}\\
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\end{tabular}}
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\end{isabelle}
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\noindent |
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In this definition we set @{text 0} as the default priority for
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threads that have not (yet) been created. The last function we need |
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calculates the ``time'', or index, at which time a process had its |
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priority last set. |
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\begin{isabelle}\ \ \ \ \ %%%
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\mbox{\begin{tabular}{lcl}
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@{thm (lhs) birthtime.simps(1)[where thread="th"]} & @{text "\<equiv>"} &
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@{thm (rhs) birthtime.simps(1)[where thread="th"]}\\
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@{thm (lhs) birthtime.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} &
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@{thm (rhs) birthtime.simps(2)[where thread="th" and thread'="th'"]}\\
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@{thm (lhs) birthtime.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} &
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@{thm (rhs) birthtime.simps(3)[where thread="th" and thread'="th'"]}\\
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@{term "birthtime th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "birthtime th s"}\\
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\end{tabular}}
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\end{isabelle}
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\noindent |
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In this definition @{term "length s"} stands for the length of the list
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of events @{text s}. Again the default value in this function is @{text 0}
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for threads that have not been created yet. A \emph{precedence} of a thread @{text th} in a
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state @{text s} is the pair of natural numbers defined as
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\begin{isabelle}\ \ \ \ \ %%%
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@{thm preced_def[where thread="th"]}
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\end{isabelle}
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\noindent |
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The point of precedences is to schedule threads not according to priorities (because what should |
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we do in case two threads have the same priority), but according to precedences. |
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Precedences allow us to always discriminate between two threads with equal priority by |
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taking into account the time when the priority was last set. We order precedences so |
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that threads with the same priority get a higher precedence if their priority has been |
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set earlier, since for such threads it is more urgent to finish their work. In an implementation |
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this choice would translate to a quite natural FIFO-scheduling of processes with |
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the same priority. |
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Next, we introduce the concept of \emph{waiting queues}. They are
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lists of threads associated with every resource. The first thread in |
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this list (i.e.~the head, or short @{term hd}) is chosen to be the one
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that is in possession of the |
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``lock'' of the corresponding resource. We model waiting queues as |
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functions, below abbreviated as @{text wq}. They take a resource as
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argument and return a list of threads. This allows us to define |
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when a thread \emph{holds}, respectively \emph{waits} for, a
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resource @{text cs} given a waiting queue function @{text wq}.
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\begin{isabelle}\ \ \ \ \ %%%
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\begin{tabular}{@ {}l}
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@{thm cs_holding_def[where thread="th"]}\\
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@{thm cs_waiting_def[where thread="th"]}
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\end{tabular}
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\end{isabelle}
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\noindent |
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In this definition we assume @{text "set"} converts a list into a set.
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At the beginning, that is in the state where no thread is created yet, |
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the waiting queue function will be the function that returns the |
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empty list for every resource. |
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\begin{isabelle}\ \ \ \ \ %%%
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@{abbrev all_unlocked}\hfill\numbered{allunlocked}
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\end{isabelle}
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\noindent |
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Using @{term "holding"} and @{term waiting}, we can introduce \emph{Resource Allocation Graphs}
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(RAG), which represent the dependencies between threads and resources. |
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We represent RAGs as relations using pairs of the form |
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\begin{isabelle}\ \ \ \ \ %%%
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@{term "(Th th, Cs cs)"} \hspace{5mm}{\rm and}\hspace{5mm}
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@{term "(Cs cs, Th th)"}
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\end{isabelle}
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\noindent |
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where the first stands for a \emph{waiting edge} and the second for a
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\emph{holding edge} (@{term Cs} and @{term Th} are constructors of a
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datatype for vertices). Given a waiting queue function, a RAG is defined |
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as the union of the sets of waiting and holding edges, namely |
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\begin{isabelle}\ \ \ \ \ %%%
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@{thm cs_depend_def}
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\end{isabelle}
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\noindent |
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Given three threads and three resources, an instance of a RAG can be pictured |
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as follows: |
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\begin{center}
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\newcommand{\fnt}{\fontsize{7}{8}\selectfont}
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\begin{tikzpicture}[scale=1]
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%%\draw[step=2mm] (-3,2) grid (1,-1); |
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\node (A) at (0,0) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>0"}};
|
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\node (B) at (2,0) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>1"}};
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\node (C) at (4,0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>1"}};
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\node (D) at (4,-0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>2"}};
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\node (E) at (6,-0.7) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>2"}};
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\node (E1) at (6, 0.2) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>3"}};
|
| 297 | 327 |
\node (F) at (8,-0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>3"}};
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| 300 | 329 |
\draw [<-,line width=0.6mm] (A) to node [pos=0.54,sloped,above=-0.5mm] {\fnt{}holding} (B);
|
| 297 | 330 |
\draw [->,line width=0.6mm] (C) to node [pos=0.4,sloped,above=-0.5mm] {\fnt{}waiting} (B);
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\draw [->,line width=0.6mm] (D) to node [pos=0.4,sloped,below=-0.5mm] {\fnt{}waiting} (B);
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| 300 | 332 |
\draw [<-,line width=0.6mm] (D) to node [pos=0.54,sloped,below=-0.5mm] {\fnt{}holding} (E);
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\draw [<-,line width=0.6mm] (D) to node [pos=0.54,sloped,above=-0.5mm] {\fnt{}holding} (E1);
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\draw [->,line width=0.6mm] (F) to node [pos=0.45,sloped,below=-0.5mm] {\fnt{}waiting} (E);
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\end{tikzpicture}
|
| 290 | 336 |
\end{center}
|
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||
338 |
\noindent |
|
| 296 | 339 |
The use of relations for representing RAGs allows us to conveniently define |
| 306 | 340 |
the notion of the \emph{dependants} of a thread using the transitive closure
|
341 |
operation for relations. This gives |
|
| 290 | 342 |
|
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\begin{isabelle}\ \ \ \ \ %%%
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|
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@{thm cs_dependents_def}
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|
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\end{isabelle}
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|
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||
347 |
\noindent |
|
| 296 | 348 |
This definition needs to account for all threads that wait for a thread to |
| 290 | 349 |
release a resource. This means we need to include threads that transitively |
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wait for a resource being released (in the picture above this means the dependants |
| 306 | 351 |
of @{text "th\<^isub>0"} are @{text "th\<^isub>1"} and @{text "th\<^isub>2"}, which wait for resource @{text "cs\<^isub>1"},
|
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but also @{text "th\<^isub>3"},
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which cannot make any progress unless @{text "th\<^isub>2"} makes progress, which
|
| 306 | 354 |
in turn needs to wait for @{text "th\<^isub>0"} to finish). If there is a circle in a RAG, then clearly
|
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we have a deadlock. Therefore when a thread requests a resource, |
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we must ensure that the resulting RAG is not circular. |
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Next we introduce the notion of the \emph{current precedence} of a thread @{text th} in a
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state @{text s}. It is defined as
|
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\begin{isabelle}\ \ \ \ \ %%%
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| 299 | 362 |
@{thm cpreced_def2}\hfill\numbered{cpreced}
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\end{isabelle}
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\noindent |
| 306 | 366 |
where the dependants of @{text th} are given by the waiting queue function.
|
| 293 | 367 |
While the precedence @{term prec} of a thread is determined by the programmer
|
368 |
(for example when the thread is |
|
| 306 | 369 |
created), the point of the current precedence is to let the scheduler increase this |
370 |
precedence, if needed according to PIP. Therefore the current precedence of @{text th} is
|
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given as the maximum of the precedence @{text th} has in state @{text s} \emph{and} all
|
| 306 | 372 |
threads that are dependants of @{text th}. Since the notion @{term "dependants"} is
|
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defined as the transitive closure of all dependent threads, we deal correctly with the |
| 306 | 374 |
problem in the informal algorithm by Sha et al.~\cite{Sha90} where a priority of a thread is
|
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lowered prematurely. |
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The next function, called @{term schs}, defines the behaviour of the scheduler. It will be defined
|
| 306 | 378 |
by recursion on the state (a list of events); this function returns a \emph{schedule state}, which
|
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we represent as a record consisting of two |
| 296 | 380 |
functions: |
| 293 | 381 |
|
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\begin{isabelle}\ \ \ \ \ %%%
|
|
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@{text "\<lparr>wq_fun, cprec_fun\<rparr>"}
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|
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\end{isabelle}
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\noindent |
| 306 | 387 |
The first function is a waiting queue function (that is, it takes a resource @{text "cs"} and returns the
|
| 296 | 388 |
corresponding list of threads that wait for it), the second is a function that takes |
| 299 | 389 |
a thread and returns its current precedence (see \eqref{cpreced}). We assume the usual getter and
|
| 296 | 390 |
setter methods for such records. |
|
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|
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|
| 306 | 392 |
In the initial state, the scheduler starts with all resources unlocked (the corresponding |
393 |
function is defined in \eqref{allunlocked}) and the
|
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current precedence of every thread is initialised with @{term "Prc 0 0"}; that means
|
| 299 | 395 |
\mbox{@{abbrev initial_cprec}}. Therefore
|
| 306 | 396 |
we have for the initial state |
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\begin{isabelle}\ \ \ \ \ %%%
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\begin{tabular}{@ {}l}
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@{thm (lhs) schs.simps(1)} @{text "\<equiv>"}\\
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\hspace{5mm}@{term "(|wq_fun = all_unlocked, cprec_fun = (\<lambda>_::thread. Prc 0 0)|)"}
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\end{tabular}
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\end{isabelle}
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|
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\noindent |
| 296 | 406 |
The cases for @{term Create}, @{term Exit} and @{term Set} are also straightforward:
|
407 |
we calculate the waiting queue function of the (previous) state @{text s};
|
|
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this waiting queue function @{text wq} is unchanged in the next schedule state---because
|
| 306 | 409 |
none of these events lock or release any resource; |
410 |
for calculating the next @{term "cprec_fun"}, we use @{text wq} and
|
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@{term cpreced}. This gives the following three clauses for @{term schs}:
|
| 290 | 412 |
|
413 |
\begin{isabelle}\ \ \ \ \ %%%
|
|
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\begin{tabular}{@ {}l}
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@{thm (lhs) schs.simps(2)} @{text "\<equiv>"}\\
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\hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
|
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\hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Create th prio # s)|)"}\smallskip\\
|
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@{thm (lhs) schs.simps(3)} @{text "\<equiv>"}\\
|
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\hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
|
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\hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Exit th # s)|)"}\smallskip\\
|
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@{thm (lhs) schs.simps(4)} @{text "\<equiv>"}\\
|
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\hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
|
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\hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Set th prio # s)|)"}
|
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\end{tabular}
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425 |
\end{isabelle}
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|
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|
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\noindent |
| 306 | 428 |
More interesting are the cases where a resource, say @{text cs}, is locked or released. In these cases
|
| 300 | 429 |
we need to calculate a new waiting queue function. For the event @{term "P th cs"}, we have to update
|
| 306 | 430 |
the function so that the new thread list for @{text cs} is the old thread list plus the thread @{text th}
|
| 300 | 431 |
appended to the end of that list (remember the head of this list is seen to be in the possession of this |
| 306 | 432 |
resource). This gives the clause |
|
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|
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|
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\begin{isabelle}\ \ \ \ \ %%%
|
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\begin{tabular}{@ {}l}
|
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@{thm (lhs) schs.simps(5)} @{text "\<equiv>"}\\
|
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\hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
|
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\hspace{5mm}@{text "let"} @{text "new_wq = wq(cs := (wq cs @ [th]))"} @{text "in"}\\
|
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439 |
\hspace{8mm}@{term "(|wq_fun = new_wq, cprec_fun = cpreced new_wq (P th cs # s)|)"}
|
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440 |
\end{tabular}
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\end{isabelle}
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|
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|
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\noindent |
| 300 | 444 |
The clause for event @{term "V th cs"} is similar, except that we need to update the waiting queue function
|
| 301 | 445 |
so that the thread that possessed the lock is deleted from the corresponding thread list. For this |
446 |
list transformation, we use |
|
| 296 | 447 |
the auxiliary function @{term release}. A simple version of @{term release} would
|
| 306 | 448 |
just delete this thread and return the remaining threads, namely |
|
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450 |
\begin{isabelle}\ \ \ \ \ %%%
|
| 296 | 451 |
\begin{tabular}{@ {}lcl}
|
452 |
@{term "release []"} & @{text "\<equiv>"} & @{term "[]"}\\
|
|
453 |
@{term "release (DUMMY # qs)"} & @{text "\<equiv>"} & @{term "qs"}\\
|
|
454 |
\end{tabular}
|
|
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\end{isabelle}
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|
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|
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\noindent |
| 300 | 458 |
In practice, however, often the thread with the highest precedence in the list will get the |
| 296 | 459 |
lock next. We have implemented this choice, but later found out that the choice |
| 300 | 460 |
of which thread is chosen next is actually irrelevant for the correctness of PIP. |
| 296 | 461 |
Therefore we prove the stronger result where @{term release} is defined as
|
462 |
||
463 |
\begin{isabelle}\ \ \ \ \ %%%
|
|
464 |
\begin{tabular}{@ {}lcl}
|
|
465 |
@{term "release []"} & @{text "\<equiv>"} & @{term "[]"}\\
|
|
466 |
@{term "release (DUMMY # qs)"} & @{text "\<equiv>"} & @{term "SOME qs'. distinct qs' \<and> set qs' = set qs"}\\
|
|
467 |
\end{tabular}
|
|
468 |
\end{isabelle}
|
|
469 |
||
470 |
\noindent |
|
| 306 | 471 |
where @{text "SOME"} stands for Hilbert's epsilon and implements an arbitrary
|
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choice for the next waiting list. It just has to be a list of distinctive threads and |
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contain the same elements as @{text "qs"}. This gives for @{term V} the clause:
|
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\begin{isabelle}\ \ \ \ \ %%%
|
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\begin{tabular}{@ {}l}
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@{thm (lhs) schs.simps(6)} @{text "\<equiv>"}\\
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urbanc
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|
478 |
\hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
|
|
291
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diff
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|
479 |
\hspace{5mm}@{text "let"} @{text "new_wq = release (wq cs)"} @{text "in"}\\
|
|
294
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urbanc
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diff
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|
480 |
\hspace{8mm}@{term "(|wq_fun = new_wq, cprec_fun = cpreced new_wq (V th cs # s)|)"}
|
|
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|
481 |
\end{tabular}
|
| 290 | 482 |
\end{isabelle}
|
483 |
||
| 300 | 484 |
Having the scheduler function @{term schs} at our disposal, we can ``lift'', or
|
485 |
overload, the notions |
|
486 |
@{term waiting}, @{term holding}, @{term depend} and @{term cp} to operate on states only.
|
|
| 286 | 487 |
|
488 |
\begin{isabelle}\ \ \ \ \ %%%
|
|
|
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|
489 |
\begin{tabular}{@ {}rcl}
|
|
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|
490 |
@{thm (lhs) s_holding_abv} & @{text "\<equiv>"} & @{thm (rhs) s_holding_abv}\\
|
|
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|
491 |
@{thm (lhs) s_waiting_abv} & @{text "\<equiv>"} & @{thm (rhs) s_waiting_abv}\\
|
|
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|
492 |
@{thm (lhs) s_depend_abv} & @{text "\<equiv>"} & @{thm (rhs) s_depend_abv}\\
|
|
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|
493 |
@{thm (lhs) cp_def} & @{text "\<equiv>"} & @{thm (rhs) cp_def}
|
| 287 | 494 |
\end{tabular}
|
495 |
\end{isabelle}
|
|
496 |
||
|
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|
497 |
\noindent |
| 300 | 498 |
With these abbreviations we can introduce |
499 |
the notion of threads being @{term readys} in a state (i.e.~threads
|
|
|
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|
500 |
that do not wait for any resource) and the running thread. |
|
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|
501 |
|
| 287 | 502 |
\begin{isabelle}\ \ \ \ \ %%%
|
503 |
\begin{tabular}{@ {}l}
|
|
504 |
@{thm readys_def}\\
|
|
505 |
@{thm runing_def}\\
|
|
| 286 | 506 |
\end{tabular}
|
507 |
\end{isabelle}
|
|
| 284 | 508 |
|
|
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|
509 |
\noindent |
| 306 | 510 |
In this definition @{term "DUMMY ` DUMMY"} stands for the image of a set under a function.
|
511 |
Note that in the initial state, that is where the list of events is empty, the set |
|
| 309 | 512 |
@{term threads} is empty and therefore there is neither a thread ready nor running.
|
|
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|
513 |
If there is one or more threads ready, then there can only be \emph{one} thread
|
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|
514 |
running, namely the one whose current precedence is equal to the maximum of all ready |
| 304 | 515 |
threads. We use the set-comprehension to capture both possibilities. |
| 306 | 516 |
We can now also conveniently define the set of resources that are locked by a thread in a |
|
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|
517 |
given state. |
| 284 | 518 |
|
|
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|
519 |
\begin{isabelle}\ \ \ \ \ %%%
|
|
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|
520 |
@{thm holdents_def}
|
|
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|
521 |
\end{isabelle}
|
| 284 | 522 |
|
| 306 | 523 |
Finally we can define what a \emph{valid state} is in our model of PIP. For
|
| 304 | 524 |
example we cannot expect to be able to exit a thread, if it was not |
| 306 | 525 |
created yet. These validity constraints on states are characterised by the |
526 |
inductive predicate @{term "step"} and @{term vt}. We first give five inference rules
|
|
527 |
for @{term step} relating a state and an event that can happen next.
|
|
| 284 | 528 |
|
529 |
\begin{center}
|
|
530 |
\begin{tabular}{c}
|
|
531 |
@{thm[mode=Rule] thread_create[where thread=th]}\hspace{1cm}
|
|
|
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|
532 |
@{thm[mode=Rule] thread_exit[where thread=th]}
|
|
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|
533 |
\end{tabular}
|
|
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|
534 |
\end{center}
|
|
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changeset
|
535 |
|
|
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|
536 |
\noindent |
|
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|
537 |
The first rule states that a thread can only be created, if it does not yet exists. |
|
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|
538 |
Similarly, the second rule states that a thread can only be terminated if it was |
| 306 | 539 |
running and does not lock any resources anymore (this simplifies slightly our model; |
540 |
in practice we would expect the operating system releases all held lock of a |
|
541 |
thread that is about to exit). The event @{text Set} can happen
|
|
|
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|
542 |
if the corresponding thread is running. |
| 284 | 543 |
|
|
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|
544 |
\begin{center}
|
|
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|
545 |
@{thm[mode=Rule] thread_set[where thread=th]}
|
|
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changeset
|
546 |
\end{center}
|
|
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changeset
|
547 |
|
|
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|
548 |
\noindent |
| 301 | 549 |
If a thread wants to lock a resource, then the thread needs to be |
550 |
running and also we have to make sure that the resource lock does |
|
551 |
not lead to a cycle in the RAG. In practice, ensuring the latter is |
|
| 306 | 552 |
of course the responsibility of the programmer. In our formal |
| 310 | 553 |
model we just exclude such problematic cases in order to be able to make |
| 301 | 554 |
some meaningful statements about PIP.\footnote{This situation is
|
| 310 | 555 |
similar to the infamous occurs check in Prolog: In order to say |
| 306 | 556 |
anything meaningful about unification, one needs to perform an occurs |
| 310 | 557 |
check. But in practice the occurs check is ommited and the |
| 306 | 558 |
responsibility for avoiding problems rests with the programmer.} |
559 |
||
560 |
\begin{center}
|
|
561 |
@{thm[mode=Rule] thread_P[where thread=th]}
|
|
562 |
\end{center}
|
|
563 |
||
564 |
\noindent |
|
| 301 | 565 |
Similarly, if a thread wants to release a lock on a resource, then |
566 |
it must be running and in the possession of that lock. This is |
|
| 306 | 567 |
formally given by the last inference rule of @{term step}.
|
568 |
||
|
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|
569 |
\begin{center}
|
| 306 | 570 |
@{thm[mode=Rule] thread_V[where thread=th]}
|
| 284 | 571 |
\end{center}
|
| 306 | 572 |
|
|
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|
573 |
\noindent |
|
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|
574 |
A valid state of PIP can then be conveniently be defined as follows: |
| 284 | 575 |
|
576 |
\begin{center}
|
|
577 |
\begin{tabular}{c}
|
|
|
298
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|
578 |
@{thm[mode=Axiom] vt_nil}\hspace{1cm}
|
|
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|
579 |
@{thm[mode=Rule] vt_cons}
|
| 284 | 580 |
\end{tabular}
|
581 |
\end{center}
|
|
582 |
||
|
298
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|
583 |
\noindent |
|
f2e0d031a395
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|
584 |
This completes our formal model of PIP. In the next section we present |
| 309 | 585 |
properties that show our model of PIP is correct. |
|
298
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|
586 |
*} |
| 274 | 587 |
|
| 310 | 588 |
section {* The Correctness Proof *}
|
|
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|
589 |
|
| 301 | 590 |
(*<*) |
591 |
context extend_highest_gen |
|
592 |
begin |
|
593 |
print_locale extend_highest_gen |
|
594 |
thm extend_highest_gen_def |
|
595 |
thm extend_highest_gen_axioms_def |
|
596 |
thm highest_gen_def |
|
| 307 | 597 |
(*>*) |
| 301 | 598 |
text {*
|
| 310 | 599 |
Sha et al.~\cite[Theorem 6]{Sha90} state their correctness criterion for PIP in terms
|
| 307 | 600 |
of the number of critical resources: if there are @{text m} critical
|
601 |
resources, then a blocked job can only be blocked @{text m} times---that is
|
|
602 |
a bounded number of times. |
|
| 309 | 603 |
For their version of PIP, this property is \emph{not} true (as pointed out by
|
| 307 | 604 |
Yodaiken \cite{Yodaiken02}) as a high-priority thread can be
|
605 |
blocked an unbounded number of times by creating medium-priority |
|
| 310 | 606 |
threads that block a thread, which in turn locks a critical resource and has |
607 |
too low priority to make progress. In the way we have set up our formal model of PIP, |
|
| 307 | 608 |
their proof idea, even when fixed, does not seem to go through. |
609 |
||
610 |
The idea behind our correctness criterion of PIP is as follows: for all states |
|
611 |
@{text s}, we know the corresponding thread @{text th} with the highest precedence;
|
|
612 |
we show that in every future state (denoted by @{text "s' @ s"}) in which
|
|
| 310 | 613 |
@{text th} is still alive, either @{text th} is running or it is blocked by a
|
614 |
thread that was alive in the state @{text s}. Since in @{text s}, as in every
|
|
615 |
state, the set of alive threads is finite, @{text th} can only be blocked a
|
|
616 |
finite number of times. We will actually prove a stricter bound below. However, |
|
617 |
this correctness criterion hinges upon a number of assumptions about the states |
|
| 307 | 618 |
@{text s} and @{text "s' @ s"}, the thread @{text th} and the events happening
|
| 310 | 619 |
in @{text s'}. We list them next:
|
| 307 | 620 |
|
621 |
\begin{quote}
|
|
622 |
{\bf Assumptions on the states @{text s} and @{text "s' @ s"}:} In order to make
|
|
623 |
any meaningful statement, we need to require that @{text "s"} and
|
|
624 |
@{text "s' @ s"} are valid states, namely
|
|
625 |
\begin{isabelle}\ \ \ \ \ %%%
|
|
626 |
\begin{tabular}{l}
|
|
627 |
@{term "vt s"}\\
|
|
628 |
@{term "vt (s' @ s)"}
|
|
629 |
\end{tabular}
|
|
630 |
\end{isabelle}
|
|
631 |
\end{quote}
|
|
| 301 | 632 |
|
| 307 | 633 |
\begin{quote}
|
| 310 | 634 |
{\bf Assumptions on the thread @{text "th"}:} The thread @{text th} must be alive in @{text s} and
|
635 |
has the highest precedence of all alive threads in @{text s}. Furthermore the
|
|
636 |
priority of @{text th} is @{text prio} (we need this in the next assumptions).
|
|
| 307 | 637 |
\begin{isabelle}\ \ \ \ \ %%%
|
638 |
\begin{tabular}{l}
|
|
639 |
@{term "th \<in> threads s"}\\
|
|
640 |
@{term "prec th s = Max (cprec s ` threads s)"}\\
|
|
641 |
@{term "prec th s = (prio, DUMMY)"}
|
|
642 |
\end{tabular}
|
|
643 |
\end{isabelle}
|
|
644 |
\end{quote}
|
|
645 |
||
646 |
\begin{quote}
|
|
647 |
{\bf Assumptions on the events in @{text "s'"}:} We want to prove that @{text th} cannot
|
|
| 309 | 648 |
be blocked indefinitely. Of course this can happen if threads with higher priority |
649 |
than @{text th} are continously created in @{text s'}. Therefore we have to assume that
|
|
650 |
events in @{text s'} can only create (respectively set) threads with equal or lower
|
|
| 310 | 651 |
priority than @{text prio} of @{text th}. We also need to assume that the
|
652 |
priority of @{text "th"} does not get reset and also that @{text th} does
|
|
653 |
not get ``exited'' in @{text "s'"}. This can be ensured by assuming the following three implications.
|
|
| 307 | 654 |
\begin{isabelle}\ \ \ \ \ %%%
|
655 |
\begin{tabular}{l}
|
|
| 310 | 656 |
{If}~~@{text "Create th' prio' \<in> set s'"}~~{then}~~@{text "prio' \<le> prio"}\\
|
| 307 | 657 |
{If}~~@{text "Set th' prio' \<in> set s'"}~~{then}~~@{text "th' \<noteq> th"}~~{and}~~@{text "prio' \<le> prio"}\\
|
658 |
{If}~~@{text "Exit th' \<in> set s'"}~~{then}~~@{text "th' \<noteq> th"}\\
|
|
659 |
\end{tabular}
|
|
660 |
\end{isabelle}
|
|
661 |
\end{quote}
|
|
| 301 | 662 |
|
| 307 | 663 |
\noindent |
| 310 | 664 |
Under these assumptions we will prove the following correctness property: |
| 307 | 665 |
|
| 308 | 666 |
\begin{theorem}\label{mainthm}
|
| 307 | 667 |
Given the assumptions about states @{text "s"} and @{text "s' @ s"},
|
| 308 | 668 |
the thread @{text th} and the events in @{text "s'"},
|
669 |
if @{term "th' \<in> running (s' @ s)"} and @{text "th' \<noteq> th"} then
|
|
670 |
@{text "th' \<in> threads s"}.
|
|
| 307 | 671 |
\end{theorem}
|
| 301 | 672 |
|
| 308 | 673 |
\noindent |
674 |
This theorem ensures that the thread @{text th}, which has the highest
|
|
675 |
precedence in the state @{text s}, can only be blocked in the state @{text "s' @ s"}
|
|
676 |
by a thread @{text th'} that already existed in @{text s}. As we shall see shortly,
|
|
677 |
that means by only finitely many threads. Consequently, indefinite wait of |
|
| 310 | 678 |
@{text th}---which would be Priority Inversion---cannot occur.
|
| 309 | 679 |
|
680 |
In what follows we will describe properties of PIP that allow us to prove |
|
681 |
Theorem~\ref{mainthm}. It is relatively easily to see that
|
|
682 |
||
683 |
\begin{isabelle}\ \ \ \ \ %%%
|
|
684 |
\begin{tabular}{@ {}l}
|
|
685 |
@{text "running s \<subseteq> ready s \<subseteq> threads s"}\\
|
|
686 |
@{thm[mode=IfThen] finite_threads}
|
|
687 |
\end{tabular}
|
|
688 |
\end{isabelle}
|
|
689 |
||
690 |
\noindent |
|
691 |
where the second property is by induction of @{term vt}. The next three
|
|
692 |
properties are |
|
| 308 | 693 |
|
| 309 | 694 |
\begin{isabelle}\ \ \ \ \ %%%
|
695 |
\begin{tabular}{@ {}l}
|
|
696 |
@{thm[mode=IfThen] waiting_unique[of _ _ "cs\<^isub>1" "cs\<^isub>2"]}\\
|
|
697 |
@{thm[mode=IfThen] held_unique[of _ "th\<^isub>1" _ "th\<^isub>2"]}\\
|
|
698 |
@{thm[mode=IfThen] runing_unique[of _ "th\<^isub>1" "th\<^isub>2"]}
|
|
699 |
\end{tabular}
|
|
700 |
\end{isabelle}
|
|
| 308 | 701 |
|
| 309 | 702 |
\noindent |
703 |
The first one states that every waiting thread can only wait for a single |
|
| 310 | 704 |
resource (because it gets suspended after requesting that resource and having |
705 |
to wait for it); the second that every resource can only be held by a single thread; |
|
706 |
the third property establishes that in every given valid state, there is |
|
707 |
at most one running thread. We can also show the following properties |
|
708 |
about the RAG in @{text "s"}.
|
|
709 |
||
710 |
\begin{isabelle}\ \ \ \ \ %%%
|
|
711 |
\begin{tabular}{@ {}l}
|
|
712 |
%@{thm[mode=IfThen] }\\
|
|
713 |
%@{thm[mode=IfThen] }\\
|
|
714 |
%@{thm[mode=IfThen] }
|
|
715 |
\end{tabular}
|
|
716 |
\end{isabelle}
|
|
| 309 | 717 |
|
718 |
TODO |
|
719 |
||
720 |
\noindent |
|
| 308 | 721 |
The following lemmas show how RAG is changed with the execution of events: |
722 |
\begin{enumerate}
|
|
723 |
\item Execution of @{term "Set"} does not change RAG (@{text "depend_set_unchanged"}):
|
|
724 |
@{thm[display] depend_set_unchanged}
|
|
725 |
\item Execution of @{term "Create"} does not change RAG (@{text "depend_create_unchanged"}):
|
|
726 |
@{thm[display] depend_create_unchanged}
|
|
727 |
\item Execution of @{term "Exit"} does not change RAG (@{text "depend_exit_unchanged"}):
|
|
728 |
@{thm[display] depend_exit_unchanged}
|
|
729 |
\item Execution of @{term "P"} (@{text "step_depend_p"}):
|
|
730 |
@{thm[display] step_depend_p}
|
|
731 |
\item Execution of @{term "V"} (@{text "step_depend_v"}):
|
|
732 |
@{thm[display] step_depend_v}
|
|
733 |
\end{enumerate}
|
|
734 |
*} |
|
| 301 | 735 |
|
| 308 | 736 |
text {* \noindent
|
737 |
These properties are used to derive the following important results about RAG: |
|
738 |
\begin{enumerate}
|
|
739 |
\item RAG is loop free (@{text "acyclic_depend"}):
|
|
740 |
@{thm [display] acyclic_depend}
|
|
741 |
\item RAGs are finite (@{text "finite_depend"}):
|
|
742 |
@{thm [display] finite_depend}
|
|
743 |
\item Reverse paths in RAG are well founded (@{text "wf_dep_converse"}):
|
|
744 |
@{thm [display] wf_dep_converse}
|
|
745 |
\item The dependence relation represented by RAG has a tree structure (@{text "unique_depend"}):
|
|
746 |
@{thm [display] unique_depend[of _ _ "n\<^isub>1" "n\<^isub>2"]}
|
|
747 |
\item All threads in RAG are living threads |
|
748 |
(@{text "dm_depend_threads"} and @{text "range_in"}):
|
|
749 |
@{thm [display] dm_depend_threads range_in}
|
|
750 |
\end{enumerate}
|
|
751 |
*} |
|
752 |
||
753 |
text {* \noindent
|
|
754 |
The following lemmas show how every node in RAG can be chased to ready threads: |
|
755 |
\begin{enumerate}
|
|
756 |
\item Every node in RAG can be chased to a ready thread (@{text "chain_building"}):
|
|
757 |
@{thm [display] chain_building[rule_format]}
|
|
758 |
\item The ready thread chased to is unique (@{text "dchain_unique"}):
|
|
759 |
@{thm [display] dchain_unique[of _ _ "th\<^isub>1" "th\<^isub>2"]}
|
|
760 |
\end{enumerate}
|
|
761 |
*} |
|
| 301 | 762 |
|
| 308 | 763 |
text {* \noindent
|
764 |
Properties about @{term "next_th"}:
|
|
765 |
\begin{enumerate}
|
|
766 |
\item The thread taking over is different from the thread which is releasing |
|
767 |
(@{text "next_th_neq"}):
|
|
768 |
@{thm [display] next_th_neq}
|
|
769 |
\item The thread taking over is unique |
|
770 |
(@{text "next_th_unique"}):
|
|
771 |
@{thm [display] next_th_unique[of _ _ _ "th\<^isub>1" "th\<^isub>2"]}
|
|
772 |
\end{enumerate}
|
|
773 |
*} |
|
| 301 | 774 |
|
| 308 | 775 |
text {* \noindent
|
776 |
Some deeper results about the system: |
|
777 |
\begin{enumerate}
|
|
778 |
\item The maximum of @{term "cp"} and @{term "preced"} are equal (@{text "max_cp_eq"}):
|
|
779 |
@{thm [display] max_cp_eq}
|
|
780 |
\item There must be one ready thread having the max @{term "cp"}-value
|
|
781 |
(@{text "max_cp_readys_threads"}):
|
|
782 |
@{thm [display] max_cp_readys_threads}
|
|
783 |
\end{enumerate}
|
|
784 |
*} |
|
| 301 | 785 |
|
| 308 | 786 |
text {* \noindent
|
787 |
The relationship between the count of @{text "P"} and @{text "V"} and the number of
|
|
788 |
critical resources held by a thread is given as follows: |
|
789 |
\begin{enumerate}
|
|
790 |
\item The @{term "V"}-operation decreases the number of critical resources
|
|
791 |
one thread holds (@{text "cntCS_v_dec"})
|
|
792 |
@{thm [display] cntCS_v_dec}
|
|
793 |
\item The number of @{text "V"} never exceeds the number of @{text "P"}
|
|
794 |
(@{text "cnp_cnv_cncs"}):
|
|
795 |
@{thm [display] cnp_cnv_cncs}
|
|
796 |
\item The number of @{text "V"} equals the number of @{text "P"} when
|
|
797 |
the relevant thread is not living: |
|
798 |
(@{text "cnp_cnv_eq"}):
|
|
799 |
@{thm [display] cnp_cnv_eq}
|
|
800 |
\item When a thread is not living, it does not hold any critical resource |
|
801 |
(@{text "not_thread_holdents"}):
|
|
802 |
@{thm [display] not_thread_holdents}
|
|
803 |
\item When the number of @{text "P"} equals the number of @{text "V"}, the relevant
|
|
804 |
thread does not hold any critical resource, therefore no thread can depend on it |
|
805 |
(@{text "count_eq_dependents"}):
|
|
806 |
@{thm [display] count_eq_dependents}
|
|
807 |
\end{enumerate}
|
|
| 301 | 808 |
*} |
809 |
||
810 |
(*<*) |
|
811 |
end |
|
812 |
(*>*) |
|
|
298
f2e0d031a395
completed model section; vt has only state as argument
urbanc
parents:
297
diff
changeset
|
813 |
|
| 311 | 814 |
section {* Properties for an Implementation \label{implement}*}
|
815 |
||
816 |
text {*
|
|
817 |
The properties (centered around @{text "runing_inversion_2"} in particular)
|
|
818 |
convinced us that the formal model |
|
819 |
in Section \ref{model} does prevent indefinite priority inversion and therefore fulfills
|
|
820 |
the fundamental requirement of Priority Inheritance protocol. Another purpose of this paper |
|
821 |
is to show how this model can be used to guide a concrete implementation. |
|
822 |
||
823 |
The difficult part of implementation is the calculation of current precedence. |
|
824 |
Once current precedence is computed efficiently and correctly, |
|
825 |
the selection of the thread with highest precedence from ready threads is a |
|
826 |
standard scheduling mechanism implemented in most operating systems. |
|
827 |
||
828 |
Our implementation related formalization focuses on how to compute |
|
829 |
current precedence. First, it can be proved that the computation of current |
|
830 |
precedence @{term "cp"} of a threads
|
|
831 |
only involves its children (@{text "cp_rec"}):
|
|
832 |
@{thm [display] cp_rec}
|
|
833 |
where @{term "children s th"} represents the set of children of @{term "th"} in the current
|
|
834 |
RAG: |
|
835 |
\[ |
|
836 |
@{thm (lhs) children_def} @{text "\<equiv>"} @{thm (rhs) children_def}
|
|
837 |
\] |
|
838 |
where the definition of @{term "child"} is:
|
|
839 |
\[ @{thm (lhs) child_def} @{text "\<equiv>"} @{thm (rhs) child_def}
|
|
840 |
\] |
|
841 |
which corresponds a two hop link between threads in the RAG, with a resource in the middle. |
|
842 |
||
843 |
Lemma @{text "cp_rec"} means, the current precedence of threads can be computed locally,
|
|
844 |
i.e. the current precedence of one thread only needs to be recomputed when some of its |
|
845 |
children change their current precedence. |
|
846 |
||
847 |
Each of the following subsections discusses one event type, investigating |
|
848 |
which parts in the RAG need current precedence re-computation when that type of event |
|
849 |
happens. |
|
850 |
*} |
|
851 |
||
852 |
subsection {* Event @{text "Set th prio"} *}
|
|
853 |
||
854 |
(*<*) |
|
855 |
context step_set_cps |
|
856 |
begin |
|
857 |
(*>*) |
|
858 |
||
859 |
text {*
|
|
860 |
The context under which event @{text "Set th prio"} happens is formalized as follows:
|
|
861 |
\begin{enumerate}
|
|
862 |
\item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
|
|
863 |
\item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies
|
|
864 |
event @{text "Set th prio"} is eligible to happen under state @{term "s'"} and
|
|
865 |
state @{term "s'"} is a valid state.
|
|
866 |
\end{enumerate}
|
|
867 |
*} |
|
868 |
||
869 |
text {* \noindent
|
|
870 |
Under such a context, we investigated how the current precedence @{term "cp"} of
|
|
871 |
threads change from state @{term "s'"} to @{term "s"} and obtained the following
|
|
872 |
results: |
|
873 |
\begin{enumerate}
|
|
874 |
%% \item The RAG does not change (@{text "eq_dep"}): @{thm "eq_dep"}.
|
|
875 |
\item All threads with no dependence relation with thread @{term "th"} have their
|
|
876 |
@{term "cp"}-value unchanged (@{text "eq_cp"}):
|
|
877 |
@{thm [display] eq_cp}
|
|
878 |
This lemma implies the @{term "cp"}-value of @{term "th"}
|
|
879 |
and those threads which have a dependence relation with @{term "th"} might need
|
|
880 |
to be recomputed. The way to do this is to start from @{term "th"}
|
|
881 |
and follow the @{term "depend"}-chain to recompute the @{term "cp"}-value of every
|
|
882 |
encountered thread using lemma @{text "cp_rec"}.
|
|
883 |
Since the @{term "depend"}-relation is loop free, this procedure
|
|
884 |
can always stop. The the following lemma shows this procedure actually could stop earlier. |
|
885 |
\item The following two lemma shows, if a thread the re-computation of which |
|
886 |
gives an unchanged @{term "cp"}-value, the procedure described above can stop.
|
|
887 |
\begin{enumerate}
|
|
888 |
\item Lemma @{text "eq_up_self"} shows if the re-computation of
|
|
889 |
@{term "th"}'s @{term "cp"} gives the same result, the procedure can stop:
|
|
890 |
@{thm [display] eq_up_self}
|
|
891 |
\item Lemma @{text "eq_up"}) shows if the re-computation at intermediate threads
|
|
892 |
gives unchanged result, the procedure can stop: |
|
893 |
@{thm [display] eq_up}
|
|
894 |
\end{enumerate}
|
|
895 |
\end{enumerate}
|
|
896 |
*} |
|
897 |
||
898 |
(*<*) |
|
899 |
end |
|
900 |
(*>*) |
|
901 |
||
902 |
subsection {* Event @{text "V th cs"} *}
|
|
903 |
||
904 |
(*<*) |
|
905 |
context step_v_cps_nt |
|
906 |
begin |
|
907 |
(*>*) |
|
908 |
||
909 |
text {*
|
|
910 |
The context under which event @{text "V th cs"} happens is formalized as follows:
|
|
911 |
\begin{enumerate}
|
|
912 |
\item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
|
|
913 |
\item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies
|
|
914 |
event @{text "V th cs"} is eligible to happen under state @{term "s'"} and
|
|
915 |
state @{term "s'"} is a valid state.
|
|
916 |
\end{enumerate}
|
|
917 |
*} |
|
918 |
||
919 |
text {* \noindent
|
|
920 |
Under such a context, we investigated how the current precedence @{term "cp"} of
|
|
921 |
threads change from state @{term "s'"} to @{term "s"}.
|
|
922 |
||
923 |
||
924 |
Two subcases are considerted, |
|
925 |
where the first is that there exits @{term "th'"}
|
|
926 |
such that |
|
927 |
@{thm [display] nt}
|
|
928 |
holds, which means there exists a thread @{term "th'"} to take over
|
|
929 |
the resource release by thread @{term "th"}.
|
|
930 |
In this sub-case, the following results are obtained: |
|
931 |
\begin{enumerate}
|
|
932 |
\item The change of RAG is given by lemma @{text "depend_s"}:
|
|
933 |
@{thm [display] "depend_s"}
|
|
934 |
which shows two edges are removed while one is added. These changes imply how |
|
935 |
the current precedences should be re-computed. |
|
936 |
\item First all threads different from @{term "th"} and @{term "th'"} have their
|
|
937 |
@{term "cp"}-value kept, therefore do not need a re-computation
|
|
938 |
(@{text "cp_kept"}): @{thm [display] cp_kept}
|
|
939 |
This lemma also implies, only the @{term "cp"}-values of @{term "th"} and @{term "th'"}
|
|
940 |
need to be recomputed. |
|
941 |
\end{enumerate}
|
|
942 |
*} |
|
943 |
||
944 |
(*<*) |
|
945 |
end |
|
946 |
||
947 |
context step_v_cps_nnt |
|
948 |
begin |
|
949 |
(*>*) |
|
|
298
f2e0d031a395
completed model section; vt has only state as argument
urbanc
parents:
297
diff
changeset
|
950 |
|
| 311 | 951 |
text {*
|
952 |
The other sub-case is when for all @{text "th'"}
|
|
953 |
@{thm [display] nnt}
|
|
954 |
holds, no such thread exists. The following results can be obtained for this |
|
955 |
sub-case: |
|
956 |
\begin{enumerate}
|
|
957 |
\item The change of RAG is given by lemma @{text "depend_s"}:
|
|
958 |
@{thm [display] depend_s}
|
|
959 |
which means only one edge is removed. |
|
960 |
\item In this case, no re-computation is needed (@{text "eq_cp"}):
|
|
961 |
@{thm [display] eq_cp}
|
|
962 |
\end{enumerate}
|
|
963 |
*} |
|
964 |
||
965 |
(*<*) |
|
966 |
end |
|
967 |
(*>*) |
|
968 |
||
969 |
||
970 |
subsection {* Event @{text "P th cs"} *}
|
|
971 |
||
972 |
(*<*) |
|
973 |
context step_P_cps_e |
|
974 |
begin |
|
975 |
(*>*) |
|
976 |
||
977 |
text {*
|
|
978 |
The context under which event @{text "P th cs"} happens is formalized as follows:
|
|
979 |
\begin{enumerate}
|
|
980 |
\item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
|
|
981 |
\item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies
|
|
982 |
event @{text "P th cs"} is eligible to happen under state @{term "s'"} and
|
|
983 |
state @{term "s'"} is a valid state.
|
|
984 |
\end{enumerate}
|
|
985 |
||
986 |
This case is further divided into two sub-cases. The first is when @{thm ee} holds.
|
|
987 |
The following results can be obtained: |
|
988 |
\begin{enumerate}
|
|
989 |
\item One edge is added to the RAG (@{text "depend_s"}):
|
|
990 |
@{thm [display] depend_s}
|
|
991 |
\item No re-computation is needed (@{text "eq_cp"}):
|
|
992 |
@{thm [display] eq_cp}
|
|
993 |
\end{enumerate}
|
|
994 |
*} |
|
995 |
||
996 |
(*<*) |
|
997 |
end |
|
998 |
||
999 |
context step_P_cps_ne |
|
1000 |
begin |
|
1001 |
(*>*) |
|
1002 |
||
1003 |
text {*
|
|
1004 |
The second is when @{thm ne} holds.
|
|
1005 |
The following results can be obtained: |
|
1006 |
\begin{enumerate}
|
|
1007 |
\item One edge is added to the RAG (@{text "depend_s"}):
|
|
1008 |
@{thm [display] depend_s}
|
|
1009 |
\item Threads with no dependence relation with @{term "th"} do not need a re-computation
|
|
1010 |
of their @{term "cp"}-values (@{text "eq_cp"}):
|
|
1011 |
@{thm [display] eq_cp}
|
|
1012 |
This lemma implies all threads with a dependence relation with @{term "th"} may need
|
|
1013 |
re-computation. |
|
1014 |
\item Similar to the case of @{term "Set"}, the computation procedure could stop earlier
|
|
1015 |
(@{text "eq_up"}):
|
|
1016 |
@{thm [display] eq_up}
|
|
1017 |
\end{enumerate}
|
|
1018 |
||
1019 |
*} |
|
1020 |
||
1021 |
(*<*) |
|
1022 |
end |
|
1023 |
(*>*) |
|
1024 |
||
1025 |
subsection {* Event @{text "Create th prio"} *}
|
|
1026 |
||
1027 |
(*<*) |
|
1028 |
context step_create_cps |
|
1029 |
begin |
|
1030 |
(*>*) |
|
1031 |
||
1032 |
text {*
|
|
1033 |
The context under which event @{text "Create th prio"} happens is formalized as follows:
|
|
1034 |
\begin{enumerate}
|
|
1035 |
\item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
|
|
1036 |
\item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies
|
|
1037 |
event @{text "Create th prio"} is eligible to happen under state @{term "s'"} and
|
|
1038 |
state @{term "s'"} is a valid state.
|
|
1039 |
\end{enumerate}
|
|
1040 |
The following results can be obtained under this context: |
|
1041 |
\begin{enumerate}
|
|
1042 |
\item The RAG does not change (@{text "eq_dep"}):
|
|
1043 |
@{thm [display] eq_dep}
|
|
1044 |
\item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
|
|
1045 |
@{thm [display] eq_cp}
|
|
1046 |
\item The @{term "cp"}-value of @{term "th"} equals its precedence
|
|
1047 |
(@{text "eq_cp_th"}):
|
|
1048 |
@{thm [display] eq_cp_th}
|
|
1049 |
\end{enumerate}
|
|
1050 |
||
1051 |
*} |
|
1052 |
||
1053 |
||
1054 |
(*<*) |
|
1055 |
end |
|
1056 |
(*>*) |
|
1057 |
||
1058 |
subsection {* Event @{text "Exit th"} *}
|
|
1059 |
||
1060 |
(*<*) |
|
1061 |
context step_exit_cps |
|
1062 |
begin |
|
1063 |
(*>*) |
|
1064 |
||
1065 |
text {*
|
|
1066 |
The context under which event @{text "Exit th"} happens is formalized as follows:
|
|
1067 |
\begin{enumerate}
|
|
1068 |
\item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
|
|
1069 |
\item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies
|
|
1070 |
event @{text "Exit th"} is eligible to happen under state @{term "s'"} and
|
|
1071 |
state @{term "s'"} is a valid state.
|
|
1072 |
\end{enumerate}
|
|
1073 |
The following results can be obtained under this context: |
|
1074 |
\begin{enumerate}
|
|
1075 |
\item The RAG does not change (@{text "eq_dep"}):
|
|
1076 |
@{thm [display] eq_dep}
|
|
1077 |
\item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
|
|
1078 |
@{thm [display] eq_cp}
|
|
1079 |
\end{enumerate}
|
|
1080 |
Since @{term th} does not live in state @{term "s"}, there is no need to compute
|
|
1081 |
its @{term cp}-value.
|
|
1082 |
*} |
|
1083 |
||
1084 |
(*<*) |
|
1085 |
end |
|
1086 |
(*>*) |
|
|
298
f2e0d031a395
completed model section; vt has only state as argument
urbanc
parents:
297
diff
changeset
|
1087 |
|
|
f2e0d031a395
completed model section; vt has only state as argument
urbanc
parents:
297
diff
changeset
|
1088 |
section {* Conclusion *}
|
|
f2e0d031a395
completed model section; vt has only state as argument
urbanc
parents:
297
diff
changeset
|
1089 |
|
| 300 | 1090 |
text {*
|
1091 |
The Priority Inheritance Protocol is a classic textbook algorithm |
|
1092 |
used in real-time systems in order to avoid the problem of Priority |
|
1093 |
Inversion. |
|
1094 |
||
| 301 | 1095 |
A clear and simple understanding of the problem at hand is both a |
1096 |
prerequisite and a byproduct of such an effort, because everything |
|
1097 |
has finally be reduced to the very first principle to be checked |
|
1098 |
mechanically. |
|
1099 |
||
| 304 | 1100 |
Our formalisation and the one presented |
1101 |
in \cite{Wang09} are the only ones that employ Paulson's method for
|
|
1102 |
verifying protocols which are \emph{not} security related.
|
|
1103 |
||
| 300 | 1104 |
TO DO |
1105 |
||
| 301 | 1106 |
no clue about multi-processor case according to \cite{Steinberg10}
|
1107 |
||
| 300 | 1108 |
*} |
| 273 | 1109 |
|
| 280 | 1110 |
text {*
|
1111 |
\bigskip |
|
| 284 | 1112 |
The priority inversion phenomenon was first published in |
1113 |
\cite{Lampson80}. The two protocols widely used to eliminate
|
|
1114 |
priority inversion, namely PI (Priority Inheritance) and PCE |
|
1115 |
(Priority Ceiling Emulation), were proposed in \cite{Sha90}. PCE is
|
|
1116 |
less convenient to use because it requires static analysis of |
|
1117 |
programs. Therefore, PI is more commonly used in |
|
1118 |
practice\cite{locke-july02}. However, as pointed out in the
|
|
1119 |
literature, the analysis of priority inheritance protocol is quite |
|
1120 |
subtle\cite{yodaiken-july02}. A formal analysis will certainly be
|
|
1121 |
helpful for us to understand and correctly implement PI. All |
|
1122 |
existing formal analysis of PI |
|
| 304 | 1123 |
\cite{Jahier09,Wellings07,Faria08} are based on the
|
| 284 | 1124 |
model checking technology. Because of the state explosion problem, |
1125 |
model check is much like an exhaustive testing of finite models with |
|
1126 |
limited size. The results obtained can not be safely generalized to |
|
1127 |
models with arbitrarily large size. Worse still, since model |
|
1128 |
checking is fully automatic, it give little insight on why the |
|
1129 |
formal model is correct. It is therefore definitely desirable to |
|
1130 |
analyze PI using theorem proving, which gives more general results |
|
1131 |
as well as deeper insight. And this is the purpose of this paper |
|
1132 |
which gives a formal analysis of PI in the interactive theorem |
|
1133 |
prover Isabelle using Higher Order Logic (HOL). The formalization |
|
| 262 | 1134 |
focuses on on two issues: |
1135 |
||
1136 |
\begin{enumerate}
|
|
1137 |
\item The correctness of the protocol model itself. A series of desirable properties is |
|
1138 |
derived until we are fully convinced that the formal model of PI does |
|
1139 |
eliminate priority inversion. And a better understanding of PI is so obtained |
|
1140 |
in due course. For example, we find through formalization that the choice of |
|
1141 |
next thread to take hold when a |
|
1142 |
resource is released is irrelevant for the very basic property of PI to hold. |
|
1143 |
A point never mentioned in literature. |
|
1144 |
\item The correctness of the implementation. A series of properties is derived the meaning |
|
1145 |
of which can be used as guidelines on how PI can be implemented efficiently and correctly. |
|
1146 |
\end{enumerate}
|
|
1147 |
||
1148 |
The rest of the paper is organized as follows: Section \ref{overview} gives an overview
|
|
1149 |
of PI. Section \ref{model} introduces the formal model of PI. Section \ref{general}
|
|
1150 |
discusses a series of basic properties of PI. Section \ref{extension} shows formally
|
|
1151 |
how priority inversion is controlled by PI. Section \ref{implement} gives properties
|
|
1152 |
which can be used for guidelines of implementation. Section \ref{related} discusses
|
|
1153 |
related works. Section \ref{conclusion} concludes the whole paper.
|
|
| 265 | 1154 |
|
| 273 | 1155 |
The basic priority inheritance protocol has two problems: |
1156 |
||
1157 |
It does not prevent a deadlock from happening in a program with circular lock dependencies. |
|
1158 |
||
1159 |
A chain of blocking may be formed; blocking duration can be substantial, though bounded. |
|
1160 |
||
| 265 | 1161 |
|
1162 |
Contributions |
|
1163 |
||
1164 |
Despite the wide use of Priority Inheritance Protocol in real time operating |
|
1165 |
system, it's correctness has never been formally proved and mechanically checked. |
|
1166 |
All existing verification are based on model checking technology. Full automatic |
|
1167 |
verification gives little help to understand why the protocol is correct. |
|
1168 |
And results such obtained only apply to models of limited size. |
|
1169 |
This paper presents a formal verification based on theorem proving. |
|
1170 |
Machine checked formal proof does help to get deeper understanding. We found |
|
1171 |
the fact which is not mentioned in the literature, that the choice of next |
|
1172 |
thread to take over when an critical resource is release does not affect the correctness |
|
1173 |
of the protocol. The paper also shows how formal proof can help to construct |
|
1174 |
correct and efficient implementation.\bigskip |
|
1175 |
||
| 262 | 1176 |
*} |
1177 |
||
1178 |
section {* An overview of priority inversion and priority inheritance \label{overview} *}
|
|
1179 |
||
1180 |
text {*
|
|
1181 |
||
1182 |
Priority inversion refers to the phenomenon when a thread with high priority is blocked |
|
1183 |
by a thread with low priority. Priority happens when the high priority thread requests |
|
1184 |
for some critical resource already taken by the low priority thread. Since the high |
|
1185 |
priority thread has to wait for the low priority thread to complete, it is said to be |
|
1186 |
blocked by the low priority thread. Priority inversion might prevent high priority |
|
1187 |
thread from fulfill its task in time if the duration of priority inversion is indefinite |
|
1188 |
and unpredictable. Indefinite priority inversion happens when indefinite number |
|
1189 |
of threads with medium priorities is activated during the period when the high |
|
1190 |
priority thread is blocked by the low priority thread. Although these medium |
|
1191 |
priority threads can not preempt the high priority thread directly, they are able |
|
1192 |
to preempt the low priority threads and cause it to stay in critical section for |
|
1193 |
an indefinite long duration. In this way, the high priority thread may be blocked indefinitely. |
|
1194 |
||
1195 |
Priority inheritance is one protocol proposed to avoid indefinite priority inversion. |
|
1196 |
The basic idea is to let the high priority thread donate its priority to the low priority |
|
1197 |
thread holding the critical resource, so that it will not be preempted by medium priority |
|
1198 |
threads. The thread with highest priority will not be blocked unless it is requesting |
|
1199 |
some critical resource already taken by other threads. Viewed from a different angle, |
|
1200 |
any thread which is able to block the highest priority threads must already hold some |
|
1201 |
critical resource. Further more, it must have hold some critical resource at the |
|
1202 |
moment the highest priority is created, otherwise, it may never get change to run and |
|
1203 |
get hold. Since the number of such resource holding lower priority threads is finite, |
|
1204 |
if every one of them finishes with its own critical section in a definite duration, |
|
1205 |
the duration the highest priority thread is blocked is definite as well. The key to |
|
1206 |
guarantee lower priority threads to finish in definite is to donate them the highest |
|
1207 |
priority. In such cases, the lower priority threads is said to have inherited the |
|
1208 |
highest priority. And this explains the name of the protocol: |
|
1209 |
{\em Priority Inheritance} and how Priority Inheritance prevents indefinite delay.
|
|
1210 |
||
1211 |
The objectives of this paper are: |
|
1212 |
\begin{enumerate}
|
|
1213 |
\item Build the above mentioned idea into formal model and prove a series of properties |
|
1214 |
until we are convinced that the formal model does fulfill the original idea. |
|
1215 |
\item Show how formally derived properties can be used as guidelines for correct |
|
1216 |
and efficient implementation. |
|
1217 |
\end{enumerate}
|
|
1218 |
The proof is totally formal in the sense that every detail is reduced to the |
|
1219 |
very first principles of Higher Order Logic. The nature of interactive theorem |
|
1220 |
proving is for the human user to persuade computer program to accept its arguments. |
|
1221 |
A clear and simple understanding of the problem at hand is both a prerequisite and a |
|
1222 |
byproduct of such an effort, because everything has finally be reduced to the very |
|
1223 |
first principle to be checked mechanically. The former intuitive explanation of |
|
1224 |
Priority Inheritance is just such a byproduct. |
|
1225 |
*} |
|
1226 |
||
1227 |
section {* Formal model of Priority Inheritance \label{model} *}
|
|
1228 |
text {*
|
|
1229 |
\input{../../generated/PrioGDef}
|
|
1230 |
*} |
|
1231 |
||
1232 |
section {* General properties of Priority Inheritance \label{general} *}
|
|
| 264 | 1233 |
|
1234 |
text {*
|
|
| 308 | 1235 |
|
| 264 | 1236 |
*} |
| 262 | 1237 |
|
1238 |
section {* Key properties \label{extension} *}
|
|
1239 |
||
| 264 | 1240 |
(*<*) |
1241 |
context extend_highest_gen |
|
1242 |
begin |
|
1243 |
(*>*) |
|
1244 |
||
1245 |
text {*
|
|
1246 |
The essential of {\em Priority Inheritance} is to avoid indefinite priority inversion. For this
|
|
1247 |
purpose, we need to investigate what happens after one thread takes the highest precedence. |
|
1248 |
A locale is used to describe such a situation, which assumes: |
|
1249 |
\begin{enumerate}
|
|
1250 |
\item @{term "s"} is a valid state (@{text "vt_s"}):
|
|
1251 |
@{thm vt_s}.
|
|
1252 |
\item @{term "th"} is a living thread in @{term "s"} (@{text "threads_s"}):
|
|
1253 |
@{thm threads_s}.
|
|
1254 |
\item @{term "th"} has the highest precedence in @{term "s"} (@{text "highest"}):
|
|
1255 |
@{thm highest}.
|
|
1256 |
\item The precedence of @{term "th"} is @{term "Prc prio tm"} (@{text "preced_th"}):
|
|
1257 |
@{thm preced_th}.
|
|
1258 |
\end{enumerate}
|
|
1259 |
*} |
|
1260 |
||
1261 |
text {* \noindent
|
|
1262 |
Under these assumptions, some basic priority can be derived for @{term "th"}:
|
|
1263 |
\begin{enumerate}
|
|
1264 |
\item The current precedence of @{term "th"} equals its own precedence (@{text "eq_cp_s_th"}):
|
|
1265 |
@{thm [display] eq_cp_s_th}
|
|
1266 |
\item The current precedence of @{term "th"} is the highest precedence in
|
|
1267 |
the system (@{text "highest_cp_preced"}):
|
|
1268 |
@{thm [display] highest_cp_preced}
|
|
1269 |
\item The precedence of @{term "th"} is the highest precedence
|
|
1270 |
in the system (@{text "highest_preced_thread"}):
|
|
1271 |
@{thm [display] highest_preced_thread}
|
|
1272 |
\item The current precedence of @{term "th"} is the highest current precedence
|
|
1273 |
in the system (@{text "highest'"}):
|
|
1274 |
@{thm [display] highest'}
|
|
1275 |
\end{enumerate}
|
|
1276 |
*} |
|
1277 |
||
1278 |
text {* \noindent
|
|
1279 |
To analysis what happens after state @{term "s"} a sub-locale is defined, which
|
|
1280 |
assumes: |
|
1281 |
\begin{enumerate}
|
|
1282 |
\item @{term "t"} is a valid extension of @{term "s"} (@{text "vt_t"}): @{thm vt_t}.
|
|
1283 |
\item Any thread created in @{term "t"} has priority no higher than @{term "prio"}, therefore
|
|
1284 |
its precedence can not be higher than @{term "th"}, therefore
|
|
1285 |
@{term "th"} remain to be the one with the highest precedence
|
|
1286 |
(@{text "create_low"}):
|
|
1287 |
@{thm [display] create_low}
|
|
1288 |
\item Any adjustment of priority in |
|
1289 |
@{term "t"} does not happen to @{term "th"} and
|
|
1290 |
the priority set is no higher than @{term "prio"}, therefore
|
|
1291 |
@{term "th"} remain to be the one with the highest precedence (@{text "set_diff_low"}):
|
|
1292 |
@{thm [display] set_diff_low}
|
|
1293 |
\item Since we are investigating what happens to @{term "th"}, it is assumed
|
|
1294 |
@{term "th"} does not exit during @{term "t"} (@{text "exit_diff"}):
|
|
1295 |
@{thm [display] exit_diff}
|
|
1296 |
\end{enumerate}
|
|
1297 |
*} |
|
1298 |
||
1299 |
text {* \noindent
|
|
1300 |
All these assumptions are put into a predicate @{term "extend_highest_gen"}.
|
|
1301 |
It can be proved that @{term "extend_highest_gen"} holds
|
|
1302 |
for any moment @{text "i"} in it @{term "t"} (@{text "red_moment"}):
|
|
1303 |
@{thm [display] red_moment}
|
|
1304 |
||
1305 |
From this, an induction principle can be derived for @{text "t"}, so that
|
|
1306 |
properties already derived for @{term "t"} can be applied to any prefix
|
|
1307 |
of @{text "t"} in the proof of new properties
|
|
1308 |
about @{term "t"} (@{text "ind"}):
|
|
1309 |
\begin{center}
|
|
1310 |
@{thm[display] ind}
|
|
1311 |
\end{center}
|
|
1312 |
||
1313 |
The following properties can be proved about @{term "th"} in @{term "t"}:
|
|
1314 |
\begin{enumerate}
|
|
1315 |
\item In @{term "t"}, thread @{term "th"} is kept live and its
|
|
1316 |
precedence is preserved as well |
|
1317 |
(@{text "th_kept"}):
|
|
1318 |
@{thm [display] th_kept}
|
|
1319 |
\item In @{term "t"}, thread @{term "th"}'s precedence is always the maximum among
|
|
1320 |
all living threads |
|
1321 |
(@{text "max_preced"}):
|
|
1322 |
@{thm [display] max_preced}
|
|
1323 |
\item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum precedence
|
|
1324 |
among all living threads |
|
1325 |
(@{text "th_cp_max_preced"}):
|
|
1326 |
@{thm [display] th_cp_max_preced}
|
|
1327 |
\item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum current
|
|
1328 |
precedence among all living threads |
|
1329 |
(@{text "th_cp_max"}):
|
|
1330 |
@{thm [display] th_cp_max}
|
|
1331 |
\item In @{term "t"}, thread @{term "th"}'s current precedence equals its precedence at moment
|
|
1332 |
@{term "s"}
|
|
1333 |
(@{text "th_cp_preced"}):
|
|
1334 |
@{thm [display] th_cp_preced}
|
|
1335 |
\end{enumerate}
|
|
1336 |
*} |
|
1337 |
||
1338 |
text {* \noindent
|
|
| 266 | 1339 |
The main theorem of this part is to characterizing the running thread during @{term "t"}
|
| 264 | 1340 |
(@{text "runing_inversion_2"}):
|
1341 |
@{thm [display] runing_inversion_2}
|
|
1342 |
According to this, if a thread is running, it is either @{term "th"} or was
|
|
1343 |
already live and held some resource |
|
1344 |
at moment @{text "s"} (expressed by: @{text "cntV s th' < cntP s th'"}).
|
|
1345 |
||
1346 |
Since there are only finite many threads live and holding some resource at any moment, |
|
1347 |
if every such thread can release all its resources in finite duration, then after finite |
|
1348 |
duration, none of them may block @{term "th"} anymore. So, no priority inversion may happen
|
|
1349 |
then. |
|
1350 |
*} |
|
1351 |
||
1352 |
(*<*) |
|
1353 |
end |
|
1354 |
(*>*) |
|
1355 |
||
| 262 | 1356 |
section {* Properties to guide implementation \label{implement} *}
|
1357 |
||
| 264 | 1358 |
text {*
|
| 266 | 1359 |
The properties (especially @{text "runing_inversion_2"}) convinced us that the model defined
|
1360 |
in Section \ref{model} does prevent indefinite priority inversion and therefore fulfills
|
|
| 264 | 1361 |
the fundamental requirement of Priority Inheritance protocol. Another purpose of this paper |
| 266 | 1362 |
is to show how this model can be used to guide a concrete implementation. As discussed in |
| 276 | 1363 |
Section 5.6.5 of \cite{Vahalia96}, the implementation of Priority Inheritance in Solaris
|
| 266 | 1364 |
uses sophisticated linking data structure. Except discussing two scenarios to show how |
1365 |
the data structure should be manipulated, a lot of details of the implementation are missing. |
|
| 304 | 1366 |
In \cite{Faria08,Jahier09,Wellings07} the protocol is described formally
|
| 266 | 1367 |
using different notations, but little information is given on how this protocol can be |
1368 |
implemented efficiently, especially there is no information on how these data structure |
|
1369 |
should be manipulated. |
|
1370 |
||
1371 |
Because the scheduling of threads is based on current precedence, |
|
1372 |
the central issue in implementation of Priority Inheritance is how to compute the precedence |
|
1373 |
correctly and efficiently. As long as the precedence is correct, it is very easy to |
|
1374 |
modify the scheduling algorithm to select the correct thread to execute. |
|
1375 |
||
1376 |
First, it can be proved that the computation of current precedence @{term "cp"} of a threads
|
|
1377 |
only involves its children (@{text "cp_rec"}):
|
|
1378 |
@{thm [display] cp_rec}
|
|
1379 |
where @{term "children s th"} represents the set of children of @{term "th"} in the current
|
|
1380 |
RAG: |
|
1381 |
\[ |
|
1382 |
@{thm (lhs) children_def} @{text "\<equiv>"} @{thm (rhs) children_def}
|
|
1383 |
\] |
|
1384 |
where the definition of @{term "child"} is:
|
|
1385 |
\[ @{thm (lhs) child_def} @{text "\<equiv>"} @{thm (rhs) child_def}
|
|
1386 |
\] |
|
1387 |
||
1388 |
The aim of this section is to fill the missing details of how current precedence should |
|
1389 |
be changed with the happening of events, with each event type treated by one subsection, |
|
1390 |
where the computation of @{term "cp"} uses lemma @{text "cp_rec"}.
|
|
1391 |
*} |
|
1392 |
||
1393 |
subsection {* Event @{text "Set th prio"} *}
|
|
1394 |
||
1395 |
(*<*) |
|
1396 |
context step_set_cps |
|
1397 |
begin |
|
1398 |
(*>*) |
|
1399 |
||
1400 |
text {*
|
|
1401 |
The context under which event @{text "Set th prio"} happens is formalized as follows:
|
|
1402 |
\begin{enumerate}
|
|
1403 |
\item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
|
|
1404 |
\item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies
|
|
1405 |
event @{text "Set th prio"} is eligible to happen under state @{term "s'"} and
|
|
1406 |
state @{term "s'"} is a valid state.
|
|
1407 |
\end{enumerate}
|
|
| 264 | 1408 |
*} |
1409 |
||
| 266 | 1410 |
text {* \noindent
|
1411 |
Under such a context, we investigated how the current precedence @{term "cp"} of
|
|
1412 |
threads change from state @{term "s'"} to @{term "s"} and obtained the following
|
|
1413 |
conclusions: |
|
1414 |
\begin{enumerate}
|
|
1415 |
%% \item The RAG does not change (@{text "eq_dep"}): @{thm "eq_dep"}.
|
|
1416 |
\item All threads with no dependence relation with thread @{term "th"} have their
|
|
1417 |
@{term "cp"}-value unchanged (@{text "eq_cp"}):
|
|
1418 |
@{thm [display] eq_cp}
|
|
1419 |
This lemma implies the @{term "cp"}-value of @{term "th"}
|
|
1420 |
and those threads which have a dependence relation with @{term "th"} might need
|
|
1421 |
to be recomputed. The way to do this is to start from @{term "th"}
|
|
1422 |
and follow the @{term "depend"}-chain to recompute the @{term "cp"}-value of every
|
|
1423 |
encountered thread using lemma @{text "cp_rec"}.
|
|
1424 |
Since the @{term "depend"}-relation is loop free, this procedure
|
|
1425 |
can always stop. The the following lemma shows this procedure actually could stop earlier. |
|
1426 |
\item The following two lemma shows, if a thread the re-computation of which |
|
1427 |
gives an unchanged @{term "cp"}-value, the procedure described above can stop.
|
|
1428 |
\begin{enumerate}
|
|
1429 |
\item Lemma @{text "eq_up_self"} shows if the re-computation of
|
|
1430 |
@{term "th"}'s @{term "cp"} gives the same result, the procedure can stop:
|
|
1431 |
@{thm [display] eq_up_self}
|
|
1432 |
\item Lemma @{text "eq_up"}) shows if the re-computation at intermediate threads
|
|
1433 |
gives unchanged result, the procedure can stop: |
|
1434 |
@{thm [display] eq_up}
|
|
1435 |
\end{enumerate}
|
|
1436 |
\end{enumerate}
|
|
1437 |
*} |
|
1438 |
||
1439 |
(*<*) |
|
1440 |
end |
|
1441 |
(*>*) |
|
| 264 | 1442 |
|
| 272 | 1443 |
subsection {* Event @{text "V th cs"} *}
|
1444 |
||
1445 |
(*<*) |
|
1446 |
context step_v_cps_nt |
|
1447 |
begin |
|
1448 |
(*>*) |
|
1449 |
||
1450 |
text {*
|
|
1451 |
The context under which event @{text "V th cs"} happens is formalized as follows:
|
|
1452 |
\begin{enumerate}
|
|
1453 |
\item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
|
|
1454 |
\item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies
|
|
1455 |
event @{text "V th cs"} is eligible to happen under state @{term "s'"} and
|
|
1456 |
state @{term "s'"} is a valid state.
|
|
1457 |
\end{enumerate}
|
|
1458 |
*} |
|
1459 |
||
1460 |
text {* \noindent
|
|
1461 |
Under such a context, we investigated how the current precedence @{term "cp"} of
|
|
1462 |
threads change from state @{term "s'"} to @{term "s"}.
|
|
1463 |
||
1464 |
||
1465 |
Two subcases are considerted, |
|
1466 |
where the first is that there exits @{term "th'"}
|
|
1467 |
such that |
|
1468 |
@{thm [display] nt}
|
|
1469 |
holds, which means there exists a thread @{term "th'"} to take over
|
|
1470 |
the resource release by thread @{term "th"}.
|
|
1471 |
In this sub-case, the following results are obtained: |
|
1472 |
\begin{enumerate}
|
|
1473 |
\item The change of RAG is given by lemma @{text "depend_s"}:
|
|
1474 |
@{thm [display] "depend_s"}
|
|
1475 |
which shows two edges are removed while one is added. These changes imply how |
|
1476 |
the current precedences should be re-computed. |
|
1477 |
\item First all threads different from @{term "th"} and @{term "th'"} have their
|
|
1478 |
@{term "cp"}-value kept, therefore do not need a re-computation
|
|
1479 |
(@{text "cp_kept"}): @{thm [display] cp_kept}
|
|
1480 |
This lemma also implies, only the @{term "cp"}-values of @{term "th"} and @{term "th'"}
|
|
1481 |
need to be recomputed. |
|
1482 |
\end{enumerate}
|
|
1483 |
*} |
|
1484 |
||
1485 |
(*<*) |
|
1486 |
end |
|
1487 |
||
1488 |
context step_v_cps_nnt |
|
1489 |
begin |
|
1490 |
(*>*) |
|
1491 |
||
1492 |
text {*
|
|
1493 |
The other sub-case is when for all @{text "th'"}
|
|
1494 |
@{thm [display] nnt}
|
|
1495 |
holds, no such thread exists. The following results can be obtained for this |
|
1496 |
sub-case: |
|
1497 |
\begin{enumerate}
|
|
1498 |
\item The change of RAG is given by lemma @{text "depend_s"}:
|
|
1499 |
@{thm [display] depend_s}
|
|
1500 |
which means only one edge is removed. |
|
1501 |
\item In this case, no re-computation is needed (@{text "eq_cp"}):
|
|
1502 |
@{thm [display] eq_cp}
|
|
1503 |
\end{enumerate}
|
|
1504 |
*} |
|
1505 |
||
1506 |
(*<*) |
|
1507 |
end |
|
1508 |
(*>*) |
|
1509 |
||
1510 |
||
1511 |
subsection {* Event @{text "P th cs"} *}
|
|
1512 |
||
1513 |
(*<*) |
|
1514 |
context step_P_cps_e |
|
1515 |
begin |
|
1516 |
(*>*) |
|
1517 |
||
1518 |
text {*
|
|
1519 |
The context under which event @{text "P th cs"} happens is formalized as follows:
|
|
1520 |
\begin{enumerate}
|
|
1521 |
\item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
|
|
1522 |
\item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies
|
|
1523 |
event @{text "P th cs"} is eligible to happen under state @{term "s'"} and
|
|
1524 |
state @{term "s'"} is a valid state.
|
|
1525 |
\end{enumerate}
|
|
1526 |
||
1527 |
This case is further divided into two sub-cases. The first is when @{thm ee} holds.
|
|
1528 |
The following results can be obtained: |
|
1529 |
\begin{enumerate}
|
|
1530 |
\item One edge is added to the RAG (@{text "depend_s"}):
|
|
1531 |
@{thm [display] depend_s}
|
|
1532 |
\item No re-computation is needed (@{text "eq_cp"}):
|
|
1533 |
@{thm [display] eq_cp}
|
|
1534 |
\end{enumerate}
|
|
1535 |
*} |
|
1536 |
||
1537 |
(*<*) |
|
1538 |
end |
|
1539 |
||
1540 |
context step_P_cps_ne |
|
1541 |
begin |
|
1542 |
(*>*) |
|
1543 |
||
1544 |
text {*
|
|
1545 |
The second is when @{thm ne} holds.
|
|
1546 |
The following results can be obtained: |
|
1547 |
\begin{enumerate}
|
|
1548 |
\item One edge is added to the RAG (@{text "depend_s"}):
|
|
1549 |
@{thm [display] depend_s}
|
|
1550 |
\item Threads with no dependence relation with @{term "th"} do not need a re-computation
|
|
1551 |
of their @{term "cp"}-values (@{text "eq_cp"}):
|
|
1552 |
@{thm [display] eq_cp}
|
|
1553 |
This lemma implies all threads with a dependence relation with @{term "th"} may need
|
|
1554 |
re-computation. |
|
1555 |
\item Similar to the case of @{term "Set"}, the computation procedure could stop earlier
|
|
1556 |
(@{text "eq_up"}):
|
|
1557 |
@{thm [display] eq_up}
|
|
1558 |
\end{enumerate}
|
|
1559 |
||
1560 |
*} |
|
1561 |
||
1562 |
(*<*) |
|
1563 |
end |
|
1564 |
(*>*) |
|
1565 |
||
1566 |
subsection {* Event @{text "Create th prio"} *}
|
|
1567 |
||
1568 |
(*<*) |
|
1569 |
context step_create_cps |
|
1570 |
begin |
|
1571 |
(*>*) |
|
1572 |
||
1573 |
text {*
|
|
1574 |
The context under which event @{text "Create th prio"} happens is formalized as follows:
|
|
1575 |
\begin{enumerate}
|
|
1576 |
\item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
|
|
1577 |
\item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies
|
|
1578 |
event @{text "Create th prio"} is eligible to happen under state @{term "s'"} and
|
|
1579 |
state @{term "s'"} is a valid state.
|
|
1580 |
\end{enumerate}
|
|
1581 |
The following results can be obtained under this context: |
|
1582 |
\begin{enumerate}
|
|
1583 |
\item The RAG does not change (@{text "eq_dep"}):
|
|
1584 |
@{thm [display] eq_dep}
|
|
1585 |
\item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
|
|
1586 |
@{thm [display] eq_cp}
|
|
1587 |
\item The @{term "cp"}-value of @{term "th"} equals its precedence
|
|
1588 |
(@{text "eq_cp_th"}):
|
|
1589 |
@{thm [display] eq_cp_th}
|
|
1590 |
\end{enumerate}
|
|
1591 |
||
1592 |
*} |
|
1593 |
||
1594 |
||
1595 |
(*<*) |
|
1596 |
end |
|
1597 |
(*>*) |
|
1598 |
||
1599 |
subsection {* Event @{text "Exit th"} *}
|
|
1600 |
||
1601 |
(*<*) |
|
1602 |
context step_exit_cps |
|
1603 |
begin |
|
1604 |
(*>*) |
|
1605 |
||
1606 |
text {*
|
|
1607 |
The context under which event @{text "Exit th"} happens is formalized as follows:
|
|
1608 |
\begin{enumerate}
|
|
1609 |
\item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
|
|
1610 |
\item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies
|
|
1611 |
event @{text "Exit th"} is eligible to happen under state @{term "s'"} and
|
|
1612 |
state @{term "s'"} is a valid state.
|
|
1613 |
\end{enumerate}
|
|
1614 |
The following results can be obtained under this context: |
|
1615 |
\begin{enumerate}
|
|
1616 |
\item The RAG does not change (@{text "eq_dep"}):
|
|
1617 |
@{thm [display] eq_dep}
|
|
1618 |
\item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
|
|
1619 |
@{thm [display] eq_cp}
|
|
1620 |
\end{enumerate}
|
|
1621 |
Since @{term th} does not live in state @{term "s"}, there is no need to compute
|
|
1622 |
its @{term cp}-value.
|
|
1623 |
*} |
|
1624 |
||
1625 |
(*<*) |
|
1626 |
end |
|
1627 |
(*>*) |
|
1628 |
||
1629 |
||
| 262 | 1630 |
section {* Related works \label{related} *}
|
1631 |
||
1632 |
text {*
|
|
1633 |
\begin{enumerate}
|
|
1634 |
\item {\em Integrating Priority Inheritance Algorithms in the Real-Time Specification for Java}
|
|
| 304 | 1635 |
\cite{Wellings07} models and verifies the combination of Priority Inheritance (PI) and
|
| 262 | 1636 |
Priority Ceiling Emulation (PCE) protocols in the setting of Java virtual machine |
1637 |
using extended Timed Automata(TA) formalism of the UPPAAL tool. Although a detailed |
|
1638 |
formal model of combined PI and PCE is given, the number of properties is quite |
|
1639 |
small and the focus is put on the harmonious working of PI and PCE. Most key features of PI |
|
1640 |
(as well as PCE) are not shown. Because of the limitation of the model checking technique |
|
1641 |
used there, properties are shown only for a small number of scenarios. Therefore, |
|
1642 |
the verification does not show the correctness of the formal model itself in a |
|
1643 |
convincing way. |
|
1644 |
\item {\em Formal Development of Solutions for Real-Time Operating Systems with TLA+/TLC}
|
|
1645 |
\cite{Faria08}. A formal model of PI is given in TLA+. Only 3 properties are shown
|
|
1646 |
for PI using model checking. The limitation of model checking is intrinsic to the work. |
|
1647 |
\item {\em Synchronous modeling and validation of priority inheritance schedulers}
|
|
| 304 | 1648 |
\cite{Jahier09}. Gives a formal model
|
| 262 | 1649 |
of PI and PCE in AADL (Architecture Analysis \& Design Language) and checked |
1650 |
several properties using model checking. The number of properties shown there is |
|
1651 |
less than here and the scale is also limited by the model checking technique. |
|
1652 |
\item {\em The Priority Ceiling Protocol: Formalization and Analysis Using PVS}
|
|
1653 |
\cite{dutertre99b}. Formalized another protocol for Priority Inversion in the
|
|
1654 |
interactive theorem proving system PVS. |
|
1655 |
\end{enumerate}
|
|
1656 |
||
1657 |
||
1658 |
There are several works on inversion avoidance: |
|
1659 |
\begin{enumerate}
|
|
1660 |
\item {\em Solving the group priority inversion problem in a timed asynchronous system}
|
|
1661 |
\cite{Wang:2002:SGP}. The notion of Group Priority Inversion is introduced. The main
|
|
1662 |
strategy is still inversion avoidance. The method is by reordering requests |
|
1663 |
in the setting of Client-Server. |
|
1664 |
\item {\em A Formalization of Priority Inversion} \cite{journals/rts/BabaogluMS93}.
|
|
1665 |
Formalized the notion of Priority |
|
1666 |
Inversion and proposes methods to avoid it. |
|
1667 |
\end{enumerate}
|
|
1668 |
||
1669 |
{\em Examples of inaccurate specification of the protocol ???}.
|
|
1670 |
||
1671 |
*} |
|
1672 |
||
1673 |
section {* Conclusions \label{conclusion} *}
|
|
1674 |
||
| 286 | 1675 |
text {*
|
1676 |
The work in this paper only deals with single CPU configurations. The |
|
1677 |
"one CPU" assumption is essential for our formalisation, because the |
|
1678 |
main lemma fails in multi-CPU configuration. The lemma says that any |
|
1679 |
runing thead must be the one with the highest prioirty or already held |
|
1680 |
some resource when the highest priority thread was initiated. When |
|
1681 |
there are multiple CPUs, it may well be the case that a threads did |
|
1682 |
not hold any resource when the highest priority thread was initiated, |
|
1683 |
but that thread still runs after that moment on a separate CPU. In |
|
1684 |
this way, the main lemma does not hold anymore. |
|
1685 |
||
1686 |
||
1687 |
There are some works deals with priority inversion in multi-CPU |
|
1688 |
configurations[???], but none of them have given a formal correctness |
|
1689 |
proof. The extension of our formal proof to deal with multi-CPU |
|
1690 |
configurations is not obvious. One possibility, as suggested in paper |
|
1691 |
[???], is change our formal model (the defiintion of "schs") to give |
|
1692 |
the released resource to the thread with the highest prioirty. In this |
|
1693 |
way, indefinite prioirty inversion can be avoided, but for a quite |
|
1694 |
different reason from the one formalized in this paper (because the |
|
1695 |
"mail lemma" will be different). This means a formal correctness proof |
|
1696 |
for milt-CPU configuration would be quite different from the one given |
|
1697 |
in this paper. The solution of prioirty inversion problem in mult-CPU |
|
1698 |
configurations is a different problem which needs different solutions |
|
1699 |
which is outside the scope of this paper. |
|
1700 |
||
1701 |
*} |
|
1702 |
||
| 262 | 1703 |
(*<*) |
1704 |
end |
|
1705 |
(*>*) |