prio/Paper/Paper.thy
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(*<*)
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theory Paper
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imports "../CpsG" "../ExtGG" "~~/src/HOL/Library/LaTeXsugar"
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begin
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ML {*
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  open Printer;
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  show_question_marks_default := false;
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  *}
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notation (latex output)
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  Cons ("_::_" [78,77] 73) and
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  vt ("valid'_state") and
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  runing ("running") and
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  birthtime ("last'_set") and
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  If  ("(\<^raw:\textrm{>if\<^raw:}> (_)/ \<^raw:\textrm{>then\<^raw:}> (_)/ \<^raw:\textrm{>else\<^raw:}> (_))" 10) and
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  Prc ("'(_, _')") and
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  holding ("holds") and
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  waiting ("waits") and
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  Th ("T") and
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  Cs ("C") and
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  readys ("ready") and
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  depend ("RAG") and 
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  preced ("prec") and
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  cpreced ("cprec") and
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  dependents ("dependants") and
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  cp ("cprec") and
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  holdents ("resources") and
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  original_priority ("priority") and
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  DUMMY  ("\<^raw:\mbox{$\_\!\_$}>")
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(*>*)
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section {* Introduction *}
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text {*
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  Many real-time systems need to support threads involving priorities and
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  locking of resources. Locking of resources ensures mutual exclusion
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  when accessing shared data or devices that cannot be
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  preempted. Priorities allow scheduling of threads that need to
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  finish their work within deadlines.  Unfortunately, both features
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  can interact in subtle ways leading to a problem, called
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  \emph{Priority Inversion}. Suppose three threads having priorities
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  $H$(igh), $M$(edium) and $L$(ow). We would expect that the thread
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  $H$ blocks any other thread with lower priority and itself cannot
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  be blocked by any thread with lower priority. Alas, in a naive
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  implementation of resource looking and priorities this property can
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  be violated. Even worse, $H$ can be delayed indefinitely by
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  threads with lower priorities. For this let $L$ be in the
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  possession of a lock for a resource that also $H$ needs. $H$ must
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  therefore wait for $L$ to exit the critical section and release this
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  lock. The problem is that $L$ might in turn be blocked by any
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  thread with priority $M$, and so $H$ sits there potentially waiting
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  indefinitely. Since $H$ is blocked by threads with lower
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  priorities, the problem is called Priority Inversion. It was first
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  described in \cite{Lampson80} in the context of the
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  Mesa programming language designed for concurrent programming.
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  If the problem of Priority Inversion is ignored, real-time systems
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  can become unpredictable and resulting bugs can be hard to diagnose.
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  The classic example where this happened is the software that
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  controlled the Mars Pathfinder mission in 1997 \cite{Reeves98}.
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  Once the spacecraft landed, the software shut down at irregular
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  intervals leading to loss of project time as normal operation of the
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  craft could only resume the next day (the mission and data already
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  collected were fortunately not lost, because of a clever system
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  design).  The reason for the shutdowns was that the scheduling
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  software fell victim of Priority Inversion: a low priority thread
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  locking a resource prevented a high priority thread from running in
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  time leading to a system reset. Once the problem was found, it was
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  rectified by enabling the \emph{Priority Inheritance Protocol} (PIP)
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  \cite{Sha90}\footnote{Sha et al.~call it the \emph{Basic Priority
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  Inheritance Protocol} \cite{Sha90} and others sometimes also call it
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  \emph{Priority Boosting}.} in the scheduling software.
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  The idea behind PIP is to let the thread $L$ temporarily inherit
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  the high priority from $H$ until $L$ leaves the critical section
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  unlocking the resource. This solves the problem of $H$ having to
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  wait indefinitely, because $L$ cannot be blocked by threads having
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  priority $M$. While a few other solutions exist for the Priority
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  Inversion problem, PIP is one that is widely deployed and
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  implemented. This includes VxWorks (a proprietary real-time OS used
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  in the Mars Pathfinder mission, in Boeing's 787 Dreamliner, Honda's
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  ASIMO robot, etc.), but also the POSIX 1003.1c Standard realised for
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  example in libraries for FreeBSD, Solaris and Linux.
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  One advantage of PIP is that increasing the priority of a thread
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  can be dynamically calculated by the scheduler. This is in contrast
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  to, for example, \emph{Priority Ceiling} \cite{Sha90}, another
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  solution to the Priority Inversion problem, which requires static
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  analysis of the program in order to prevent Priority
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  Inversion. However, there has also been strong criticism against
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  PIP. For instance, PIP cannot prevent deadlocks when lock
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  dependencies are circular, and also blocking times can be
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  substantial (more than just the duration of a critical section).
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  Though, most criticism against PIP centres around unreliable
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  implementations and PIP being too complicated and too inefficient.
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  For example, Yodaiken writes in \cite{Yodaiken02}:
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  \begin{quote}
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  \it{}``Priority inheritance is neither efficient nor reliable. Implementations
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  are either incomplete (and unreliable) or surprisingly complex and intrusive.''
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  \end{quote}
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  \noindent
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  He suggests to avoid PIP altogether by not allowing critical
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  sections to be preempted. Unfortunately, this solution does not
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  help in real-time systems with hard deadlines for high-priority 
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  threads.
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  In our opinion, there is clearly a need for investigating correct
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  algorithms for PIP. A few specifications for PIP exist (in English)
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  and also a few high-level descriptions of implementations (e.g.~in
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  the textbook \cite[Section 5.6.5]{Vahalia96}), but they help little
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  with actual implementations. That this is a problem in practise is
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  proved by an email from Baker, who wrote on 13 July 2009 on the Linux
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  Kernel mailing list:
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  \begin{quote}
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  \it{}``I observed in the kernel code (to my disgust), the Linux PIP
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  implementation is a nightmare: extremely heavy weight, involving
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  maintenance of a full wait-for graph, and requiring updates for a
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  range of events, including priority changes and interruptions of
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  wait operations.''
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  \end{quote}
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  \noindent
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  The criticism by Yodaiken, Baker and others suggests to us to look
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  again at PIP from a more abstract level (but still concrete enough
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  to inform an implementation), and makes PIP an ideal candidate for a
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  formal verification. One reason, of course, is that the original
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  presentation of PIP~\cite{Sha90}, despite being informally
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  ``proved'' correct, is actually \emph{flawed}. 
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  Yodaiken \cite{Yodaiken02} points to a subtlety that had been
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  overlooked in the informal proof by Sha et al. They specify in
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  \cite{Sha90} that after the thread (whose priority has been raised)
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  completes its critical section and releases the lock, it ``returns
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  to its original priority level.'' This leads them to believe that an
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  implementation of PIP is ``rather straightforward''~\cite{Sha90}.
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  Unfortunately, as Yodaiken points out, this behaviour is too
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  simplistic.  Consider the case where the low priority thread $L$
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  locks \emph{two} resources, and two high-priority threads $H$ and
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  $H'$ each wait for one of them.  If $L$ releases one resource
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  so that $H$, say, can proceed, then we still have Priority Inversion
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  with $H'$ (which waits for the other resource). The correct
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  behaviour for $L$ is to revert to the highest remaining priority of
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  the threads that it blocks. The advantage of formalising the
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  correctness of a high-level specification of PIP in a theorem prover
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  is that such issues clearly show up and cannot be overlooked as in
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  informal reasoning (since we have to analyse all possible behaviours
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  of threads, i.e.~\emph{traces}, that could possibly happen).\medskip
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  \noindent
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  {\bf Contributions:} There have been earlier formal investigations
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  into PIP \cite{Faria08,Jahier09,Wellings07}, but they employ model
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  checking techniques. This paper presents a formalised and
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  mechanically checked proof for the correctness of PIP (to our
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  knowledge the first one; the earlier informal proof by Sha et
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  al.~\cite{Sha90} is flawed).  In contrast to model checking, our
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  formalisation provides insight into why PIP is correct and allows us
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  to prove stronger properties that, as we will show, can inform an
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  implementation.  For example, we found by ``playing'' with the formalisation
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  that the choice of the next thread to take over a lock when a
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  resource is released is irrelevant for PIP being correct. Something
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  which has not been mentioned in the relevant literature.
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*}
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section {* Formal Model of the Priority Inheritance Protocol *}
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text {*
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  The Priority Inheritance Protocol, short PIP, is a scheduling
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  algorithm for a single-processor system.\footnote{We shall come back
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  later to the case of PIP on multi-processor systems.} Our model of
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  PIP is based on Paulson's inductive approach to protocol
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  verification \cite{Paulson98}, where the \emph{state} of a system is
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  given by a list of events that happened so far.  \emph{Events} of PIP fall
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  into five categories defined as the datatype:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{r@ {\hspace{2mm}}c@ {\hspace{2mm}}l@ {\hspace{7mm}}l}
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  \isacommand{datatype} event 
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  & @{text "="} & @{term "Create thread priority"}\\
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  & @{text "|"} & @{term "Exit thread"} \\
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  & @{text "|"} & @{term "Set thread priority"} & {\rm reset of the priority for} @{text thread}\\
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  & @{text "|"} & @{term "P thread cs"} & {\rm request of resource} @{text "cs"} {\rm by} @{text "thread"}\\
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  & @{text "|"} & @{term "V thread cs"} & {\rm release of resource} @{text "cs"} {\rm by} @{text "thread"}
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  whereby threads, priorities and (critical) resources are represented
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  as natural numbers. The event @{term Set} models the situation that
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  a thread obtains a new priority given by the programmer or
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  user (for example via the {\tt nice} utility under UNIX).  As in Paulson's work, we
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  need to define functions that allow us to make some observations
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  about states.  One, called @{term threads}, calculates the set of
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  ``live'' threads that we have seen so far:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) threads.simps(1)} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(1)}\\
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  @{thm (lhs) threads.simps(2)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(2)[where thread="th"]}\\
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  @{thm (lhs) threads.simps(3)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(3)[where thread="th"]}\\
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  @{term "threads (DUMMY#s)"} & @{text "\<equiv>"} & @{term "threads s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition @{term "DUMMY # DUMMY"} stands for list-cons.
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  Another function calculates the priority for a thread @{text "th"}, which is 
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  defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) original_priority.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(1)[where thread="th"]}\\
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  @{thm (lhs) original_priority.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) original_priority.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "original_priority th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "original_priority th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition we set @{text 0} as the default priority for
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  threads that have not (yet) been created. The last function we need 
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  calculates the ``time'', or index, at which time a process had its 
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  priority last set.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) birthtime.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(1)[where thread="th"]}\\
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  @{thm (lhs) birthtime.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) birthtime.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "birthtime th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "birthtime th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition @{term "length s"} stands for the length of the list
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  of events @{text s}. Again the default value in this function is @{text 0}
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  for threads that have not been created yet. A \emph{precedence} of a thread @{text th} in a 
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  state @{text s} is the pair of natural numbers defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm preced_def[where thread="th"]}
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  \end{isabelle}
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  \noindent
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  The point of precedences is to schedule threads not according to priorities (because what should
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  we do in case two threads have the same priority), but according to precedences. 
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  Precedences allow us to always discriminate between two threads with equal priority by 
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  taking into account the time when the priority was last set. We order precedences so 
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  that threads with the same priority get a higher precedence if their priority has been 
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  set earlier, since for such threads it is more urgent to finish their work. In an implementation
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  this choice would translate to a quite natural FIFO-scheduling of processes with 
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  the same priority.
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  Next, we introduce the concept of \emph{waiting queues}. They are
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  lists of threads associated with every resource. The first thread in
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  this list (i.e.~the head, or short @{term hd}) is chosen to be the one 
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  that is in possession of the
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  ``lock'' of the corresponding resource. We model waiting queues as
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  functions, below abbreviated as @{text wq}. They take a resource as
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  argument and return a list of threads.  This allows us to define
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  when a thread \emph{holds}, respectively \emph{waits} for, a
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  resource @{text cs} given a waiting queue function @{text wq}.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \begin{tabular}{@ {}l}
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  @{thm cs_holding_def[where thread="th"]}\\
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  @{thm cs_waiting_def[where thread="th"]}
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  \end{tabular}
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  \end{isabelle}
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  \noindent
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  In this definition we assume @{text "set"} converts a list into a set.
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  At the beginning, that is in the state where no thread is created yet, 
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  the waiting queue function will be the function that returns the
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  empty list for every resource.
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{abbrev all_unlocked}\hfill\numbered{allunlocked}
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  \end{isabelle}
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  \noindent
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  Using @{term "holding"} and @{term waiting}, we can introduce \emph{Resource Allocation Graphs} 
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  (RAG), which represent the dependencies between threads and resources.
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  We represent RAGs as relations using pairs of the form
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{term "(Th th, Cs cs)"} \hspace{5mm}{\rm and}\hspace{5mm}
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  @{term "(Cs cs, Th th)"}
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  \end{isabelle}
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  \noindent
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  where the first stands for a \emph{waiting edge} and the second for a 
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  \emph{holding edge} (@{term Cs} and @{term Th} are constructors of a 
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  datatype for vertices). Given a waiting queue function, a RAG is defined 
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  as the union of the sets of waiting and holding edges, namely
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cs_depend_def}
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  \end{isabelle}
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  \noindent
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  Given three threads and three resources, an instance of a RAG can be pictured 
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  as follows:
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  \begin{center}
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  \newcommand{\fnt}{\fontsize{7}{8}\selectfont}
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  \begin{tikzpicture}[scale=1]
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  %%\draw[step=2mm] (-3,2) grid (1,-1);
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  \node (A) at (0,0) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>0"}};
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  \node (B) at (2,0) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>1"}};
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  \node (C) at (4,0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>1"}};
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  \node (D) at (4,-0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>2"}};
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  \node (E) at (6,-0.7) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>2"}};
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  \node (E1) at (6, 0.2) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>3"}};
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  \node (F) at (8,-0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>3"}};
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  \draw [<-,line width=0.6mm] (A) to node [pos=0.54,sloped,above=-0.5mm] {\fnt{}holding}  (B);
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  \draw [->,line width=0.6mm] (C) to node [pos=0.4,sloped,above=-0.5mm] {\fnt{}waiting}  (B);
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  \draw [->,line width=0.6mm] (D) to node [pos=0.4,sloped,below=-0.5mm] {\fnt{}waiting}  (B);
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  \draw [<-,line width=0.6mm] (D) to node [pos=0.54,sloped,below=-0.5mm] {\fnt{}holding}  (E);
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  \draw [<-,line width=0.6mm] (D) to node [pos=0.54,sloped,above=-0.5mm] {\fnt{}holding}  (E1);
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  \draw [->,line width=0.6mm] (F) to node [pos=0.45,sloped,below=-0.5mm] {\fnt{}waiting}  (E);
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  \end{tikzpicture}
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  \end{center}
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  \noindent
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  The use of relations for representing RAGs allows us to conveniently define
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  the notion of the \emph{dependants} of a thread using the transitive closure
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  operation for relations. This gives
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   342
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cs_dependents_def}
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  \end{isabelle}
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  \noindent
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   348
  This definition needs to account for all threads that wait for a thread to
290
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   349
  release a resource. This means we need to include threads that transitively
298
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  wait for a resource being released (in the picture above this means the dependants
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  of @{text "th\<^isub>0"} are @{text "th\<^isub>1"} and @{text "th\<^isub>2"}, which wait for resource @{text "cs\<^isub>1"}, 
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  but also @{text "th\<^isub>3"}, 
298
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  which cannot make any progress unless @{text "th\<^isub>2"} makes progress, which
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   354
  in turn needs to wait for @{text "th\<^isub>0"} to finish). If there is a circle in a RAG, then clearly
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  we have a deadlock. Therefore when a thread requests a resource,
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  we must ensure that the resulting RAG is not circular. 
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   357
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  Next we introduce the notion of the \emph{current precedence} of a thread @{text th} in a 
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  state @{text s}. It is defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cpreced_def2}\hfill\numbered{cpreced}
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  \end{isabelle}
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   364
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   365
  \noindent
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   366
  where the dependants of @{text th} are given by the waiting queue function.
293
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   367
  While the precedence @{term prec} of a thread is determined by the programmer 
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   368
  (for example when the thread is
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   369
  created), the point of the current precedence is to let the scheduler increase this
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   370
  precedence, if needed according to PIP. Therefore the current precedence of @{text th} is
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  given as the maximum of the precedence @{text th} has in state @{text s} \emph{and} all 
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   372
  threads that are dependants of @{text th}. Since the notion @{term "dependants"} is
291
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   373
  defined as the transitive closure of all dependent threads, we deal correctly with the 
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   374
  problem in the informal algorithm by Sha et al.~\cite{Sha90} where a priority of a thread is
291
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   375
  lowered prematurely.
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   376
  
298
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   377
  The next function, called @{term schs}, defines the behaviour of the scheduler. It will be defined
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   378
  by recursion on the state (a list of events); this function returns a \emph{schedule state}, which 
298
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  we represent as a record consisting of two
296
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   380
  functions:
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   381
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   382
  \begin{isabelle}\ \ \ \ \ %%%
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   383
  @{text "\<lparr>wq_fun, cprec_fun\<rparr>"}
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   384
  \end{isabelle}
291
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diff changeset
   385
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   386
  \noindent
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   387
  The first function is a waiting queue function (that is, it takes a resource @{text "cs"} and returns the
296
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   388
  corresponding list of threads that wait for it), the second is a function that takes
299
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   389
  a thread and returns its current precedence (see \eqref{cpreced}). We assume the usual getter and 
296
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   390
  setter methods for such records.
294
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diff changeset
   391
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   392
  In the initial state, the scheduler starts with all resources unlocked (the corresponding 
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   393
  function is defined in \eqref{allunlocked}) and the
298
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   394
  current precedence of every thread is initialised with @{term "Prc 0 0"}; that means 
299
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   395
  \mbox{@{abbrev initial_cprec}}. Therefore
306
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   396
  we have for the initial state
291
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diff changeset
   397
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   398
  \begin{isabelle}\ \ \ \ \ %%%
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diff changeset
   399
  \begin{tabular}{@ {}l}
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   400
  @{thm (lhs) schs.simps(1)} @{text "\<equiv>"}\\ 
294
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   401
  \hspace{5mm}@{term "(|wq_fun = all_unlocked, cprec_fun = (\<lambda>_::thread. Prc 0 0)|)"}
291
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diff changeset
   402
  \end{tabular}
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diff changeset
   403
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   404
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   405
  \noindent
296
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   406
  The cases for @{term Create}, @{term Exit} and @{term Set} are also straightforward:
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diff changeset
   407
  we calculate the waiting queue function of the (previous) state @{text s}; 
298
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   408
  this waiting queue function @{text wq} is unchanged in the next schedule state---because
306
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   409
  none of these events lock or release any resource; 
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   410
  for calculating the next @{term "cprec_fun"}, we use @{text wq} and 
298
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   411
  @{term cpreced}. This gives the following three clauses for @{term schs}:
290
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diff changeset
   412
6a6d0bd16035 more on paper
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   413
  \begin{isabelle}\ \ \ \ \ %%%
291
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diff changeset
   414
  \begin{tabular}{@ {}l}
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   415
  @{thm (lhs) schs.simps(2)} @{text "\<equiv>"}\\ 
294
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diff changeset
   416
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
298
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diff changeset
   417
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Create th prio # s)|)"}\smallskip\\
291
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diff changeset
   418
  @{thm (lhs) schs.simps(3)} @{text "\<equiv>"}\\
294
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diff changeset
   419
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
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   420
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Exit th # s)|)"}\smallskip\\
291
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diff changeset
   421
  @{thm (lhs) schs.simps(4)} @{text "\<equiv>"}\\ 
294
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diff changeset
   422
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
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diff changeset
   423
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Set th prio # s)|)"}
291
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diff changeset
   424
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   425
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   426
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   427
  \noindent 
306
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diff changeset
   428
  More interesting are the cases where a resource, say @{text cs}, is locked or released. In these cases
300
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diff changeset
   429
  we need to calculate a new waiting queue function. For the event @{term "P th cs"}, we have to update
306
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diff changeset
   430
  the function so that the new thread list for @{text cs} is the old thread list plus the thread @{text th} 
300
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diff changeset
   431
  appended to the end of that list (remember the head of this list is seen to be in the possession of this
306
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diff changeset
   432
  resource). This gives the clause
291
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diff changeset
   433
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   434
  \begin{isabelle}\ \ \ \ \ %%%
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diff changeset
   435
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   436
  @{thm (lhs) schs.simps(5)} @{text "\<equiv>"}\\ 
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   437
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
291
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diff changeset
   438
  \hspace{5mm}@{text "let"} @{text "new_wq = wq(cs := (wq cs @ [th]))"} @{text "in"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   439
  \hspace{8mm}@{term "(|wq_fun = new_wq, cprec_fun = cpreced new_wq (P th cs # s)|)"}
291
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diff changeset
   440
  \end{tabular}
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diff changeset
   441
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   442
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   443
  \noindent
300
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diff changeset
   444
  The clause for event @{term "V th cs"} is similar, except that we need to update the waiting queue function
301
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diff changeset
   445
  so that the thread that possessed the lock is deleted from the corresponding thread list. For this 
urbanc
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diff changeset
   446
  list transformation, we use
296
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diff changeset
   447
  the auxiliary function @{term release}. A simple version of @{term release} would
306
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diff changeset
   448
  just delete this thread and return the remaining threads, namely
291
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diff changeset
   449
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   450
  \begin{isabelle}\ \ \ \ \ %%%
296
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diff changeset
   451
  \begin{tabular}{@ {}lcl}
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   452
  @{term "release []"} & @{text "\<equiv>"} & @{term "[]"}\\
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   453
  @{term "release (DUMMY # qs)"} & @{text "\<equiv>"} & @{term "qs"}\\
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diff changeset
   454
  \end{tabular}
291
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diff changeset
   455
  \end{isabelle}
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diff changeset
   456
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   457
  \noindent
300
8524f94d251b correct RAG
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diff changeset
   458
  In practice, however, often the thread with the highest precedence in the list will get the
296
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diff changeset
   459
  lock next. We have implemented this choice, but later found out that the choice 
300
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diff changeset
   460
  of which thread is chosen next is actually irrelevant for the correctness of PIP.
296
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diff changeset
   461
  Therefore we prove the stronger result where @{term release} is defined as
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diff changeset
   462
2c8dcf010567 spell check; release
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diff changeset
   463
  \begin{isabelle}\ \ \ \ \ %%%
2c8dcf010567 spell check; release
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diff changeset
   464
  \begin{tabular}{@ {}lcl}
2c8dcf010567 spell check; release
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diff changeset
   465
  @{term "release []"} & @{text "\<equiv>"} & @{term "[]"}\\
2c8dcf010567 spell check; release
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diff changeset
   466
  @{term "release (DUMMY # qs)"} & @{text "\<equiv>"} & @{term "SOME qs'. distinct qs' \<and> set qs' = set qs"}\\
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diff changeset
   467
  \end{tabular}
2c8dcf010567 spell check; release
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diff changeset
   468
  \end{isabelle}
2c8dcf010567 spell check; release
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diff changeset
   469
2c8dcf010567 spell check; release
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diff changeset
   470
  \noindent
306
5113aa1ae69a some polishing
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diff changeset
   471
  where @{text "SOME"} stands for Hilbert's epsilon and implements an arbitrary
298
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diff changeset
   472
  choice for the next waiting list. It just has to be a list of distinctive threads and
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diff changeset
   473
  contain the same elements as @{text "qs"}. This gives for @{term V} the clause:
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   474
 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   475
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   476
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   477
  @{thm (lhs) schs.simps(6)} @{text "\<equiv>"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   478
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   479
  \hspace{5mm}@{text "let"} @{text "new_wq = release (wq cs)"} @{text "in"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   480
  \hspace{8mm}@{term "(|wq_fun = new_wq, cprec_fun = cpreced new_wq (V th cs # s)|)"}
291
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diff changeset
   481
  \end{tabular}
290
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diff changeset
   482
  \end{isabelle}
6a6d0bd16035 more on paper
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diff changeset
   483
300
8524f94d251b correct RAG
urbanc
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diff changeset
   484
  Having the scheduler function @{term schs} at our disposal, we can ``lift'', or
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   485
  overload, the notions
8524f94d251b correct RAG
urbanc
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diff changeset
   486
  @{term waiting}, @{term holding}, @{term depend} and @{term cp} to operate on states only.
286
572f202659ff corrections by Xingyuan
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parents: 285
diff changeset
   487
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   488
  \begin{isabelle}\ \ \ \ \ %%%
298
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diff changeset
   489
  \begin{tabular}{@ {}rcl}
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   490
  @{thm (lhs) s_holding_abv} & @{text "\<equiv>"} & @{thm (rhs) s_holding_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   491
  @{thm (lhs) s_waiting_abv} & @{text "\<equiv>"} & @{thm (rhs) s_waiting_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   492
  @{thm (lhs) s_depend_abv}  & @{text "\<equiv>"} & @{thm (rhs) s_depend_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   493
  @{thm (lhs) cp_def}        & @{text "\<equiv>"} & @{thm (rhs) cp_def}
287
440382eb6427 more on the specification section
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parents: 286
diff changeset
   494
  \end{tabular}
440382eb6427 more on the specification section
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parents: 286
diff changeset
   495
  \end{isabelle}
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parents: 286
diff changeset
   496
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   497
  \noindent
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   498
  With these abbreviations we can introduce 
8524f94d251b correct RAG
urbanc
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diff changeset
   499
  the notion of threads being @{term readys} in a state (i.e.~threads
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   500
  that do not wait for any resource) and the running thread.
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   501
287
440382eb6427 more on the specification section
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parents: 286
diff changeset
   502
  \begin{isabelle}\ \ \ \ \ %%%
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parents: 286
diff changeset
   503
  \begin{tabular}{@ {}l}
440382eb6427 more on the specification section
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parents: 286
diff changeset
   504
  @{thm readys_def}\\
440382eb6427 more on the specification section
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parents: 286
diff changeset
   505
  @{thm runing_def}\\
286
572f202659ff corrections by Xingyuan
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parents: 285
diff changeset
   506
  \end{tabular}
572f202659ff corrections by Xingyuan
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parents: 285
diff changeset
   507
  \end{isabelle}
284
d296cb127fcb more on paper
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diff changeset
   508
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   509
  \noindent
306
5113aa1ae69a some polishing
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diff changeset
   510
  In this definition @{term "DUMMY ` DUMMY"} stands for the image of a set under a function.
5113aa1ae69a some polishing
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diff changeset
   511
  Note that in the initial state, that is where the list of events is empty, the set 
309
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diff changeset
   512
  @{term threads} is empty and therefore there is neither a thread ready nor running.
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   513
  If there is one or more threads ready, then there can only be \emph{one} thread
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   514
  running, namely the one whose current precedence is equal to the maximum of all ready 
304
bd05c5011c0f contribution section
urbanc
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diff changeset
   515
  threads. We use the set-comprehension to capture both possibilities.
306
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diff changeset
   516
  We can now also conveniently define the set of resources that are locked by a thread in a
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   517
  given state.
284
d296cb127fcb more on paper
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parents: 283
diff changeset
   518
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   519
  \begin{isabelle}\ \ \ \ \ %%%
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   520
  @{thm holdents_def}
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diff changeset
   521
  \end{isabelle}
284
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diff changeset
   522
306
5113aa1ae69a some polishing
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parents: 305
diff changeset
   523
  Finally we can define what a \emph{valid state} is in our model of PIP. For
304
bd05c5011c0f contribution section
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diff changeset
   524
  example we cannot expect to be able to exit a thread, if it was not
306
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diff changeset
   525
  created yet. These validity constraints on states are characterised by the
5113aa1ae69a some polishing
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parents: 305
diff changeset
   526
  inductive predicate @{term "step"} and @{term vt}. We first give five inference rules
5113aa1ae69a some polishing
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diff changeset
   527
  for @{term step} relating a state and an event that can happen next.
284
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parents: 283
diff changeset
   528
d296cb127fcb more on paper
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parents: 283
diff changeset
   529
  \begin{center}
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diff changeset
   530
  \begin{tabular}{c}
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diff changeset
   531
  @{thm[mode=Rule] thread_create[where thread=th]}\hspace{1cm}
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   532
  @{thm[mode=Rule] thread_exit[where thread=th]}
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   533
  \end{tabular}
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   534
  \end{center}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   535
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   536
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   537
  The first rule states that a thread can only be created, if it does not yet exists.
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   538
  Similarly, the second rule states that a thread can only be terminated if it was
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   539
  running and does not lock any resources anymore (this simplifies slightly our model;
5113aa1ae69a some polishing
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parents: 305
diff changeset
   540
  in practice we would expect the operating system releases all held lock of a
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   541
  thread that is about to exit). The event @{text Set} can happen
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   542
  if the corresponding thread is running. 
284
d296cb127fcb more on paper
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parents: 283
diff changeset
   543
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   544
  \begin{center}
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   545
  @{thm[mode=Rule] thread_set[where thread=th]}
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   546
  \end{center}
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   547
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   548
  \noindent
301
urbanc
parents: 300
diff changeset
   549
  If a thread wants to lock a resource, then the thread needs to be
urbanc
parents: 300
diff changeset
   550
  running and also we have to make sure that the resource lock does
urbanc
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diff changeset
   551
  not lead to a cycle in the RAG. In practice, ensuring the latter is
306
5113aa1ae69a some polishing
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diff changeset
   552
  of course the responsibility of the programmer.  In our formal
310
4d93486cb302 polished
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diff changeset
   553
  model we just exclude such problematic cases in order to be able to make
301
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diff changeset
   554
  some meaningful statements about PIP.\footnote{This situation is
310
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diff changeset
   555
  similar to the infamous occurs check in Prolog: In order to say
306
5113aa1ae69a some polishing
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diff changeset
   556
  anything meaningful about unification, one needs to perform an occurs
310
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diff changeset
   557
  check. But in practice the occurs check is ommited and the
306
5113aa1ae69a some polishing
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parents: 305
diff changeset
   558
  responsibility for avoiding problems rests with the programmer.}
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   559
 
5113aa1ae69a some polishing
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parents: 305
diff changeset
   560
  \begin{center}
5113aa1ae69a some polishing
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parents: 305
diff changeset
   561
  @{thm[mode=Rule] thread_P[where thread=th]}
5113aa1ae69a some polishing
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parents: 305
diff changeset
   562
  \end{center}
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   563
 
5113aa1ae69a some polishing
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diff changeset
   564
  \noindent
301
urbanc
parents: 300
diff changeset
   565
  Similarly, if a thread wants to release a lock on a resource, then
urbanc
parents: 300
diff changeset
   566
  it must be running and in the possession of that lock. This is
306
5113aa1ae69a some polishing
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diff changeset
   567
  formally given by the last inference rule of @{term step}.
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   568
 
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   569
  \begin{center}
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   570
  @{thm[mode=Rule] thread_V[where thread=th]}
284
d296cb127fcb more on paper
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diff changeset
   571
  \end{center}
306
5113aa1ae69a some polishing
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parents: 305
diff changeset
   572
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   573
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
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diff changeset
   574
  A valid state of PIP can then be conveniently be defined as follows:
284
d296cb127fcb more on paper
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diff changeset
   575
d296cb127fcb more on paper
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parents: 283
diff changeset
   576
  \begin{center}
d296cb127fcb more on paper
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parents: 283
diff changeset
   577
  \begin{tabular}{c}
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   578
  @{thm[mode=Axiom] vt_nil}\hspace{1cm}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
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diff changeset
   579
  @{thm[mode=Rule] vt_cons}
284
d296cb127fcb more on paper
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diff changeset
   580
  \end{tabular}
d296cb127fcb more on paper
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parents: 283
diff changeset
   581
  \end{center}
d296cb127fcb more on paper
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parents: 283
diff changeset
   582
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   583
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   584
  This completes our formal model of PIP. In the next section we present
309
e44c4055d430 more on the paper
urbanc
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diff changeset
   585
  properties that show our model of PIP is correct.
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   586
*}
274
83b0317370c2 more on intro
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parents: 273
diff changeset
   587
310
4d93486cb302 polished
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parents: 309
diff changeset
   588
section {* The Correctness Proof *}
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   589
301
urbanc
parents: 300
diff changeset
   590
(*<*)
urbanc
parents: 300
diff changeset
   591
context extend_highest_gen
urbanc
parents: 300
diff changeset
   592
begin
urbanc
parents: 300
diff changeset
   593
print_locale extend_highest_gen
urbanc
parents: 300
diff changeset
   594
thm extend_highest_gen_def
urbanc
parents: 300
diff changeset
   595
thm extend_highest_gen_axioms_def
urbanc
parents: 300
diff changeset
   596
thm highest_gen_def
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   597
(*>*)
301
urbanc
parents: 300
diff changeset
   598
text {* 
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   599
  Sha et al.~\cite[Theorem 6]{Sha90} state their correctness criterion for PIP in terms
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   600
  of the number of critical resources: if there are @{text m} critical
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   601
  resources, then a blocked job can only be blocked @{text m} times---that is
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   602
  a bounded number of times.
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   603
  For their version of PIP, this property is \emph{not} true (as pointed out by 
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   604
  Yodaiken \cite{Yodaiken02}) as a high-priority thread can be
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   605
  blocked an unbounded number of times by creating medium-priority
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   606
  threads that block a thread, which in turn locks a critical resource and has
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   607
  too low priority to make progress. In the way we have set up our formal model of PIP, 
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   608
  their proof idea, even when fixed, does not seem to go through.
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   609
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   610
  The idea behind our correctness criterion of PIP is as follows: for all states
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   611
  @{text s}, we know the corresponding thread @{text th} with the highest precedence;
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   612
  we show that in every future state (denoted by @{text "s' @ s"}) in which
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   613
  @{text th} is still alive, either @{text th} is running or it is blocked by a 
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   614
  thread that was alive in the state @{text s}. Since in @{text s}, as in every 
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   615
  state, the set of alive threads is finite, @{text th} can only be blocked a
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   616
  finite number of times. We will actually prove a stricter bound below. However,
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   617
  this correctness criterion hinges upon a number of assumptions about the states
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   618
  @{text s} and @{text "s' @ s"}, the thread @{text th} and the events happening
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   619
  in @{text s'}. We list them next:
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   620
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   621
  \begin{quote}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   622
  {\bf Assumptions on the states @{text s} and @{text "s' @ s"}:} In order to make 
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   623
  any meaningful statement, we need to require that @{text "s"} and 
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   624
  @{text "s' @ s"} are valid states, namely
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   625
  \begin{isabelle}\ \ \ \ \ %%%
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   626
  \begin{tabular}{l}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   627
  @{term "vt s"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   628
  @{term "vt (s' @ s)"} 
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   629
  \end{tabular}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   630
  \end{isabelle}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   631
  \end{quote}
301
urbanc
parents: 300
diff changeset
   632
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   633
  \begin{quote}
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   634
  {\bf Assumptions on the thread @{text "th"}:} The thread @{text th} must be alive in @{text s} and 
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   635
  has the highest precedence of all alive threads in @{text s}. Furthermore the
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   636
  priority of @{text th} is @{text prio} (we need this in the next assumptions).
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   637
  \begin{isabelle}\ \ \ \ \ %%%
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   638
  \begin{tabular}{l}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   639
  @{term "th \<in> threads s"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   640
  @{term "prec th s = Max (cprec s ` threads s)"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   641
  @{term "prec th s = (prio, DUMMY)"}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   642
  \end{tabular}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   643
  \end{isabelle}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   644
  \end{quote}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   645
  
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   646
  \begin{quote}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   647
  {\bf Assumptions on the events in @{text "s'"}:} We want to prove that @{text th} cannot
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   648
  be blocked indefinitely. Of course this can happen if threads with higher priority
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   649
  than @{text th} are continously created in @{text s'}. Therefore we have to assume that  
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   650
  events in @{text s'} can only create (respectively set) threads with equal or lower 
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   651
  priority than @{text prio} of @{text th}. We also need to assume that the
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   652
  priority of @{text "th"} does not get reset and also that @{text th} does
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   653
  not get ``exited'' in @{text "s'"}. This can be ensured by assuming the following three implications. 
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   654
  \begin{isabelle}\ \ \ \ \ %%%
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   655
  \begin{tabular}{l}
310
4d93486cb302 polished
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parents: 309
diff changeset
   656
  {If}~~@{text "Create th' prio' \<in> set s'"}~~{then}~~@{text "prio' \<le> prio"}\\
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   657
  {If}~~@{text "Set th' prio' \<in> set s'"}~~{then}~~@{text "th' \<noteq> th"}~~{and}~~@{text "prio' \<le> prio"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   658
  {If}~~@{text "Exit th' \<in> set s'"}~~{then}~~@{text "th' \<noteq> th"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   659
  \end{tabular}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   660
  \end{isabelle}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   661
  \end{quote}
301
urbanc
parents: 300
diff changeset
   662
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   663
  \noindent
310
4d93486cb302 polished
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parents: 309
diff changeset
   664
  Under these assumptions we will prove the following correctness property:
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   665
308
a401d2dff7d0 more on the paper
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parents: 307
diff changeset
   666
  \begin{theorem}\label{mainthm}
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   667
  Given the assumptions about states @{text "s"} and @{text "s' @ s"},
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   668
  the thread @{text th} and the events in @{text "s'"},
a401d2dff7d0 more on the paper
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parents: 307
diff changeset
   669
  if @{term "th' \<in> running (s' @ s)"} and @{text "th' \<noteq> th"} then
a401d2dff7d0 more on the paper
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parents: 307
diff changeset
   670
  @{text "th' \<in> threads s"}.
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   671
  \end{theorem}
301
urbanc
parents: 300
diff changeset
   672
308
a401d2dff7d0 more on the paper
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parents: 307
diff changeset
   673
  \noindent
a401d2dff7d0 more on the paper
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parents: 307
diff changeset
   674
  This theorem ensures that the thread @{text th}, which has the highest 
a401d2dff7d0 more on the paper
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parents: 307
diff changeset
   675
  precedence in the state @{text s}, can only be blocked in the state @{text "s' @ s"} 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   676
  by a thread @{text th'} that already existed in @{text s}. As we shall see shortly,
a401d2dff7d0 more on the paper
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parents: 307
diff changeset
   677
  that means by only finitely many threads. Consequently, indefinite wait of
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   678
  @{text th}---which would be Priority Inversion---cannot occur.
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   679
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   680
  In what follows we will describe properties of PIP that allow us to prove 
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urbanc
parents: 308
diff changeset
   681
  Theorem~\ref{mainthm}. It is relatively easily to see that
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   682
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   683
  \begin{isabelle}\ \ \ \ \ %%%
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urbanc
parents: 308
diff changeset
   684
  \begin{tabular}{@ {}l}
e44c4055d430 more on the paper
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parents: 308
diff changeset
   685
  @{text "running s \<subseteq> ready s \<subseteq> threads s"}\\
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   686
  @{thm[mode=IfThen]  finite_threads}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   687
  \end{tabular}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   688
  \end{isabelle}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   689
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   690
  \noindent
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   691
  where the second property is by induction of @{term vt}. The next three
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   692
  properties are 
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   693
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   694
  \begin{isabelle}\ \ \ \ \ %%%
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   695
  \begin{tabular}{@ {}l}
e44c4055d430 more on the paper
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parents: 308
diff changeset
   696
  @{thm[mode=IfThen] waiting_unique[of _ _ "cs\<^isub>1" "cs\<^isub>2"]}\\
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   697
  @{thm[mode=IfThen] held_unique[of _ "th\<^isub>1" _ "th\<^isub>2"]}\\
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   698
  @{thm[mode=IfThen] runing_unique[of _ "th\<^isub>1" "th\<^isub>2"]}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   699
  \end{tabular}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   700
  \end{isabelle}
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   701
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   702
  \noindent
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   703
  The first one states that every waiting thread can only wait for a single
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   704
  resource (because it gets suspended after requesting that resource and having
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   705
  to wait for it); the second that every resource can only be held by a single thread; 
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   706
  the third property establishes that in every given valid state, there is
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   707
  at most one running thread. We can also show the following properties 
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   708
  about the RAG in @{text "s"}.
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   709
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   710
  \begin{isabelle}\ \ \ \ \ %%%
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   711
  \begin{tabular}{@ {}l}
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   712
  @{text If}~@{thm (prem 1) acyclic_depend}~@{text "then"}:\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   713
  \hspace{5mm}@{thm (concl) acyclic_depend},
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   714
  @{thm (concl) finite_depend} and
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   715
  @{thm (concl) wf_dep_converse},\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   716
  \hspace{5mm}@{text "if"}~@{thm (prem 2) dm_depend_threads}~@{text "then"}~@{thm (concl) dm_depend_threads}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   717
  \hspace{5mm}@{text "if"}~@{thm (prem 2) range_in}~@{text "then"}~@{thm (concl) range_in}
310
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parents: 309
diff changeset
   718
  \end{tabular}
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   719
  \end{isabelle}
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   720
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   721
  TODO
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   722
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   723
  \noindent
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   724
  The following lemmas show how RAG is changed with the execution of events:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   725
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   726
  \item Execution of @{term "Set"} does not change RAG (@{text "depend_set_unchanged"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   727
    @{thm[display] depend_set_unchanged}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   728
  \item Execution of @{term "Create"} does not change RAG (@{text "depend_create_unchanged"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   729
    @{thm[display] depend_create_unchanged}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   730
  \item Execution of @{term "Exit"} does not change RAG (@{text "depend_exit_unchanged"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   731
    @{thm[display] depend_exit_unchanged}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   732
  \item Execution of @{term "P"} (@{text "step_depend_p"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   733
    @{thm[display] step_depend_p}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   734
  \item Execution of @{term "V"} (@{text "step_depend_v"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   735
    @{thm[display] step_depend_v}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   736
  \end{enumerate}
a401d2dff7d0 more on the paper
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parents: 307
diff changeset
   737
  *}
301
urbanc
parents: 300
diff changeset
   738
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   739
text {* \noindent
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   740
  These properties are used to derive the following important results about RAG:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   741
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   742
  \item RAG is loop free (@{text "acyclic_depend"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   743
  @{thm [display] acyclic_depend}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   744
  \item RAGs are finite (@{text "finite_depend"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   745
  @{thm [display] finite_depend}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   746
  \item Reverse paths in RAG are well founded (@{text "wf_dep_converse"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   747
  @{thm [display] wf_dep_converse}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   748
  \item The dependence relation represented by RAG has a tree structure (@{text "unique_depend"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   749
  @{thm [display] unique_depend[of _ _ "n\<^isub>1" "n\<^isub>2"]}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   750
  \item All threads in RAG are living threads 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   751
    (@{text "dm_depend_threads"} and @{text "range_in"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   752
    @{thm [display] dm_depend_threads range_in}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   753
  \end{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   754
  *}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   755
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   756
text {* \noindent
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   757
  The following lemmas show how every node in RAG can be chased to ready threads:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   758
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   759
  \item Every node in RAG can be chased to a ready thread (@{text "chain_building"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   760
    @{thm [display] chain_building[rule_format]}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   761
  \item The ready thread chased to is unique (@{text "dchain_unique"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   762
    @{thm [display] dchain_unique[of _ _ "th\<^isub>1" "th\<^isub>2"]}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   763
  \end{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   764
  *}
301
urbanc
parents: 300
diff changeset
   765
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   766
text {* \noindent
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   767
  Properties about @{term "next_th"}:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   768
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   769
  \item The thread taking over is different from the thread which is releasing
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   770
  (@{text "next_th_neq"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   771
  @{thm [display] next_th_neq}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   772
  \item The thread taking over is unique
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   773
  (@{text "next_th_unique"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   774
  @{thm [display] next_th_unique[of _ _ _ "th\<^isub>1" "th\<^isub>2"]}  
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   775
  \end{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   776
  *}
301
urbanc
parents: 300
diff changeset
   777
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   778
text {* \noindent
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   779
  Some deeper results about the system:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   780
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   781
  \item The maximum of @{term "cp"} and @{term "preced"} are equal (@{text "max_cp_eq"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   782
  @{thm [display] max_cp_eq}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   783
  \item There must be one ready thread having the max @{term "cp"}-value 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   784
  (@{text "max_cp_readys_threads"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   785
  @{thm [display] max_cp_readys_threads}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   786
  \end{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   787
  *}
301
urbanc
parents: 300
diff changeset
   788
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   789
text {* \noindent
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   790
  The relationship between the count of @{text "P"} and @{text "V"} and the number of 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   791
  critical resources held by a thread is given as follows:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   792
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   793
  \item The @{term "V"}-operation decreases the number of critical resources 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   794
    one thread holds (@{text "cntCS_v_dec"})
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   795
     @{thm [display]  cntCS_v_dec}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   796
  \item The number of @{text "V"} never exceeds the number of @{text "P"} 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   797
    (@{text "cnp_cnv_cncs"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   798
    @{thm [display]  cnp_cnv_cncs}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   799
  \item The number of @{text "V"} equals the number of @{text "P"} when 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   800
    the relevant thread is not living:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   801
    (@{text "cnp_cnv_eq"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   802
    @{thm [display]  cnp_cnv_eq}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   803
  \item When a thread is not living, it does not hold any critical resource 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   804
    (@{text "not_thread_holdents"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   805
    @{thm [display] not_thread_holdents}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   806
  \item When the number of @{text "P"} equals the number of @{text "V"}, the relevant 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   807
    thread does not hold any critical resource, therefore no thread can depend on it
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   808
    (@{text "count_eq_dependents"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   809
    @{thm [display] count_eq_dependents}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   810
  \end{enumerate}
301
urbanc
parents: 300
diff changeset
   811
*}
urbanc
parents: 300
diff changeset
   812
urbanc
parents: 300
diff changeset
   813
(*<*)
urbanc
parents: 300
diff changeset
   814
end
urbanc
parents: 300
diff changeset
   815
(*>*)
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   816
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   817
section {* Properties for an Implementation\label{implement}*}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   818
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   819
text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   820
  While a formal correctness proof for our model of PIP is certainly
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   821
  attractive (especially in light of the flawed proof by Sha et
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   822
  al.~\cite{Sha90}), we found that the formalisation can even help us
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   823
  with efficiently implementing PIP.
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   824
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   825
  For example Baker complained that calculating the current precedence
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   826
  in PIP is quite ``heavy weight'' in Linux (see our Introduction).
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   827
  In our model of PIP the current precedence of a thread in a state s
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   828
  depends on all its dependants---a ``global'' transitive notion,
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   829
  which is indeed heavy weight (see Def.~shown in \eqref{cpreced}).
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   830
  We can however prove how to improve upon this. For this let us
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   831
  define the notion of @{term children} of a thread as
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   832
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   833
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   834
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   835
  @{thm children_def2}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   836
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   837
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   838
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   839
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   840
  where a child is a thread that is one ``hop'' away in the @{term RAG} from the 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   841
  tread @{text th} (and waiting for @{text th} to release a resource). We can prove that
311
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urbanc
parents: 310
diff changeset
   842
312
09281ccb31bd added implementation section
urbanc
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diff changeset
   843
  \begin{lemma}\label{childrenlem}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   844
  @{text "If"} @{thm (prem 1) cp_rec} @{text "then"}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   845
  \begin{center}
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urbanc
parents: 311
diff changeset
   846
  @{thm (concl) cp_rec}.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   847
  \end{center}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   848
  \end{lemma}
311
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urbanc
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diff changeset
   849
  
312
09281ccb31bd added implementation section
urbanc
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diff changeset
   850
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   851
  That means the current precedence of a thread @{text th} can be
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   852
  computed locally by considering only the children of @{text th}. In
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   853
  effect, it only needs to be recomputed for @{text th} when one of
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   854
  its children change their current precedence.  Once the current 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   855
  precedence is computed in this more efficient manner, the selection
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   856
  of the thread with highest precedence from a set of ready threads is
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   857
  a standard scheduling operation implemented in most operating
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   858
  systems.
311
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urbanc
parents: 310
diff changeset
   859
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   860
  Of course the main implementation work for PIP involves the scheduler
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   861
  and coding how it should react to the events, for example which 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   862
  datastructures need to be modified (mainly @{text RAG} and @{text cprec}).
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   863
  Below we outline how our formalisation guides this implementation for each 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   864
  event.\smallskip
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   865
*}
311
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diff changeset
   866
23632f329e10 merged Xingyuan's changes
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parents: 310
diff changeset
   867
(*<*)
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   868
context step_create_cps
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   869
begin
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   870
(*>*)
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   871
text {*
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   872
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   873
  @{term "Create th prio"}: We assume that the current state @{text s'} and 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   874
  the next state @{term "s \<equiv> Create th prio#s'"} are both valid (meaning the event
09281ccb31bd added implementation section
urbanc
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diff changeset
   875
  is allowed to occur). In this situation we can show that
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   876
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   877
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   878
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   879
  @{thm eq_dep}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   880
  @{thm eq_cp_th}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   881
  @{thm[mode=IfThen] eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   882
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   883
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   884
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   885
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   886
  This means we do not have recalculate the @{text RAG} and also none of the
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   887
  current precedences of the other threads. The current precedence of the created
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   888
  thread is just its precedence, that is the pair @{term "(prio, length (s::event list))"}.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   889
  \smallskip
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   890
  *}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   891
(*<*)
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   892
end
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   893
context step_exit_cps
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   894
begin
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   895
(*>*)
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   896
text {*
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   897
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   898
  @{term "Exit th"}: We again assume that the current state @{text s'} and 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   899
  the next state @{term "s \<equiv> Exit th#s'"} are both valid. We can show that
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   900
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   901
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   902
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   903
  @{thm eq_dep}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   904
  @{thm[mode=IfThen] eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   905
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   906
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   907
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   908
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   909
  This means also we do not have to recalculate the @{text RAG} and
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   910
  not the current precedences for the other threads. Since @{term th} is not
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   911
  alive anymore in state @{term "s"}, there is no need to calculate its
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   912
  current precedence.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   913
  \smallskip
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   914
*}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   915
(*<*)
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   916
end
311
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urbanc
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diff changeset
   917
context step_set_cps
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   918
begin
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   919
(*>*)
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   920
text {*
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   921
  \noindent
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urbanc
parents: 311
diff changeset
   922
  @{term "Set th prio"}: We assume that @{text s'} and 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   923
  @{term "s \<equiv> Set th prio#s'"} are both valid. We can show that
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   924
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   925
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   926
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   927
  @{thm[mode=IfThen] eq_dep}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   928
  @{thm[mode=IfThen] eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   929
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   930
  \end{isabelle}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   931
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   932
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   933
  The first is again telling us we do not need to change the @{text RAG}. The second
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   934
  however states that only threads that are \emph{not} dependent on @{text th} have their
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   935
  current precedence unchanged. For the others we have to recalculate the current
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   936
  precedence. To do this we can start from @{term "th"} 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   937
  and follow the @{term "depend"}-chains to recompute the @{term "cp"} of every 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   938
  thread encountered on the way using Lemma~\ref{childrenlem}. Since the @{term "depend"}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   939
  is loop free, this procedure always stop. The the following two lemmas show this 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   940
  procedure can actually stop often earlier.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   941
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   942
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   943
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   944
  @{thm[mode=IfThen] eq_up_self}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   945
  @{text "If"} @{thm (prem 1) eq_up}, @{thm (prem 2) eq_up} and @{thm (prem 3) eq_up}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   946
  @{text "then"} @{thm (concl) eq_up}.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   947
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   948
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   949
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   950
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   951
  The first states that if the current precedence of @{text th} is unchanged,
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   952
  then the procedure can stop immediately (all dependent threads have their @{term cp}-value unchanged).
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   953
  The second states that if an intermediate @{term cp}-value does not change, then
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   954
  the procedure can also stop, because none of its dependent threads will
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   955
  have their current precedence changed.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   956
  \smallskip
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   957
  *}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   958
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   959
(*<*)
23632f329e10 merged Xingyuan's changes
urbanc
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diff changeset
   960
end
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   961
context step_v_cps_nt
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urbanc
parents: 310
diff changeset
   962
begin
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   963
(*>*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   964
text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   965
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   966
  @{term "V th cs"}: We assume that @{text s'} and 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   967
  @{term "s \<equiv> V th cs#s'"} are both valid. We have to consider two
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   968
  subcases: one where there is a thread to ``take over'' the released
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   969
  resource @{text cs}, and where there is not. Let us consider them
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   970
  in turn. Suppose in state @{text s}, the thread @{text th'} takes over
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   971
  resource @{text cs} from thread @{text th}. We can show
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   972
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
   973
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   974
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   975
  @{thm depend_s}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   976
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   977
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   978
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   979
  which shows how the @{text RAG} needs to be changed. This also suggests
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   980
  how the current precedences need to be recalculated. For threads that are
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   981
  not @{text "th"} and @{text "th'"} nothing needs to be changed, since we
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   982
  can show
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   983
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   984
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   985
  @{thm[mode=IfThen] cp_kept}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   986
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   987
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   988
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   989
  For @{text th} and @{text th'} we need to use Lemma~\ref{childrenlem} to
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   990
  recalculate their current prcedence since their children have changed. *}(*<*)end context step_v_cps_nnt begin (*>*)text {*
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   991
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   992
  In the other case where there is no thread that takes over @{text cs}, we can show how
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   993
  to recalculate the @{text RAG} and also show that no current precedence needs
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   994
  to be recalculated, except for @{text th} (like in the case above).
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   995
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   996
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   997
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   998
  @{thm depend_s}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   999
  @{thm eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1000
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1001
  \end{isabelle}
311
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urbanc
parents: 310
diff changeset
  1002
  *}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1003
(*<*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1004
end
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1005
context step_P_cps_e
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urbanc
parents: 310
diff changeset
  1006
begin
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1007
(*>*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1008
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1009
text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1010
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1011
  @{term "P th cs"}: We assume that @{text s'} and 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1012
  @{term "s \<equiv> P th cs#s'"} are both valid. We again have to analyse two subcases, namely
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1013
  the one where @{text cs} is locked, and where it is not. We treat the second case
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1014
  first by showing that
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1015
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1016
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1017
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1018
  @{thm depend_s}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1019
  @{thm eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1020
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1021
  \end{isabelle}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1022
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1023
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1024
  This means we do not need to add a holding edge to the @{text RAG} and no
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1025
  current precedence must be recalculated (including that for @{text th}).*}(*<*)end context step_P_cps_ne begin(*>*) text {*
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1026
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1027
  In the second case we know that resouce @{text cs} is locked. We can show that
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1028
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1029
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1030
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1031
  @{thm depend_s}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1032
  @{thm[mode=IfThen] eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1033
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1034
  \end{isabelle}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1035
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1036
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1037
  That means we have to add a waiting edge to the @{text RAG}. Furthermore
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1038
  the current precedence for all threads that are not dependent on @{text th}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1039
  are unchanged. For the others we need to follow the @{term "depend"}-chains 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1040
  in the @{text RAG} and recompute the @{term "cp"}. However, like in the 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1041
  @{text Set}-event, this operation can stop often earlier, namely when intermediate
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1042
  values do not change.
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1043
  *}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1044
(*<*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1045
end
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1046
(*>*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1047
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1048
text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1049
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1050
  TO DO a few sentences summarising what has been achieved.
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1051
*}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1052
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
  1053
section {* Conclusion *}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
  1054
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1055
text {* 
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1056
  The Priority Inheritance Protocol is a classic textbook algorithm
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1057
  used in real-time systems in order to avoid the problem of Priority
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1058
  Inversion.
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1059
301
urbanc
parents: 300
diff changeset
  1060
  A clear and simple understanding of the problem at hand is both a
urbanc
parents: 300
diff changeset
  1061
  prerequisite and a byproduct of such an effort, because everything
urbanc
parents: 300
diff changeset
  1062
  has finally be reduced to the very first principle to be checked
urbanc
parents: 300
diff changeset
  1063
  mechanically.
urbanc
parents: 300
diff changeset
  1064
304
bd05c5011c0f contribution section
urbanc
parents: 301
diff changeset
  1065
  Our formalisation and the one presented
bd05c5011c0f contribution section
urbanc
parents: 301
diff changeset
  1066
  in \cite{Wang09} are the only ones that employ Paulson's method for
bd05c5011c0f contribution section
urbanc
parents: 301
diff changeset
  1067
  verifying protocols which are \emph{not} security related. 
bd05c5011c0f contribution section
urbanc
parents: 301
diff changeset
  1068
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1069
  TO DO 
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1070
301
urbanc
parents: 300
diff changeset
  1071
  no clue about multi-processor case according to \cite{Steinberg10} 
urbanc
parents: 300
diff changeset
  1072
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1073
*}
273
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
  1074
280
c91c2dd08599 updated
urbanc
parents: 279
diff changeset
  1075
text {*
c91c2dd08599 updated
urbanc
parents: 279
diff changeset
  1076
  \bigskip
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1077
  The priority inversion phenomenon was first published in
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1078
  \cite{Lampson80}.  The two protocols widely used to eliminate
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1079
  priority inversion, namely PI (Priority Inheritance) and PCE
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1080
  (Priority Ceiling Emulation), were proposed in \cite{Sha90}. PCE is
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1081
  less convenient to use because it requires static analysis of
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1082
  programs. Therefore, PI is more commonly used in
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1083
  practice\cite{locke-july02}. However, as pointed out in the
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1084
  literature, the analysis of priority inheritance protocol is quite
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1085
  subtle\cite{yodaiken-july02}.  A formal analysis will certainly be
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1086
  helpful for us to understand and correctly implement PI. All
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1087
  existing formal analysis of PI
304
bd05c5011c0f contribution section
urbanc
parents: 301
diff changeset
  1088
  \cite{Jahier09,Wellings07,Faria08} are based on the
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1089
  model checking technology. Because of the state explosion problem,
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1090
  model check is much like an exhaustive testing of finite models with
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1091
  limited size.  The results obtained can not be safely generalized to
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1092
  models with arbitrarily large size. Worse still, since model
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1093
  checking is fully automatic, it give little insight on why the
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1094
  formal model is correct. It is therefore definitely desirable to
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1095
  analyze PI using theorem proving, which gives more general results
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1096
  as well as deeper insight. And this is the purpose of this paper
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1097
  which gives a formal analysis of PI in the interactive theorem
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
  1098
  prover Isabelle using Higher Order Logic (HOL). The formalization
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1099
  focuses on on two issues:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1100
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1101
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1102
  \item The correctness of the protocol model itself. A series of desirable properties is 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1103
    derived until we are fully convinced that the formal model of PI does 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1104
    eliminate priority inversion. And a better understanding of PI is so obtained 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1105
    in due course. For example, we find through formalization that the choice of 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1106
    next thread to take hold when a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1107
    resource is released is irrelevant for the very basic property of PI to hold. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1108
    A point never mentioned in literature. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1109
  \item The correctness of the implementation. A series of properties is derived the meaning 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1110
    of which can be used as guidelines on how PI can be implemented efficiently and correctly. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1111
  \end{enumerate} 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1112
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1113
  The rest of the paper is organized as follows: Section \ref{overview} gives an overview 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1114
  of PI. Section \ref{model} introduces the formal model of PI. Section \ref{general} 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1115
  discusses a series of basic properties of PI. Section \ref{extension} shows formally 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1116
  how priority inversion is controlled by PI. Section \ref{implement} gives properties 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1117
  which can be used for guidelines of implementation. Section \ref{related} discusses 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1118
  related works. Section \ref{conclusion} concludes the whole paper.
265
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1119
273
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
  1120
  The basic priority inheritance protocol has two problems:
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
  1121
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
  1122
  It does not prevent a deadlock from happening in a program with circular lock dependencies.
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
  1123
  
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
  1124
  A chain of blocking may be formed; blocking duration can be substantial, though bounded.
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
  1125
265
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1126
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1127
  Contributions
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1128
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1129
  Despite the wide use of Priority Inheritance Protocol in real time operating
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1130
  system, it's correctness has never been formally proved and mechanically checked. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1131
  All existing verification are based on model checking technology. Full automatic
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1132
  verification gives little help to understand why the protocol is correct. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1133
  And results such obtained only apply to models of limited size. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1134
  This paper presents a formal verification based on theorem proving. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1135
  Machine checked formal proof does help to get deeper understanding. We found 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1136
  the fact which is not mentioned in the literature, that the choice of next 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1137
  thread to take over when an critical resource is release does not affect the correctness
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1138
  of the protocol. The paper also shows how formal proof can help to construct 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1139
  correct and efficient implementation.\bigskip 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1140
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1141
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1142
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1143
section {* An overview of priority inversion and priority inheritance \label{overview} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1144
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1145
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1146
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1147
  Priority inversion refers to the phenomenon when a thread with high priority is blocked 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1148
  by a thread with low priority. Priority happens when the high priority thread requests 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1149
  for some critical resource already taken by the low priority thread. Since the high 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1150
  priority thread has to wait for the low priority thread to complete, it is said to be 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1151
  blocked by the low priority thread. Priority inversion might prevent high priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1152
  thread from fulfill its task in time if the duration of priority inversion is indefinite 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1153
  and unpredictable. Indefinite priority inversion happens when indefinite number 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1154
  of threads with medium priorities is activated during the period when the high 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1155
  priority thread is blocked by the low priority thread. Although these medium 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1156
  priority threads can not preempt the high priority thread directly, they are able 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1157
  to preempt the low priority threads and cause it to stay in critical section for 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1158
  an indefinite long duration. In this way, the high priority thread may be blocked indefinitely. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1159
  
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1160
  Priority inheritance is one protocol proposed to avoid indefinite priority inversion. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1161
  The basic idea is to let the high priority thread donate its priority to the low priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1162
  thread holding the critical resource, so that it will not be preempted by medium priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1163
  threads. The thread with highest priority will not be blocked unless it is requesting 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1164
  some critical resource already taken by other threads. Viewed from a different angle, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1165
  any thread which is able to block the highest priority threads must already hold some 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1166
  critical resource. Further more, it must have hold some critical resource at the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1167
  moment the highest priority is created, otherwise, it may never get change to run and 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1168
  get hold. Since the number of such resource holding lower priority threads is finite, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1169
  if every one of them finishes with its own critical section in a definite duration, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1170
  the duration the highest priority thread is blocked is definite as well. The key to 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1171
  guarantee lower priority threads to finish in definite is to donate them the highest 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1172
  priority. In such cases, the lower priority threads is said to have inherited the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1173
  highest priority. And this explains the name of the protocol: 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1174
  {\em Priority Inheritance} and how Priority Inheritance prevents indefinite delay.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1175
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1176
  The objectives of this paper are:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1177
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1178
  \item Build the above mentioned idea into formal model and prove a series of properties 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1179
    until we are convinced that the formal model does fulfill the original idea. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1180
  \item Show how formally derived properties can be used as guidelines for correct 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1181
    and efficient implementation.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1182
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1183
  The proof is totally formal in the sense that every detail is reduced to the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1184
  very first principles of Higher Order Logic. The nature of interactive theorem 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1185
  proving is for the human user to persuade computer program to accept its arguments. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1186
  A clear and simple understanding of the problem at hand is both a prerequisite and a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1187
  byproduct of such an effort, because everything has finally be reduced to the very 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1188
  first principle to be checked mechanically. The former intuitive explanation of 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1189
  Priority Inheritance is just such a byproduct. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1190
  *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1191
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1192
(*
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1193
section {* Formal model of Priority Inheritance \label{model} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1194
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1195
  \input{../../generated/PrioGDef}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1196
*}
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1197
*)
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1198
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1199
section {* General properties of Priority Inheritance \label{general} *}
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1200
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1201
text {*
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
  1202
 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1203
  *}
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1204
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1205
section {* Key properties \label{extension} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1206
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1207
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1208
context extend_highest_gen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1209
begin
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1210
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1211
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1212
text {*
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1213
  The essential of {\em Priority Inheritance} is to avoid indefinite priority inversion. For this 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1214
  purpose, we need to investigate what happens after one thread takes the highest precedence. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1215
  A locale is used to describe such a situation, which assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1216
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1217
  \item @{term "s"} is a valid state (@{text "vt_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1218
    @{thm  vt_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1219
  \item @{term "th"} is a living thread in @{term "s"} (@{text "threads_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1220
    @{thm threads_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1221
  \item @{term "th"} has the highest precedence in @{term "s"} (@{text "highest"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1222
    @{thm highest}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1223
  \item The precedence of @{term "th"} is @{term "Prc prio tm"} (@{text "preced_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1224
    @{thm preced_th}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1225
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1226
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1227
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1228
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1229
  Under these assumptions, some basic priority can be derived for @{term "th"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1230
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1231
  \item The current precedence of @{term "th"} equals its own precedence (@{text "eq_cp_s_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1232
    @{thm [display] eq_cp_s_th}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1233
  \item The current precedence of @{term "th"} is the highest precedence in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1234
    the system (@{text "highest_cp_preced"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1235
    @{thm [display] highest_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1236
  \item The precedence of @{term "th"} is the highest precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1237
    in the system (@{text "highest_preced_thread"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1238
    @{thm [display] highest_preced_thread}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1239
  \item The current precedence of @{term "th"} is the highest current precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1240
    in the system (@{text "highest'"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1241
    @{thm [display] highest'}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1242
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1243
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1244
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1245
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1246
  To analysis what happens after state @{term "s"} a sub-locale is defined, which 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1247
  assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1248
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1249
  \item @{term "t"} is a valid extension of @{term "s"} (@{text "vt_t"}): @{thm vt_t}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1250
  \item Any thread created in @{term "t"} has priority no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1251
    its precedence can not be higher than @{term "th"},  therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1252
    @{term "th"} remain to be the one with the highest precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1253
    (@{text "create_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1254
    @{thm [display] create_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1255
  \item Any adjustment of priority in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1256
    @{term "t"} does not happen to @{term "th"} and 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1257
    the priority set is no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1258
    @{term "th"} remain to be the one with the highest precedence (@{text "set_diff_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1259
    @{thm [display] set_diff_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1260
  \item Since we are investigating what happens to @{term "th"}, it is assumed 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1261
    @{term "th"} does not exit during @{term "t"} (@{text "exit_diff"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1262
    @{thm [display] exit_diff}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1263
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1264
*}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1265
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1266
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1267
  All these assumptions are put into a predicate @{term "extend_highest_gen"}. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1268
  It can be proved that @{term "extend_highest_gen"} holds 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1269
  for any moment @{text "i"} in it @{term "t"} (@{text "red_moment"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1270
  @{thm [display] red_moment}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1271
  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1272
  From this, an induction principle can be derived for @{text "t"}, so that 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1273
  properties already derived for @{term "t"} can be applied to any prefix 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1274
  of @{text "t"} in the proof of new properties 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1275
  about @{term "t"} (@{text "ind"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1276
  \begin{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1277
  @{thm[display] ind}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1278
  \end{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1279
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1280
  The following properties can be proved about @{term "th"} in @{term "t"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1281
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1282
  \item In @{term "t"}, thread @{term "th"} is kept live and its 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1283
    precedence is preserved as well
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1284
    (@{text "th_kept"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1285
    @{thm [display] th_kept}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1286
  \item In @{term "t"}, thread @{term "th"}'s precedence is always the maximum among 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1287
    all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1288
    (@{text "max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1289
    @{thm [display] max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1290
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1291
    among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1292
    (@{text "th_cp_max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1293
    @{thm [display] th_cp_max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1294
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum current 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1295
    precedence among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1296
    (@{text "th_cp_max"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1297
    @{thm [display] th_cp_max}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1298
  \item In @{term "t"}, thread @{term "th"}'s current precedence equals its precedence at moment 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1299
    @{term "s"}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1300
    (@{text "th_cp_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1301
    @{thm [display] th_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1302
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1303
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1304
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1305
text {* \noindent
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1306
  The main theorem of this part is to characterizing the running thread during @{term "t"} 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1307
  (@{text "runing_inversion_2"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1308
  @{thm [display] runing_inversion_2}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1309
  According to this, if a thread is running, it is either @{term "th"} or was
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1310
  already live and held some resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1311
  at moment @{text "s"} (expressed by: @{text "cntV s th' < cntP s th'"}).
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1312
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1313
  Since there are only finite many threads live and holding some resource at any moment,
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1314
  if every such thread can release all its resources in finite duration, then after finite
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1315
  duration, none of them may block @{term "th"} anymore. So, no priority inversion may happen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1316
  then.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1317
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1318
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1319
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1320
end
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1321
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1322
272
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1323
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1324
section {* Related works \label{related} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1325
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1326
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1327
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1328
  \item {\em Integrating Priority Inheritance Algorithms in the Real-Time Specification for Java}
304
bd05c5011c0f contribution section
urbanc
parents: 301
diff changeset
  1329
    \cite{Wellings07} models and verifies the combination of Priority Inheritance (PI) and 
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1330
    Priority Ceiling Emulation (PCE) protocols in the setting of Java virtual machine 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1331
    using extended Timed Automata(TA) formalism of the UPPAAL tool. Although a detailed 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1332
    formal model of combined PI and PCE is given, the number of properties is quite 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1333
    small and the focus is put on the harmonious working of PI and PCE. Most key features of PI 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1334
    (as well as PCE) are not shown. Because of the limitation of the model checking technique
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1335
    used there, properties are shown only for a small number of scenarios. Therefore, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1336
    the verification does not show the correctness of the formal model itself in a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1337
    convincing way.  
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1338
  \item {\em Formal Development of Solutions for Real-Time Operating Systems with TLA+/TLC}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1339
    \cite{Faria08}. A formal model of PI is given in TLA+. Only 3 properties are shown 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1340
    for PI using model checking. The limitation of model checking is intrinsic to the work.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1341
  \item {\em Synchronous modeling and validation of priority inheritance schedulers}
304
bd05c5011c0f contribution section
urbanc
parents: 301
diff changeset
  1342
    \cite{Jahier09}. Gives a formal model
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1343
    of PI and PCE in AADL (Architecture Analysis \& Design Language) and checked 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1344
    several properties using model checking. The number of properties shown there is 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1345
    less than here and the scale is also limited by the model checking technique. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1346
  \item {\em The Priority Ceiling Protocol: Formalization and Analysis Using PVS}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1347
    \cite{dutertre99b}. Formalized another protocol for Priority Inversion in the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1348
    interactive theorem proving system PVS.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1349
\end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1350
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1351
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1352
  There are several works on inversion avoidance:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1353
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1354
  \item {\em Solving the group priority inversion problem in a timed asynchronous system}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1355
    \cite{Wang:2002:SGP}. The notion of Group Priority Inversion is introduced. The main 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1356
    strategy is still inversion avoidance. The method is by reordering requests 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1357
    in the setting of Client-Server.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1358
  \item {\em A Formalization of Priority Inversion} \cite{journals/rts/BabaogluMS93}. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1359
    Formalized the notion of Priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1360
    Inversion and proposes methods to avoid it. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1361
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1362
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1363
  {\em Examples of inaccurate specification of the protocol ???}.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1364
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1365
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1366
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1367
section {* Conclusions \label{conclusion} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1368
286
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1369
text {*
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1370
  The work in this paper only deals with single CPU configurations. The
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1371
  "one CPU" assumption is essential for our formalisation, because the
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1372
  main lemma fails in multi-CPU configuration. The lemma says that any
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1373
  runing thead must be the one with the highest prioirty or already held
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1374
  some resource when the highest priority thread was initiated. When
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1375
  there are multiple CPUs, it may well be the case that a threads did
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1376
  not hold any resource when the highest priority thread was initiated,
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1377
  but that thread still runs after that moment on a separate CPU. In
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1378
  this way, the main lemma does not hold anymore.
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1379
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1380
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1381
  There are some works deals with priority inversion in multi-CPU
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1382
  configurations[???], but none of them have given a formal correctness
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1383
  proof. The extension of our formal proof to deal with multi-CPU
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1384
  configurations is not obvious. One possibility, as suggested in paper
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1385
  [???], is change our formal model (the defiintion of "schs") to give
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1386
  the released resource to the thread with the highest prioirty. In this
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1387
  way, indefinite prioirty inversion can be avoided, but for a quite
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1388
  different reason from the one formalized in this paper (because the
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1389
  "mail lemma" will be different). This means a formal correctness proof
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1390
  for milt-CPU configuration would be quite different from the one given
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1391
  in this paper. The solution of prioirty inversion problem in mult-CPU
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1392
  configurations is a different problem which needs different solutions
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1393
  which is outside the scope of this paper.
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1394
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1395
*}
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1396
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1397
(*<*)
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1398
end
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1399
(*>*)