prio/Paper/Paper.thy
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(*<*)
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theory Paper
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imports "../CpsG" "../ExtGG" "~~/src/HOL/Library/LaTeXsugar"
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begin
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ML {*
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  open Printer;
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  show_question_marks_default := false;
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  *}
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notation (latex output)
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  Cons ("_::_" [78,77] 73) and
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  vt ("valid'_state") and
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  runing ("running") and
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  birthtime ("last'_set") and
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  If  ("(\<^raw:\textrm{>if\<^raw:}> (_)/ \<^raw:\textrm{>then\<^raw:}> (_)/ \<^raw:\textrm{>else\<^raw:}> (_))" 10) and
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  Prc ("'(_, _')") and
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  holding ("holds") and
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  waiting ("waits") and
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  Th ("T") and
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  Cs ("C") and
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  readys ("ready") and
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  depend ("RAG") and 
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  preced ("prec") and
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  cpreced ("cprec") and
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  dependents ("dependants") and
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  cp ("cprec") and
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  holdents ("resources") and
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  original_priority ("priority") and
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  DUMMY  ("\<^raw:\mbox{$\_\!\_$}>")
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(*>*)
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section {* Introduction *}
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text {*
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  Many real-time systems need to support threads involving priorities and
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  locking of resources. Locking of resources ensures mutual exclusion
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  when accessing shared data or devices that cannot be
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  preempted. Priorities allow scheduling of threads that need to
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  finish their work within deadlines.  Unfortunately, both features
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  can interact in subtle ways leading to a problem, called
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  \emph{Priority Inversion}. Suppose three threads having priorities
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  $H$(igh), $M$(edium) and $L$(ow). We would expect that the thread
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  $H$ blocks any other thread with lower priority and itself cannot
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  be blocked by any thread with lower priority. Alas, in a naive
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  implementation of resource looking and priorities this property can
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  be violated. Even worse, $H$ can be delayed indefinitely by
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  threads with lower priorities. For this let $L$ be in the
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  possession of a lock for a resource that also $H$ needs. $H$ must
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  therefore wait for $L$ to exit the critical section and release this
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  lock. The problem is that $L$ might in turn be blocked by any
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  thread with priority $M$, and so $H$ sits there potentially waiting
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  indefinitely. Since $H$ is blocked by threads with lower
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  priorities, the problem is called Priority Inversion. It was first
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  described in \cite{Lampson80} in the context of the
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  Mesa programming language designed for concurrent programming.
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  If the problem of Priority Inversion is ignored, real-time systems
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  can become unpredictable and resulting bugs can be hard to diagnose.
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  The classic example where this happened is the software that
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  controlled the Mars Pathfinder mission in 1997 \cite{Reeves98}.
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  Once the spacecraft landed, the software shut down at irregular
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  intervals leading to loss of project time as normal operation of the
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  craft could only resume the next day (the mission and data already
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  collected were fortunately not lost, because of a clever system
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  design).  The reason for the shutdowns was that the scheduling
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  software fell victim of Priority Inversion: a low priority thread
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  locking a resource prevented a high priority thread from running in
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  time leading to a system reset. Once the problem was found, it was
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  rectified by enabling the \emph{Priority Inheritance Protocol} (PIP)
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  \cite{Sha90}\footnote{Sha et al.~call it the \emph{Basic Priority
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  Inheritance Protocol} \cite{Sha90} and others sometimes also call it
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  \emph{Priority Boosting}.} in the scheduling software.
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  The idea behind PIP is to let the thread $L$ temporarily inherit
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  the high priority from $H$ until $L$ leaves the critical section
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  unlocking the resource. This solves the problem of $H$ having to
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  wait indefinitely, because $L$ cannot be blocked by threads having
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  priority $M$. While a few other solutions exist for the Priority
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  Inversion problem, PIP is one that is widely deployed and
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  implemented. This includes VxWorks (a proprietary real-time OS used
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  in the Mars Pathfinder mission, in Boeing's 787 Dreamliner, Honda's
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  ASIMO robot, etc.), but also the POSIX 1003.1c Standard realised for
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  example in libraries for FreeBSD, Solaris and Linux.
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  One advantage of PIP is that increasing the priority of a thread
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  can be dynamically calculated by the scheduler. This is in contrast
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  to, for example, \emph{Priority Ceiling} \cite{Sha90}, another
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  solution to the Priority Inversion problem, which requires static
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  analysis of the program in order to prevent Priority
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  Inversion. However, there has also been strong criticism against
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  PIP. For instance, PIP cannot prevent deadlocks when lock
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  dependencies are circular, and also blocking times can be
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  substantial (more than just the duration of a critical section).
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  Though, most criticism against PIP centres around unreliable
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  implementations and PIP being too complicated and too inefficient.
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  For example, Yodaiken writes in \cite{Yodaiken02}:
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  \begin{quote}
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  \it{}``Priority inheritance is neither efficient nor reliable. Implementations
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  are either incomplete (and unreliable) or surprisingly complex and intrusive.''
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  \end{quote}
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  \noindent
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  He suggests to avoid PIP altogether by not allowing critical
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  sections to be preempted. Unfortunately, this solution does not
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  help in real-time systems with hard deadlines for high-priority 
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  threads.
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  In our opinion, there is clearly a need for investigating correct
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  algorithms for PIP. A few specifications for PIP exist (in English)
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  and also a few high-level descriptions of implementations (e.g.~in
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  the textbook \cite[Section 5.6.5]{Vahalia96}), but they help little
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  with actual implementations. That this is a problem in practise is
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  proved by an email from Baker, who wrote on 13 July 2009 on the Linux
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  Kernel mailing list:
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  \begin{quote}
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  \it{}``I observed in the kernel code (to my disgust), the Linux PIP
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  implementation is a nightmare: extremely heavy weight, involving
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  maintenance of a full wait-for graph, and requiring updates for a
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  range of events, including priority changes and interruptions of
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  wait operations.''
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  \end{quote}
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  \noindent
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  The criticism by Yodaiken, Baker and others suggests to us to look
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  again at PIP from a more abstract level (but still concrete enough
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  to inform an implementation), and makes PIP an ideal candidate for a
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  formal verification. One reason, of course, is that the original
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  presentation of PIP~\cite{Sha90}, despite being informally
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  ``proved'' correct, is actually \emph{flawed}. 
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  Yodaiken \cite{Yodaiken02} points to a subtlety that had been
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  overlooked in the informal proof by Sha et al. They specify in
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  \cite{Sha90} that after the thread (whose priority has been raised)
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  completes its critical section and releases the lock, it ``returns
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  to its original priority level.'' This leads them to believe that an
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  implementation of PIP is ``rather straightforward''~\cite{Sha90}.
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  Unfortunately, as Yodaiken points out, this behaviour is too
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  simplistic.  Consider the case where the low priority thread $L$
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  locks \emph{two} resources, and two high-priority threads $H$ and
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  $H'$ each wait for one of them.  If $L$ releases one resource
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  so that $H$, say, can proceed, then we still have Priority Inversion
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  with $H'$ (which waits for the other resource). The correct
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  behaviour for $L$ is to revert to the highest remaining priority of
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  the threads that it blocks. The advantage of formalising the
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  correctness of a high-level specification of PIP in a theorem prover
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  is that such issues clearly show up and cannot be overlooked as in
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  informal reasoning (since we have to analyse all possible behaviours
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  of threads, i.e.~\emph{traces}, that could possibly happen).\medskip
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  \noindent
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  {\bf Contributions:} There have been earlier formal investigations
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  into PIP \cite{Faria08,Jahier09,Wellings07}, but they employ model
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  checking techniques. This paper presents a formalised and
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  mechanically checked proof for the correctness of PIP (to our
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  knowledge the first one; the earlier informal proof by Sha et
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  al.~\cite{Sha90} is flawed).  In contrast to model checking, our
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  formalisation provides insight into why PIP is correct and allows us
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  to prove stronger properties that, as we will show, can inform an
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  efficient implementation.  For example, we found by ``playing'' with the formalisation
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  that the choice of the next thread to take over a lock when a
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  resource is released is irrelevant for PIP being correct. Something
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  which has not been mentioned in the relevant literature.
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*}
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section {* Formal Model of the Priority Inheritance Protocol *}
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text {*
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  The Priority Inheritance Protocol, short PIP, is a scheduling
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  algorithm for a single-processor system.\footnote{We shall come back
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  later to the case of PIP on multi-processor systems.} Our model of
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  PIP is based on Paulson's inductive approach to protocol
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  verification \cite{Paulson98}, where the \emph{state} of a system is
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  given by a list of events that happened so far.  \emph{Events} of PIP fall
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  into five categories defined as the datatype:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{r@ {\hspace{2mm}}c@ {\hspace{2mm}}l@ {\hspace{7mm}}l}
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  \isacommand{datatype} event 
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  & @{text "="} & @{term "Create thread priority"}\\
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  & @{text "|"} & @{term "Exit thread"} \\
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  & @{text "|"} & @{term "Set thread priority"} & {\rm reset of the priority for} @{text thread}\\
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  & @{text "|"} & @{term "P thread cs"} & {\rm request of resource} @{text "cs"} {\rm by} @{text "thread"}\\
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  & @{text "|"} & @{term "V thread cs"} & {\rm release of resource} @{text "cs"} {\rm by} @{text "thread"}
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  whereby threads, priorities and (critical) resources are represented
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  as natural numbers. The event @{term Set} models the situation that
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  a thread obtains a new priority given by the programmer or
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  user (for example via the {\tt nice} utility under UNIX).  As in Paulson's work, we
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  need to define functions that allow us to make some observations
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  about states.  One, called @{term threads}, calculates the set of
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  ``live'' threads that we have seen so far:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) threads.simps(1)} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(1)}\\
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  @{thm (lhs) threads.simps(2)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(2)[where thread="th"]}\\
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  @{thm (lhs) threads.simps(3)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(3)[where thread="th"]}\\
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  @{term "threads (DUMMY#s)"} & @{text "\<equiv>"} & @{term "threads s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition @{term "DUMMY # DUMMY"} stands for list-cons.
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  Another function calculates the priority for a thread @{text "th"}, which is 
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  defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) original_priority.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(1)[where thread="th"]}\\
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  @{thm (lhs) original_priority.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) original_priority.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "original_priority th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "original_priority th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition we set @{text 0} as the default priority for
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  threads that have not (yet) been created. The last function we need 
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  calculates the ``time'', or index, at which time a process had its 
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  priority last set.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) birthtime.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(1)[where thread="th"]}\\
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  @{thm (lhs) birthtime.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) birthtime.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "birthtime th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "birthtime th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition @{term "length s"} stands for the length of the list
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  of events @{text s}. Again the default value in this function is @{text 0}
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  for threads that have not been created yet. A \emph{precedence} of a thread @{text th} in a 
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  state @{text s} is the pair of natural numbers defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm preced_def[where thread="th"]}
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  \end{isabelle}
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  \noindent
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  The point of precedences is to schedule threads not according to priorities (because what should
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  we do in case two threads have the same priority), but according to precedences. 
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  Precedences allow us to always discriminate between two threads with equal priority by 
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  taking into account the time when the priority was last set. We order precedences so 
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  that threads with the same priority get a higher precedence if their priority has been 
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  set earlier, since for such threads it is more urgent to finish their work. In an implementation
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  this choice would translate to a quite natural FIFO-scheduling of processes with 
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  the same priority.
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  Next, we introduce the concept of \emph{waiting queues}. They are
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  lists of threads associated with every resource. The first thread in
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  this list (i.e.~the head, or short @{term hd}) is chosen to be the one 
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  that is in possession of the
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  ``lock'' of the corresponding resource. We model waiting queues as
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  functions, below abbreviated as @{text wq}. They take a resource as
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  argument and return a list of threads.  This allows us to define
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  when a thread \emph{holds}, respectively \emph{waits} for, a
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  resource @{text cs} given a waiting queue function @{text wq}.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \begin{tabular}{@ {}l}
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  @{thm cs_holding_def[where thread="th"]}\\
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  @{thm cs_waiting_def[where thread="th"]}
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  \end{tabular}
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  \end{isabelle}
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  \noindent
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  In this definition we assume @{text "set"} converts a list into a set.
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  At the beginning, that is in the state where no thread is created yet, 
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  the waiting queue function will be the function that returns the
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  empty list for every resource.
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{abbrev all_unlocked}\hfill\numbered{allunlocked}
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  \end{isabelle}
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  \noindent
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  Using @{term "holding"} and @{term waiting}, we can introduce \emph{Resource Allocation Graphs} 
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  (RAG), which represent the dependencies between threads and resources.
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  We represent RAGs as relations using pairs of the form
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{term "(Th th, Cs cs)"} \hspace{5mm}{\rm and}\hspace{5mm}
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  @{term "(Cs cs, Th th)"}
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  \end{isabelle}
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  \noindent
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  where the first stands for a \emph{waiting edge} and the second for a 
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  \emph{holding edge} (@{term Cs} and @{term Th} are constructors of a 
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  datatype for vertices). Given a waiting queue function, a RAG is defined 
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  as the union of the sets of waiting and holding edges, namely
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cs_depend_def}
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  \end{isabelle}
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  \noindent
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  Given three threads and three resources, an instance of a RAG can be pictured 
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  as follows:
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  \begin{center}
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  \newcommand{\fnt}{\fontsize{7}{8}\selectfont}
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  \begin{tikzpicture}[scale=1]
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  %%\draw[step=2mm] (-3,2) grid (1,-1);
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  \node (A) at (0,0) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>0"}};
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  \node (B) at (2,0) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>1"}};
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  \node (C) at (4,0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>1"}};
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  \node (D) at (4,-0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>2"}};
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  \node (E) at (6,-0.7) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>2"}};
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  \node (E1) at (6, 0.2) [draw, circle, very thick, inner sep=0.4mm] {@{text "cs\<^isub>3"}};
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  \node (F) at (8,-0.7) [draw, rounded corners=1mm, rectangle, very thick] {@{text "th\<^isub>3"}};
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  \draw [<-,line width=0.6mm] (A) to node [pos=0.54,sloped,above=-0.5mm] {\fnt{}holding}  (B);
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  \draw [->,line width=0.6mm] (C) to node [pos=0.4,sloped,above=-0.5mm] {\fnt{}waiting}  (B);
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  \draw [->,line width=0.6mm] (D) to node [pos=0.4,sloped,below=-0.5mm] {\fnt{}waiting}  (B);
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  \draw [<-,line width=0.6mm] (D) to node [pos=0.54,sloped,below=-0.5mm] {\fnt{}holding}  (E);
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  \draw [<-,line width=0.6mm] (D) to node [pos=0.54,sloped,above=-0.5mm] {\fnt{}holding}  (E1);
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  \draw [->,line width=0.6mm] (F) to node [pos=0.45,sloped,below=-0.5mm] {\fnt{}waiting}  (E);
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  \end{tikzpicture}
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  \end{center}
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  \noindent
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  The use of relations for representing RAGs allows us to conveniently define
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  the notion of the \emph{dependants} of a thread using the transitive closure
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  operation for relations. This gives
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cs_dependents_def}
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  \end{isabelle}
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  \noindent
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   348
  This definition needs to account for all threads that wait for a thread to
290
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  release a resource. This means we need to include threads that transitively
298
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  wait for a resource being released (in the picture above this means the dependants
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  of @{text "th\<^isub>0"} are @{text "th\<^isub>1"} and @{text "th\<^isub>2"}, which wait for resource @{text "cs\<^isub>1"}, 
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  but also @{text "th\<^isub>3"}, 
298
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  which cannot make any progress unless @{text "th\<^isub>2"} makes progress, which
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  in turn needs to wait for @{text "th\<^isub>0"} to finish). If there is a circle in a RAG, then clearly
291
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  we have a deadlock. Therefore when a thread requests a resource,
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  we must ensure that the resulting RAG is not circular. 
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   357
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  Next we introduce the notion of the \emph{current precedence} of a thread @{text th} in a 
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  state @{text s}. It is defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cpreced_def2}\hfill\numbered{cpreced}
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  \end{isabelle}
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   364
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  \noindent
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   366
  where the dependants of @{text th} are given by the waiting queue function.
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   367
  While the precedence @{term prec} of a thread is determined by the programmer 
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  (for example when the thread is
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   369
  created), the point of the current precedence is to let the scheduler increase this
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   370
  precedence, if needed according to PIP. Therefore the current precedence of @{text th} is
291
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  given as the maximum of the precedence @{text th} has in state @{text s} \emph{and} all 
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  threads that are dependants of @{text th}. Since the notion @{term "dependants"} is
291
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  defined as the transitive closure of all dependent threads, we deal correctly with the 
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  problem in the informal algorithm by Sha et al.~\cite{Sha90} where a priority of a thread is
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  lowered prematurely.
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   376
  
298
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  The next function, called @{term schs}, defines the behaviour of the scheduler. It will be defined
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  by recursion on the state (a list of events); this function returns a \emph{schedule state}, which 
298
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  we represent as a record consisting of two
296
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   380
  functions:
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   381
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{text "\<lparr>wq_fun, cprec_fun\<rparr>"}
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  \end{isabelle}
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   385
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   386
  \noindent
314
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   387
  The first function is a waiting queue function (that is, it takes a
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   388
  resource @{text "cs"} and returns the corresponding list of threads
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   389
  that lock, respectively wait for, it); the second is a function that
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   390
  takes a thread and returns its current precedence (see
ccb6c0601614 some parts of the conclusion
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   391
  \eqref{cpreced}). We assume the usual getter and setter methods for
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diff changeset
   392
  such records.
294
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diff changeset
   393
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   394
  In the initial state, the scheduler starts with all resources unlocked (the corresponding 
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   395
  function is defined in \eqref{allunlocked}) and the
298
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   396
  current precedence of every thread is initialised with @{term "Prc 0 0"}; that means 
299
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   397
  \mbox{@{abbrev initial_cprec}}. Therefore
306
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   398
  we have for the initial state
291
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diff changeset
   399
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   400
  \begin{isabelle}\ \ \ \ \ %%%
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diff changeset
   401
  \begin{tabular}{@ {}l}
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   402
  @{thm (lhs) schs.simps(1)} @{text "\<equiv>"}\\ 
294
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   403
  \hspace{5mm}@{term "(|wq_fun = all_unlocked, cprec_fun = (\<lambda>_::thread. Prc 0 0)|)"}
291
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diff changeset
   404
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   405
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   406
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   407
  \noindent
296
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   408
  The cases for @{term Create}, @{term Exit} and @{term Set} are also straightforward:
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   409
  we calculate the waiting queue function of the (previous) state @{text s}; 
298
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   410
  this waiting queue function @{text wq} is unchanged in the next schedule state---because
306
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   411
  none of these events lock or release any resource; 
5113aa1ae69a some polishing
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   412
  for calculating the next @{term "cprec_fun"}, we use @{text wq} and 
298
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diff changeset
   413
  @{term cpreced}. This gives the following three clauses for @{term schs}:
290
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diff changeset
   414
6a6d0bd16035 more on paper
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   415
  \begin{isabelle}\ \ \ \ \ %%%
291
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diff changeset
   416
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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   417
  @{thm (lhs) schs.simps(2)} @{text "\<equiv>"}\\ 
294
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diff changeset
   418
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
298
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   419
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Create th prio # s)|)"}\smallskip\\
291
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diff changeset
   420
  @{thm (lhs) schs.simps(3)} @{text "\<equiv>"}\\
294
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diff changeset
   421
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
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diff changeset
   422
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Exit th # s)|)"}\smallskip\\
291
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diff changeset
   423
  @{thm (lhs) schs.simps(4)} @{text "\<equiv>"}\\ 
294
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diff changeset
   424
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   425
  \hspace{8mm}@{term "(|wq_fun = wq\<iota>, cprec_fun = cpreced wq\<iota> (Set th prio # s)|)"}
291
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diff changeset
   426
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   427
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   428
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   429
  \noindent 
306
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diff changeset
   430
  More interesting are the cases where a resource, say @{text cs}, is locked or released. In these cases
300
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diff changeset
   431
  we need to calculate a new waiting queue function. For the event @{term "P th cs"}, we have to update
306
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diff changeset
   432
  the function so that the new thread list for @{text cs} is the old thread list plus the thread @{text th} 
314
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diff changeset
   433
  appended to the end of that list (remember the head of this list is assigned to be in the possession of this
306
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diff changeset
   434
  resource). This gives the clause
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   435
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   436
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   437
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   438
  @{thm (lhs) schs.simps(5)} @{text "\<equiv>"}\\ 
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   439
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   440
  \hspace{5mm}@{text "let"} @{text "new_wq = wq(cs := (wq cs @ [th]))"} @{text "in"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   441
  \hspace{8mm}@{term "(|wq_fun = new_wq, cprec_fun = cpreced new_wq (P th cs # s)|)"}
291
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diff changeset
   442
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   443
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   444
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   445
  \noindent
300
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diff changeset
   446
  The clause for event @{term "V th cs"} is similar, except that we need to update the waiting queue function
301
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diff changeset
   447
  so that the thread that possessed the lock is deleted from the corresponding thread list. For this 
urbanc
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diff changeset
   448
  list transformation, we use
296
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diff changeset
   449
  the auxiliary function @{term release}. A simple version of @{term release} would
306
5113aa1ae69a some polishing
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diff changeset
   450
  just delete this thread and return the remaining threads, namely
291
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diff changeset
   451
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   452
  \begin{isabelle}\ \ \ \ \ %%%
296
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diff changeset
   453
  \begin{tabular}{@ {}lcl}
2c8dcf010567 spell check; release
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diff changeset
   454
  @{term "release []"} & @{text "\<equiv>"} & @{term "[]"}\\
2c8dcf010567 spell check; release
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   455
  @{term "release (DUMMY # qs)"} & @{text "\<equiv>"} & @{term "qs"}\\
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diff changeset
   456
  \end{tabular}
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   457
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   458
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   459
  \noindent
300
8524f94d251b correct RAG
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diff changeset
   460
  In practice, however, often the thread with the highest precedence in the list will get the
296
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diff changeset
   461
  lock next. We have implemented this choice, but later found out that the choice 
300
8524f94d251b correct RAG
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diff changeset
   462
  of which thread is chosen next is actually irrelevant for the correctness of PIP.
296
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diff changeset
   463
  Therefore we prove the stronger result where @{term release} is defined as
2c8dcf010567 spell check; release
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diff changeset
   464
2c8dcf010567 spell check; release
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diff changeset
   465
  \begin{isabelle}\ \ \ \ \ %%%
2c8dcf010567 spell check; release
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diff changeset
   466
  \begin{tabular}{@ {}lcl}
2c8dcf010567 spell check; release
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diff changeset
   467
  @{term "release []"} & @{text "\<equiv>"} & @{term "[]"}\\
2c8dcf010567 spell check; release
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diff changeset
   468
  @{term "release (DUMMY # qs)"} & @{text "\<equiv>"} & @{term "SOME qs'. distinct qs' \<and> set qs' = set qs"}\\
2c8dcf010567 spell check; release
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diff changeset
   469
  \end{tabular}
2c8dcf010567 spell check; release
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diff changeset
   470
  \end{isabelle}
2c8dcf010567 spell check; release
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diff changeset
   471
2c8dcf010567 spell check; release
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diff changeset
   472
  \noindent
306
5113aa1ae69a some polishing
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diff changeset
   473
  where @{text "SOME"} stands for Hilbert's epsilon and implements an arbitrary
298
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diff changeset
   474
  choice for the next waiting list. It just has to be a list of distinctive threads and
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   475
  contain the same elements as @{text "qs"}. This gives for @{term V} the clause:
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   476
 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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parents: 290
diff changeset
   477
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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parents: 290
diff changeset
   478
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   479
  @{thm (lhs) schs.simps(6)} @{text "\<equiv>"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   480
  \hspace{5mm}@{text "let"} @{text "wq = wq_fun (schs s)"} @{text "in"}\\
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   481
  \hspace{5mm}@{text "let"} @{text "new_wq = release (wq cs)"} @{text "in"}\\
294
bc5bf9e9ada2 renamed waiting_queue -> wq_fun; cur_preced -> cprec_fun
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diff changeset
   482
  \hspace{8mm}@{term "(|wq_fun = new_wq, cprec_fun = cpreced new_wq (V th cs # s)|)"}
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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parents: 290
diff changeset
   483
  \end{tabular}
290
6a6d0bd16035 more on paper
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parents: 287
diff changeset
   484
  \end{isabelle}
6a6d0bd16035 more on paper
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parents: 287
diff changeset
   485
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   486
  Having the scheduler function @{term schs} at our disposal, we can ``lift'', or
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   487
  overload, the notions
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   488
  @{term waiting}, @{term holding}, @{term depend} and @{term cp} to operate on states only.
286
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   489
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   490
  \begin{isabelle}\ \ \ \ \ %%%
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   491
  \begin{tabular}{@ {}rcl}
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   492
  @{thm (lhs) s_holding_abv} & @{text "\<equiv>"} & @{thm (rhs) s_holding_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   493
  @{thm (lhs) s_waiting_abv} & @{text "\<equiv>"} & @{thm (rhs) s_waiting_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   494
  @{thm (lhs) s_depend_abv}  & @{text "\<equiv>"} & @{thm (rhs) s_depend_abv}\\
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   495
  @{thm (lhs) cp_def}        & @{text "\<equiv>"} & @{thm (rhs) cp_def}
287
440382eb6427 more on the specification section
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parents: 286
diff changeset
   496
  \end{tabular}
440382eb6427 more on the specification section
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parents: 286
diff changeset
   497
  \end{isabelle}
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   498
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   499
  \noindent
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   500
  With these abbreviations we can introduce 
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
   501
  the notion of threads being @{term readys} in a state (i.e.~threads
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   502
  that do not wait for any resource) and the running thread.
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   503
287
440382eb6427 more on the specification section
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parents: 286
diff changeset
   504
  \begin{isabelle}\ \ \ \ \ %%%
440382eb6427 more on the specification section
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parents: 286
diff changeset
   505
  \begin{tabular}{@ {}l}
440382eb6427 more on the specification section
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parents: 286
diff changeset
   506
  @{thm readys_def}\\
440382eb6427 more on the specification section
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parents: 286
diff changeset
   507
  @{thm runing_def}\\
286
572f202659ff corrections by Xingyuan
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parents: 285
diff changeset
   508
  \end{tabular}
572f202659ff corrections by Xingyuan
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parents: 285
diff changeset
   509
  \end{isabelle}
284
d296cb127fcb more on paper
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diff changeset
   510
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   511
  \noindent
306
5113aa1ae69a some polishing
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diff changeset
   512
  In this definition @{term "DUMMY ` DUMMY"} stands for the image of a set under a function.
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   513
  Note that in the initial state, that is where the list of events is empty, the set 
309
e44c4055d430 more on the paper
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diff changeset
   514
  @{term threads} is empty and therefore there is neither a thread ready nor running.
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   515
  If there is one or more threads ready, then there can only be \emph{one} thread
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   516
  running, namely the one whose current precedence is equal to the maximum of all ready 
314
ccb6c0601614 some parts of the conclusion
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diff changeset
   517
  threads. We use sets to capture both possibilities.
306
5113aa1ae69a some polishing
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parents: 305
diff changeset
   518
  We can now also conveniently define the set of resources that are locked by a thread in a
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   519
  given state.
284
d296cb127fcb more on paper
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parents: 283
diff changeset
   520
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   521
  \begin{isabelle}\ \ \ \ \ %%%
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   522
  @{thm holdents_def}
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   523
  \end{isabelle}
284
d296cb127fcb more on paper
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diff changeset
   524
306
5113aa1ae69a some polishing
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parents: 305
diff changeset
   525
  Finally we can define what a \emph{valid state} is in our model of PIP. For
304
bd05c5011c0f contribution section
urbanc
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diff changeset
   526
  example we cannot expect to be able to exit a thread, if it was not
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   527
  created yet. These validity constraints on states are characterised by the
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   528
  inductive predicate @{term "step"} and @{term vt}. We first give five inference rules
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   529
  for @{term step} relating a state and an event that can happen next.
284
d296cb127fcb more on paper
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parents: 283
diff changeset
   530
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   531
  \begin{center}
d296cb127fcb more on paper
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diff changeset
   532
  \begin{tabular}{c}
d296cb127fcb more on paper
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diff changeset
   533
  @{thm[mode=Rule] thread_create[where thread=th]}\hspace{1cm}
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   534
  @{thm[mode=Rule] thread_exit[where thread=th]}
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   535
  \end{tabular}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   536
  \end{center}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   537
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   538
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   539
  The first rule states that a thread can only be created, if it does not yet exists.
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   540
  Similarly, the second rule states that a thread can only be terminated if it was
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   541
  running and does not lock any resources anymore (this simplifies slightly our model;
314
ccb6c0601614 some parts of the conclusion
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diff changeset
   542
  in practice we would expect the operating system releases all locks held by a
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   543
  thread that is about to exit). The event @{text Set} can happen
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   544
  if the corresponding thread is running. 
284
d296cb127fcb more on paper
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parents: 283
diff changeset
   545
298
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   546
  \begin{center}
f2e0d031a395 completed model section; vt has only state as argument
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parents: 297
diff changeset
   547
  @{thm[mode=Rule] thread_set[where thread=th]}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   548
  \end{center}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   549
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   550
  \noindent
301
urbanc
parents: 300
diff changeset
   551
  If a thread wants to lock a resource, then the thread needs to be
urbanc
parents: 300
diff changeset
   552
  running and also we have to make sure that the resource lock does
urbanc
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diff changeset
   553
  not lead to a cycle in the RAG. In practice, ensuring the latter is
314
ccb6c0601614 some parts of the conclusion
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diff changeset
   554
  the responsibility of the programmer.  In our formal
ccb6c0601614 some parts of the conclusion
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diff changeset
   555
  model we brush aside these problematic cases in order to be able to make
301
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diff changeset
   556
  some meaningful statements about PIP.\footnote{This situation is
310
4d93486cb302 polished
urbanc
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diff changeset
   557
  similar to the infamous occurs check in Prolog: In order to say
306
5113aa1ae69a some polishing
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diff changeset
   558
  anything meaningful about unification, one needs to perform an occurs
310
4d93486cb302 polished
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diff changeset
   559
  check. But in practice the occurs check is ommited and the
306
5113aa1ae69a some polishing
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diff changeset
   560
  responsibility for avoiding problems rests with the programmer.}
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   561
 
5113aa1ae69a some polishing
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diff changeset
   562
  \begin{center}
5113aa1ae69a some polishing
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parents: 305
diff changeset
   563
  @{thm[mode=Rule] thread_P[where thread=th]}
5113aa1ae69a some polishing
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parents: 305
diff changeset
   564
  \end{center}
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   565
 
5113aa1ae69a some polishing
urbanc
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diff changeset
   566
  \noindent
301
urbanc
parents: 300
diff changeset
   567
  Similarly, if a thread wants to release a lock on a resource, then
urbanc
parents: 300
diff changeset
   568
  it must be running and in the possession of that lock. This is
306
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   569
  formally given by the last inference rule of @{term step}.
5113aa1ae69a some polishing
urbanc
parents: 305
diff changeset
   570
 
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   571
  \begin{center}
306
5113aa1ae69a some polishing
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parents: 305
diff changeset
   572
  @{thm[mode=Rule] thread_V[where thread=th]}
284
d296cb127fcb more on paper
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diff changeset
   573
  \end{center}
306
5113aa1ae69a some polishing
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parents: 305
diff changeset
   574
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   575
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
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diff changeset
   576
  A valid state of PIP can then be conveniently be defined as follows:
284
d296cb127fcb more on paper
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parents: 283
diff changeset
   577
d296cb127fcb more on paper
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parents: 283
diff changeset
   578
  \begin{center}
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   579
  \begin{tabular}{c}
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
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diff changeset
   580
  @{thm[mode=Axiom] vt_nil}\hspace{1cm}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   581
  @{thm[mode=Rule] vt_cons}
284
d296cb127fcb more on paper
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parents: 283
diff changeset
   582
  \end{tabular}
d296cb127fcb more on paper
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parents: 283
diff changeset
   583
  \end{center}
d296cb127fcb more on paper
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parents: 283
diff changeset
   584
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   585
  \noindent
f2e0d031a395 completed model section; vt has only state as argument
urbanc
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diff changeset
   586
  This completes our formal model of PIP. In the next section we present
309
e44c4055d430 more on the paper
urbanc
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diff changeset
   587
  properties that show our model of PIP is correct.
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   588
*}
274
83b0317370c2 more on intro
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parents: 273
diff changeset
   589
310
4d93486cb302 polished
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parents: 309
diff changeset
   590
section {* The Correctness Proof *}
298
f2e0d031a395 completed model section; vt has only state as argument
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diff changeset
   591
301
urbanc
parents: 300
diff changeset
   592
(*<*)
urbanc
parents: 300
diff changeset
   593
context extend_highest_gen
urbanc
parents: 300
diff changeset
   594
begin
urbanc
parents: 300
diff changeset
   595
print_locale extend_highest_gen
urbanc
parents: 300
diff changeset
   596
thm extend_highest_gen_def
urbanc
parents: 300
diff changeset
   597
thm extend_highest_gen_axioms_def
urbanc
parents: 300
diff changeset
   598
thm highest_gen_def
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   599
(*>*)
301
urbanc
parents: 300
diff changeset
   600
text {* 
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   601
  Sha et al.~\cite[Theorem 6]{Sha90} state their correctness criterion for PIP in terms
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   602
  of the number of critical resources: if there are @{text m} critical
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   603
  resources, then a blocked job can only be blocked @{text m} times---that is
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   604
  a bounded number of times.
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   605
  For their version of PIP, this property is \emph{not} true (as pointed out by 
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   606
  Yodaiken \cite{Yodaiken02}) as a high-priority thread can be
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   607
  blocked an unbounded number of times by creating medium-priority
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   608
  threads that block a thread, which in turn locks a critical resource and has
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   609
  too low priority to make progress. In the way we have set up our formal model of PIP, 
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   610
  their proof idea, even when fixed, does not seem to go through.
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   611
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   612
  The idea behind our correctness criterion of PIP is as follows: for all states
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   613
  @{text s}, we know the corresponding thread @{text th} with the highest precedence;
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   614
  we show that in every future state (denoted by @{text "s' @ s"}) in which
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   615
  @{text th} is still alive, either @{text th} is running or it is blocked by a 
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   616
  thread that was alive in the state @{text s}. Since in @{text s}, as in every 
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   617
  state, the set of alive threads is finite, @{text th} can only be blocked a
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   618
  finite number of times. We will actually prove a stricter bound below. However,
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   619
  this correctness criterion hinges upon a number of assumptions about the states
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   620
  @{text s} and @{text "s' @ s"}, the thread @{text th} and the events happening
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   621
  in @{text s'}. We list them next:
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   622
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   623
  \begin{quote}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   624
  {\bf Assumptions on the states @{text s} and @{text "s' @ s"}:} In order to make 
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   625
  any meaningful statement, we need to require that @{text "s"} and 
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   626
  @{text "s' @ s"} are valid states, namely
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   627
  \begin{isabelle}\ \ \ \ \ %%%
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   628
  \begin{tabular}{l}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   629
  @{term "vt s"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   630
  @{term "vt (s' @ s)"} 
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   631
  \end{tabular}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   632
  \end{isabelle}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   633
  \end{quote}
301
urbanc
parents: 300
diff changeset
   634
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   635
  \begin{quote}
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   636
  {\bf Assumptions on the thread @{text "th"}:} The thread @{text th} must be alive in @{text s} and 
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   637
  has the highest precedence of all alive threads in @{text s}. Furthermore the
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   638
  priority of @{text th} is @{text prio} (we need this in the next assumptions).
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   639
  \begin{isabelle}\ \ \ \ \ %%%
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   640
  \begin{tabular}{l}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   641
  @{term "th \<in> threads s"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   642
  @{term "prec th s = Max (cprec s ` threads s)"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   643
  @{term "prec th s = (prio, DUMMY)"}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   644
  \end{tabular}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   645
  \end{isabelle}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   646
  \end{quote}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   647
  
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   648
  \begin{quote}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   649
  {\bf Assumptions on the events in @{text "s'"}:} We want to prove that @{text th} cannot
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   650
  be blocked indefinitely. Of course this can happen if threads with higher priority
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   651
  than @{text th} are continously created in @{text s'}. Therefore we have to assume that  
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   652
  events in @{text s'} can only create (respectively set) threads with equal or lower 
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   653
  priority than @{text prio} of @{text th}. We also need to assume that the
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   654
  priority of @{text "th"} does not get reset and also that @{text th} does
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   655
  not get ``exited'' in @{text "s'"}. This can be ensured by assuming the following three implications. 
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   656
  \begin{isabelle}\ \ \ \ \ %%%
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   657
  \begin{tabular}{l}
310
4d93486cb302 polished
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parents: 309
diff changeset
   658
  {If}~~@{text "Create th' prio' \<in> set s'"}~~{then}~~@{text "prio' \<le> prio"}\\
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   659
  {If}~~@{text "Set th' prio' \<in> set s'"}~~{then}~~@{text "th' \<noteq> th"}~~{and}~~@{text "prio' \<le> prio"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   660
  {If}~~@{text "Exit th' \<in> set s'"}~~{then}~~@{text "th' \<noteq> th"}\\
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   661
  \end{tabular}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   662
  \end{isabelle}
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   663
  \end{quote}
301
urbanc
parents: 300
diff changeset
   664
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   665
  \noindent
310
4d93486cb302 polished
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parents: 309
diff changeset
   666
  Under these assumptions we will prove the following correctness property:
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   667
308
a401d2dff7d0 more on the paper
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parents: 307
diff changeset
   668
  \begin{theorem}\label{mainthm}
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   669
  Given the assumptions about states @{text "s"} and @{text "s' @ s"},
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   670
  the thread @{text th} and the events in @{text "s'"},
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   671
  if @{term "th' \<in> running (s' @ s)"} and @{text "th' \<noteq> th"} then
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   672
  @{text "th' \<in> threads s"}.
307
a2d4450b4bf3 assumptions
urbanc
parents: 306
diff changeset
   673
  \end{theorem}
301
urbanc
parents: 300
diff changeset
   674
308
a401d2dff7d0 more on the paper
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parents: 307
diff changeset
   675
  \noindent
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parents: 307
diff changeset
   676
  This theorem ensures that the thread @{text th}, which has the highest 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   677
  precedence in the state @{text s}, can only be blocked in the state @{text "s' @ s"} 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   678
  by a thread @{text th'} that already existed in @{text s}. As we shall see shortly,
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   679
  that means by only finitely many threads. Consequently, indefinite wait of
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   680
  @{text th}---which would be Priority Inversion---cannot occur.
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   681
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   682
  In what follows we will describe properties of PIP that allow us to prove 
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   683
  Theorem~\ref{mainthm}. It is relatively easily to see that
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   684
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   685
  \begin{isabelle}\ \ \ \ \ %%%
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   686
  \begin{tabular}{@ {}l}
e44c4055d430 more on the paper
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parents: 308
diff changeset
   687
  @{text "running s \<subseteq> ready s \<subseteq> threads s"}\\
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   688
  @{thm[mode=IfThen]  finite_threads}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   689
  \end{tabular}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   690
  \end{isabelle}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   691
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   692
  \noindent
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   693
  where the second property is by induction of @{term vt}. The next three
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   694
  properties are 
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   695
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   696
  \begin{isabelle}\ \ \ \ \ %%%
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   697
  \begin{tabular}{@ {}l}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   698
  @{thm[mode=IfThen] waiting_unique[of _ _ "cs\<^isub>1" "cs\<^isub>2"]}\\
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   699
  @{thm[mode=IfThen] held_unique[of _ "th\<^isub>1" _ "th\<^isub>2"]}\\
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   700
  @{thm[mode=IfThen] runing_unique[of _ "th\<^isub>1" "th\<^isub>2"]}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   701
  \end{tabular}
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   702
  \end{isabelle}
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   703
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   704
  \noindent
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parents: 308
diff changeset
   705
  The first one states that every waiting thread can only wait for a single
310
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   706
  resource (because it gets suspended after requesting that resource and having
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   707
  to wait for it); the second that every resource can only be held by a single thread; 
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   708
  the third property establishes that in every given valid state, there is
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   709
  at most one running thread. We can also show the following properties 
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   710
  about the RAG in @{text "s"}.
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   711
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   712
  \begin{isabelle}\ \ \ \ \ %%%
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   713
  \begin{tabular}{@ {}l}
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   714
  @{text If}~@{thm (prem 1) acyclic_depend}~@{text "then"}:\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   715
  \hspace{5mm}@{thm (concl) acyclic_depend},
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   716
  @{thm (concl) finite_depend} and
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   717
  @{thm (concl) wf_dep_converse},\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   718
  \hspace{5mm}@{text "if"}~@{thm (prem 2) dm_depend_threads}~@{text "then"}~@{thm (concl) dm_depend_threads}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   719
  \hspace{5mm}@{text "if"}~@{thm (prem 2) range_in}~@{text "then"}~@{thm (concl) range_in}
310
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urbanc
parents: 309
diff changeset
   720
  \end{tabular}
4d93486cb302 polished
urbanc
parents: 309
diff changeset
   721
  \end{isabelle}
309
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   722
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   723
  TODO
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   724
e44c4055d430 more on the paper
urbanc
parents: 308
diff changeset
   725
  \noindent
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   726
  The following lemmas show how RAG is changed with the execution of events:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   727
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   728
  \item Execution of @{term "Set"} does not change RAG (@{text "depend_set_unchanged"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   729
    @{thm[display] depend_set_unchanged}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   730
  \item Execution of @{term "Create"} does not change RAG (@{text "depend_create_unchanged"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   731
    @{thm[display] depend_create_unchanged}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   732
  \item Execution of @{term "Exit"} does not change RAG (@{text "depend_exit_unchanged"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   733
    @{thm[display] depend_exit_unchanged}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   734
  \item Execution of @{term "P"} (@{text "step_depend_p"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   735
    @{thm[display] step_depend_p}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   736
  \item Execution of @{term "V"} (@{text "step_depend_v"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   737
    @{thm[display] step_depend_v}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   738
  \end{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   739
  *}
301
urbanc
parents: 300
diff changeset
   740
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   741
text {* \noindent
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   742
  These properties are used to derive the following important results about RAG:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   743
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   744
  \item RAG is loop free (@{text "acyclic_depend"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   745
  @{thm [display] acyclic_depend}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   746
  \item RAGs are finite (@{text "finite_depend"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   747
  @{thm [display] finite_depend}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   748
  \item Reverse paths in RAG are well founded (@{text "wf_dep_converse"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   749
  @{thm [display] wf_dep_converse}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   750
  \item The dependence relation represented by RAG has a tree structure (@{text "unique_depend"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   751
  @{thm [display] unique_depend[of _ _ "n\<^isub>1" "n\<^isub>2"]}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   752
  \item All threads in RAG are living threads 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   753
    (@{text "dm_depend_threads"} and @{text "range_in"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   754
    @{thm [display] dm_depend_threads range_in}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   755
  \end{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   756
  *}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   757
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   758
text {* \noindent
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   759
  The following lemmas show how every node in RAG can be chased to ready threads:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   760
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   761
  \item Every node in RAG can be chased to a ready thread (@{text "chain_building"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   762
    @{thm [display] chain_building[rule_format]}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   763
  \item The ready thread chased to is unique (@{text "dchain_unique"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   764
    @{thm [display] dchain_unique[of _ _ "th\<^isub>1" "th\<^isub>2"]}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   765
  \end{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   766
  *}
301
urbanc
parents: 300
diff changeset
   767
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   768
text {* \noindent
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   769
  Properties about @{term "next_th"}:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   770
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   771
  \item The thread taking over is different from the thread which is releasing
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   772
  (@{text "next_th_neq"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   773
  @{thm [display] next_th_neq}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   774
  \item The thread taking over is unique
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   775
  (@{text "next_th_unique"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   776
  @{thm [display] next_th_unique[of _ _ _ "th\<^isub>1" "th\<^isub>2"]}  
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   777
  \end{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   778
  *}
301
urbanc
parents: 300
diff changeset
   779
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   780
text {* \noindent
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   781
  Some deeper results about the system:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   782
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   783
  \item The maximum of @{term "cp"} and @{term "preced"} are equal (@{text "max_cp_eq"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   784
  @{thm [display] max_cp_eq}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   785
  \item There must be one ready thread having the max @{term "cp"}-value 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   786
  (@{text "max_cp_readys_threads"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   787
  @{thm [display] max_cp_readys_threads}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   788
  \end{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   789
  *}
301
urbanc
parents: 300
diff changeset
   790
308
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   791
text {* \noindent
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   792
  The relationship between the count of @{text "P"} and @{text "V"} and the number of 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   793
  critical resources held by a thread is given as follows:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   794
  \begin{enumerate}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   795
  \item The @{term "V"}-operation decreases the number of critical resources 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   796
    one thread holds (@{text "cntCS_v_dec"})
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   797
     @{thm [display]  cntCS_v_dec}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   798
  \item The number of @{text "V"} never exceeds the number of @{text "P"} 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   799
    (@{text "cnp_cnv_cncs"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   800
    @{thm [display]  cnp_cnv_cncs}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   801
  \item The number of @{text "V"} equals the number of @{text "P"} when 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   802
    the relevant thread is not living:
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   803
    (@{text "cnp_cnv_eq"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   804
    @{thm [display]  cnp_cnv_eq}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   805
  \item When a thread is not living, it does not hold any critical resource 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   806
    (@{text "not_thread_holdents"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   807
    @{thm [display] not_thread_holdents}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   808
  \item When the number of @{text "P"} equals the number of @{text "V"}, the relevant 
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   809
    thread does not hold any critical resource, therefore no thread can depend on it
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   810
    (@{text "count_eq_dependents"}):
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   811
    @{thm [display] count_eq_dependents}
a401d2dff7d0 more on the paper
urbanc
parents: 307
diff changeset
   812
  \end{enumerate}
301
urbanc
parents: 300
diff changeset
   813
*}
urbanc
parents: 300
diff changeset
   814
urbanc
parents: 300
diff changeset
   815
(*<*)
urbanc
parents: 300
diff changeset
   816
end
urbanc
parents: 300
diff changeset
   817
(*>*)
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
   818
313
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   819
subsection {* Proof idea *}
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   820
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   821
(*<*)
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   822
context extend_highest_gen
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   823
begin
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   824
print_locale extend_highest_gen
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   825
thm extend_highest_gen_def
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   826
thm extend_highest_gen_axioms_def
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   827
thm highest_gen_def
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   828
(*>*)
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   829
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   830
text {*
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   831
The reason that only threads which already held some resoures
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   832
can be runing and block @{text "th"} is that if , otherwise, one thread 
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   833
does not hold any resource, it may never have its prioirty raised
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   834
and will not get a chance to run. This fact is supported by 
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   835
lemma @{text "moment_blocked"}:
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   836
@{thm [display] moment_blocked}
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   837
When instantiating  @{text "i"} to @{text "0"}, the lemma means threads which did not hold any
3d154253d5fe proof idea
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diff changeset
   838
resource in state @{text "s"} will not have a change to run latter. Rephrased, it means 
3d154253d5fe proof idea
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diff changeset
   839
any thread which is running after @{text "th"} became the highest must have already held
3d154253d5fe proof idea
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diff changeset
   840
some resource at state @{text "s"}.
3d154253d5fe proof idea
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parents: 312
diff changeset
   841
3d154253d5fe proof idea
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parents: 312
diff changeset
   842
3d154253d5fe proof idea
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parents: 312
diff changeset
   843
  When instantiating @{text "i"} to a number larger than @{text "0"}, the lemma means 
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diff changeset
   844
  if a thread releases all its resources at some moment in @{text "t"}, after that, 
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diff changeset
   845
  it may never get a change to run. If every thread releases its resource in finite duration,
3d154253d5fe proof idea
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diff changeset
   846
  then after a while, only thread @{text "th"} is left running. This shows how indefinite 
3d154253d5fe proof idea
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diff changeset
   847
  priority inversion can be avoided. 
3d154253d5fe proof idea
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parents: 312
diff changeset
   848
3d154253d5fe proof idea
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parents: 312
diff changeset
   849
  So, the key of the proof is to establish the correctness of @{text "moment_blocked"}.
3d154253d5fe proof idea
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parents: 312
diff changeset
   850
  We are going to show how this lemma is proved. At the heart of this proof, is 
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parents: 312
diff changeset
   851
  lemma @{text "pv_blocked"}:
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   852
  @{thm [display] pv_blocked}
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parents: 312
diff changeset
   853
  This lemma says: for any @{text "s"}-extension {text "t"}, if thread @{text "th'"}
3d154253d5fe proof idea
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diff changeset
   854
  does not hold any resource, it can not be running at @{text "t@s"}.
3d154253d5fe proof idea
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parents: 312
diff changeset
   855
3d154253d5fe proof idea
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parents: 312
diff changeset
   856
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   857
  \noindent Proof: 
3d154253d5fe proof idea
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parents: 312
diff changeset
   858
  \begin{enumerate}
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parents: 312
diff changeset
   859
  \item Since thread @{text "th'"} does not hold any resource, no thread may depend on it, 
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diff changeset
   860
    so its current precedence @{text "cp (t@s) th'"} equals to its own precedence
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parents: 312
diff changeset
   861
   @{text "preced th' (t@s)"}.  \label{arg_1}
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urbanc
parents: 312
diff changeset
   862
  \item Since @{text "th"} has the highest precedence in the system and 
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diff changeset
   863
    precedences are distinct among threads, we have
3d154253d5fe proof idea
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diff changeset
   864
    @{text "preced th' (t@s) < preced th (t@s)"}. From this and item \ref{arg_1}, 
3d154253d5fe proof idea
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parents: 312
diff changeset
   865
    we have @{text "cp (t@s) th' < preced th (t@s)"}.
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   866
  \item Since @{text "preced th (t@s)"} is already the highest in the system, 
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diff changeset
   867
    @{text "cp (t@s) th"} can not be higher than this and can not be lower neither (by 
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   868
    the definition of @{text "cp"}), we have @{text "preced th (t@s) = cp (t@s) th"}.
3d154253d5fe proof idea
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parents: 312
diff changeset
   869
  \item Finally we have @{text "cp (t@s) th' < cp (t@s) th"}.
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   870
  \item By defintion of @{text "running"}, @{text "th'"} can not be runing at 
3d154253d5fe proof idea
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diff changeset
   871
    @{text "t@s"}.
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   872
  \end{enumerate}
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   873
  Since @{text "th'"} is not able to run at state @{text "t@s"}, it is not able to 
3d154253d5fe proof idea
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parents: 312
diff changeset
   874
  make either {text "P"} or @{text "V"} action, so if @{text "t@s"} is extended
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   875
  one step further, @{text "th'"} still does not hold any resource. 
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   876
  The situation will not unchanged in further extensions as long as 
3d154253d5fe proof idea
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parents: 312
diff changeset
   877
  @{text "th"} holds the highest precedence. Since this @{text "t"} is arbitarily chosen 
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   878
  except being constrained by predicate @{text "extend_highest_gen"} and 
3d154253d5fe proof idea
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parents: 312
diff changeset
   879
  this predicate has the property that if it holds for @{text "t"}, it also holds
3d154253d5fe proof idea
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diff changeset
   880
  for any moment @{text "i"} inside @{text "t"}, as shown by lemma @{text "red_moment"}:
3d154253d5fe proof idea
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parents: 312
diff changeset
   881
@{thm [display] "extend_highest_gen.red_moment"}
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   882
  so @{text "pv_blocked"} can be applied to any @{text "moment i t"}. 
3d154253d5fe proof idea
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parents: 312
diff changeset
   883
  From this, lemma @{text "moment_blocked"} follows.
3d154253d5fe proof idea
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diff changeset
   884
*}
3d154253d5fe proof idea
urbanc
parents: 312
diff changeset
   885
3d154253d5fe proof idea
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parents: 312
diff changeset
   886
(*<*)
3d154253d5fe proof idea
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diff changeset
   887
end
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parents: 312
diff changeset
   888
(*>*)
3d154253d5fe proof idea
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parents: 312
diff changeset
   889
3d154253d5fe proof idea
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parents: 312
diff changeset
   890
314
ccb6c0601614 some parts of the conclusion
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parents: 313
diff changeset
   891
section {* Properties for an Implementation\label{implement} *}
311
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diff changeset
   892
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diff changeset
   893
text {*
312
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diff changeset
   894
  While a formal correctness proof for our model of PIP is certainly
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diff changeset
   895
  attractive (especially in light of the flawed proof by Sha et
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diff changeset
   896
  al.~\cite{Sha90}), we found that the formalisation can even help us
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parents: 311
diff changeset
   897
  with efficiently implementing PIP.
311
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diff changeset
   898
312
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parents: 311
diff changeset
   899
  For example Baker complained that calculating the current precedence
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diff changeset
   900
  in PIP is quite ``heavy weight'' in Linux (see our Introduction).
09281ccb31bd added implementation section
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diff changeset
   901
  In our model of PIP the current precedence of a thread in a state s
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diff changeset
   902
  depends on all its dependants---a ``global'' transitive notion,
09281ccb31bd added implementation section
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diff changeset
   903
  which is indeed heavy weight (see Def.~shown in \eqref{cpreced}).
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diff changeset
   904
  We can however prove how to improve upon this. For this let us
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diff changeset
   905
  define the notion of @{term children} of a thread as
09281ccb31bd added implementation section
urbanc
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diff changeset
   906
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urbanc
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diff changeset
   907
  \begin{isabelle}\ \ \ \ \ %%%
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urbanc
parents: 311
diff changeset
   908
  \begin{tabular}{@ {}l}
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urbanc
parents: 311
diff changeset
   909
  @{thm children_def2}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   910
  \end{tabular}
09281ccb31bd added implementation section
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parents: 311
diff changeset
   911
  \end{isabelle}
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urbanc
parents: 311
diff changeset
   912
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   913
  \noindent
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urbanc
parents: 311
diff changeset
   914
  where a child is a thread that is one ``hop'' away in the @{term RAG} from the 
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parents: 311
diff changeset
   915
  tread @{text th} (and waiting for @{text th} to release a resource). We can prove that
311
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urbanc
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diff changeset
   916
312
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diff changeset
   917
  \begin{lemma}\label{childrenlem}
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diff changeset
   918
  @{text "If"} @{thm (prem 1) cp_rec} @{text "then"}
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parents: 311
diff changeset
   919
  \begin{center}
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urbanc
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diff changeset
   920
  @{thm (concl) cp_rec}.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   921
  \end{center}
09281ccb31bd added implementation section
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diff changeset
   922
  \end{lemma}
311
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diff changeset
   923
  
312
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diff changeset
   924
  \noindent
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urbanc
parents: 311
diff changeset
   925
  That means the current precedence of a thread @{text th} can be
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   926
  computed locally by considering only the children of @{text th}. In
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   927
  effect, it only needs to be recomputed for @{text th} when one of
09281ccb31bd added implementation section
urbanc
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diff changeset
   928
  its children change their current precedence.  Once the current 
09281ccb31bd added implementation section
urbanc
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diff changeset
   929
  precedence is computed in this more efficient manner, the selection
09281ccb31bd added implementation section
urbanc
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diff changeset
   930
  of the thread with highest precedence from a set of ready threads is
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   931
  a standard scheduling operation implemented in most operating
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   932
  systems.
311
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urbanc
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diff changeset
   933
312
09281ccb31bd added implementation section
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diff changeset
   934
  Of course the main implementation work for PIP involves the scheduler
09281ccb31bd added implementation section
urbanc
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diff changeset
   935
  and coding how it should react to the events, for example which 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   936
  datastructures need to be modified (mainly @{text RAG} and @{text cprec}).
09281ccb31bd added implementation section
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diff changeset
   937
  Below we outline how our formalisation guides this implementation for each 
09281ccb31bd added implementation section
urbanc
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diff changeset
   938
  event.\smallskip
09281ccb31bd added implementation section
urbanc
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diff changeset
   939
*}
311
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diff changeset
   940
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urbanc
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diff changeset
   941
(*<*)
312
09281ccb31bd added implementation section
urbanc
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diff changeset
   942
context step_create_cps
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urbanc
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diff changeset
   943
begin
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urbanc
parents: 311
diff changeset
   944
(*>*)
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   945
text {*
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urbanc
parents: 311
diff changeset
   946
  \noindent
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urbanc
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diff changeset
   947
  @{term "Create th prio"}: We assume that the current state @{text s'} and 
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urbanc
parents: 311
diff changeset
   948
  the next state @{term "s \<equiv> Create th prio#s'"} are both valid (meaning the event
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   949
  is allowed to occur). In this situation we can show that
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   950
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urbanc
parents: 311
diff changeset
   951
  \begin{isabelle}\ \ \ \ \ %%%
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urbanc
parents: 311
diff changeset
   952
  \begin{tabular}{@ {}l}
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urbanc
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diff changeset
   953
  @{thm eq_dep}\\
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urbanc
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diff changeset
   954
  @{thm eq_cp_th}\\
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urbanc
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diff changeset
   955
  @{thm[mode=IfThen] eq_cp}
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urbanc
parents: 311
diff changeset
   956
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   957
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   958
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   959
  \noindent
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urbanc
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diff changeset
   960
  This means we do not have recalculate the @{text RAG} and also none of the
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urbanc
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diff changeset
   961
  current precedences of the other threads. The current precedence of the created
09281ccb31bd added implementation section
urbanc
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diff changeset
   962
  thread is just its precedence, that is the pair @{term "(prio, length (s::event list))"}.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   963
  \smallskip
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   964
  *}
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urbanc
parents: 311
diff changeset
   965
(*<*)
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   966
end
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parents: 311
diff changeset
   967
context step_exit_cps
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urbanc
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diff changeset
   968
begin
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urbanc
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diff changeset
   969
(*>*)
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urbanc
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diff changeset
   970
text {*
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urbanc
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diff changeset
   971
  \noindent
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urbanc
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diff changeset
   972
  @{term "Exit th"}: We again assume that the current state @{text s'} and 
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diff changeset
   973
  the next state @{term "s \<equiv> Exit th#s'"} are both valid. We can show that
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urbanc
parents: 311
diff changeset
   974
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   975
  \begin{isabelle}\ \ \ \ \ %%%
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urbanc
parents: 311
diff changeset
   976
  \begin{tabular}{@ {}l}
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diff changeset
   977
  @{thm eq_dep}\\
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urbanc
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diff changeset
   978
  @{thm[mode=IfThen] eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   979
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   980
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
   981
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urbanc
parents: 311
diff changeset
   982
  \noindent
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urbanc
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diff changeset
   983
  This means also we do not have to recalculate the @{text RAG} and
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urbanc
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diff changeset
   984
  not the current precedences for the other threads. Since @{term th} is not
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urbanc
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diff changeset
   985
  alive anymore in state @{term "s"}, there is no need to calculate its
09281ccb31bd added implementation section
urbanc
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diff changeset
   986
  current precedence.
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diff changeset
   987
  \smallskip
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urbanc
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diff changeset
   988
*}
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urbanc
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diff changeset
   989
(*<*)
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diff changeset
   990
end
311
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diff changeset
   991
context step_set_cps
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diff changeset
   992
begin
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urbanc
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diff changeset
   993
(*>*)
312
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urbanc
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diff changeset
   994
text {*
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diff changeset
   995
  \noindent
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diff changeset
   996
  @{term "Set th prio"}: We assume that @{text s'} and 
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urbanc
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diff changeset
   997
  @{term "s \<equiv> Set th prio#s'"} are both valid. We can show that
311
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parents: 310
diff changeset
   998
312
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diff changeset
   999
  \begin{isabelle}\ \ \ \ \ %%%
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urbanc
parents: 311
diff changeset
  1000
  \begin{tabular}{@ {}l}
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urbanc
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diff changeset
  1001
  @{thm[mode=IfThen] eq_dep}\\
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diff changeset
  1002
  @{thm[mode=IfThen] eq_cp}
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diff changeset
  1003
  \end{tabular}
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parents: 311
diff changeset
  1004
  \end{isabelle}
311
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diff changeset
  1005
312
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diff changeset
  1006
  \noindent
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urbanc
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diff changeset
  1007
  The first is again telling us we do not need to change the @{text RAG}. The second
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urbanc
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diff changeset
  1008
  however states that only threads that are \emph{not} dependent on @{text th} have their
09281ccb31bd added implementation section
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diff changeset
  1009
  current precedence unchanged. For the others we have to recalculate the current
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urbanc
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diff changeset
  1010
  precedence. To do this we can start from @{term "th"} 
09281ccb31bd added implementation section
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diff changeset
  1011
  and follow the @{term "depend"}-chains to recompute the @{term "cp"} of every 
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diff changeset
  1012
  thread encountered on the way using Lemma~\ref{childrenlem}. Since the @{term "depend"}
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diff changeset
  1013
  is loop free, this procedure always stop. The the following two lemmas show this 
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diff changeset
  1014
  procedure can actually stop often earlier.
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urbanc
parents: 311
diff changeset
  1015
09281ccb31bd added implementation section
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diff changeset
  1016
  \begin{isabelle}\ \ \ \ \ %%%
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urbanc
parents: 311
diff changeset
  1017
  \begin{tabular}{@ {}l}
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diff changeset
  1018
  @{thm[mode=IfThen] eq_up_self}\\
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diff changeset
  1019
  @{text "If"} @{thm (prem 1) eq_up}, @{thm (prem 2) eq_up} and @{thm (prem 3) eq_up}\\
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diff changeset
  1020
  @{text "then"} @{thm (concl) eq_up}.
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diff changeset
  1021
  \end{tabular}
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diff changeset
  1022
  \end{isabelle}
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parents: 311
diff changeset
  1023
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diff changeset
  1024
  \noindent
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diff changeset
  1025
  The first states that if the current precedence of @{text th} is unchanged,
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1026
  then the procedure can stop immediately (all dependent threads have their @{term cp}-value unchanged).
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1027
  The second states that if an intermediate @{term cp}-value does not change, then
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1028
  the procedure can also stop, because none of its dependent threads will
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1029
  have their current precedence changed.
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1030
  \smallskip
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1031
  *}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1032
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1033
(*<*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1034
end
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1035
context step_v_cps_nt
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1036
begin
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1037
(*>*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1038
text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1039
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1040
  @{term "V th cs"}: We assume that @{text s'} and 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1041
  @{term "s \<equiv> V th cs#s'"} are both valid. We have to consider two
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1042
  subcases: one where there is a thread to ``take over'' the released
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1043
  resource @{text cs}, and where there is not. Let us consider them
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1044
  in turn. Suppose in state @{text s}, the thread @{text th'} takes over
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1045
  resource @{text cs} from thread @{text th}. We can show
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1046
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1047
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1048
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1049
  @{thm depend_s}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1050
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1051
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1052
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1053
  which shows how the @{text RAG} needs to be changed. This also suggests
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1054
  how the current precedences need to be recalculated. For threads that are
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1055
  not @{text "th"} and @{text "th'"} nothing needs to be changed, since we
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1056
  can show
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1057
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1058
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1059
  @{thm[mode=IfThen] cp_kept}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1060
  \end{isabelle}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1061
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1062
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1063
  For @{text th} and @{text th'} we need to use Lemma~\ref{childrenlem} to
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1064
  recalculate their current prcedence since their children have changed. *}(*<*)end context step_v_cps_nnt begin (*>*)text {*
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1065
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1066
  In the other case where there is no thread that takes over @{text cs}, we can show how
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1067
  to recalculate the @{text RAG} and also show that no current precedence needs
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1068
  to be recalculated, except for @{text th} (like in the case above).
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1069
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1070
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1071
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1072
  @{thm depend_s}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1073
  @{thm eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1074
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1075
  \end{isabelle}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1076
  *}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1077
(*<*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1078
end
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1079
context step_P_cps_e
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1080
begin
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1081
(*>*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1082
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1083
text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1084
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1085
  @{term "P th cs"}: We assume that @{text s'} and 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1086
  @{term "s \<equiv> P th cs#s'"} are both valid. We again have to analyse two subcases, namely
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1087
  the one where @{text cs} is locked, and where it is not. We treat the second case
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1088
  first by showing that
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1089
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1090
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1091
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1092
  @{thm depend_s}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1093
  @{thm eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1094
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1095
  \end{isabelle}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1096
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1097
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1098
  This means we do not need to add a holding edge to the @{text RAG} and no
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1099
  current precedence must be recalculated (including that for @{text th}).*}(*<*)end context step_P_cps_ne begin(*>*) text {*
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1100
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1101
  In the second case we know that resouce @{text cs} is locked. We can show that
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1102
  
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1103
  \begin{isabelle}\ \ \ \ \ %%%
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1104
  \begin{tabular}{@ {}l}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1105
  @{thm depend_s}\\
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1106
  @{thm[mode=IfThen] eq_cp}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1107
  \end{tabular}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1108
  \end{isabelle}
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1109
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1110
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1111
  That means we have to add a waiting edge to the @{text RAG}. Furthermore
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1112
  the current precedence for all threads that are not dependent on @{text th}
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1113
  are unchanged. For the others we need to follow the @{term "depend"}-chains 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1114
  in the @{text RAG} and recompute the @{term "cp"}. However, like in the 
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1115
  @{text Set}-event, this operation can stop often earlier, namely when intermediate
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1116
  values do not change.
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1117
  *}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1118
(*<*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1119
end
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1120
(*>*)
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1121
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1122
text {*
312
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1123
  \noindent
09281ccb31bd added implementation section
urbanc
parents: 311
diff changeset
  1124
  TO DO a few sentences summarising what has been achieved.
311
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1125
*}
23632f329e10 merged Xingyuan's changes
urbanc
parents: 310
diff changeset
  1126
298
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
  1127
section {* Conclusion *}
f2e0d031a395 completed model section; vt has only state as argument
urbanc
parents: 297
diff changeset
  1128
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1129
text {* 
314
ccb6c0601614 some parts of the conclusion
urbanc
parents: 313
diff changeset
  1130
  The Priority Inheritance Protocol (PIP) is a classic textbook
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1131
  algorithm used in real-time operating systems in order to avoid the problem of
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1132
  Priority Inversion.  Although classic and widely used, PIP does have
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1133
  its faults: for example it does not prevent deadlocks where threads
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1134
  have circular lock dependencies.
300
8524f94d251b correct RAG
urbanc
parents: 299
diff changeset
  1135
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1136
  We had two aims in mind with our formalisation of PIP: One is to
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1137
  make the notions in the correctness proof by Sha et al.~\cite{Sha90}
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1138
  precise so that they can be processed by a theorem prover, because a
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1139
  mechanically checked proof avoids the flaws that crept into their
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1140
  informal reasoning. We achieved this aim: The correctness of PIP now
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1141
  only hinges on the assumptions behind our formal model. The reasoning, which is
314
ccb6c0601614 some parts of the conclusion
urbanc
parents: 313
diff changeset
  1142
  sometimes quite intricate and tedious, has been checked beyond any
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1143
  reasonable doubt by Isabelle/HOL. We can also confirm that Paulson's
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1144
  inductive method to protocol verification~\cite{Paulson98} is quite
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1145
  suitable for our formal model and proof. The traditional application
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1146
  area of this method is security protocols.  The only other
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1147
  application of Paulson's method we know of outside this area is
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1148
  \cite{Wang09}.
301
urbanc
parents: 300
diff changeset
  1149
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1150
  The second aim is to provide a specification for actually
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1151
  implementing PIP. Textbooks, like \cite[Section 5.6.5]{Vahalia96},
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1152
  explain how to use various implementations of PIP and abstractly
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1153
  discuss its properties, but surprisingly lack most details for a
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1154
  programmer.  That this is an issue in practice is illustrated by the
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1155
  email from Baker we cited in the Introduction. We achieved also this
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1156
  aim: The formalisation gives the first author enough data to enable
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1157
  his undergraduate students to implement as part of their OS course
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1158
  PIP on top of PINTOS, a small operating system for teaching
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1159
  purposes. A byproduct of our formalisation effort is that nearly all
314
ccb6c0601614 some parts of the conclusion
urbanc
parents: 313
diff changeset
  1160
  design choices for the PIP scheduler are backed up with a proved
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1161
  lemma. We were also able to prove the property that the choice of
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1162
  the next thread taking over a lock is irrelevant for the correctness
316
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1163
  of PIP. Earlier model checking approaches to verifying the
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1164
  correctness of PIP \cite{Faria08,Jahier09,Wellings07} were not able
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1165
  to provide this kind of ``deep understanding'' about PIP.
315
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1166
f05f6aeb32f4 more conclusion
urbanc
parents: 314
diff changeset
  1167
  PIP is a scheduling algorithm for single-processor systems. We are
316
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1168
  now living in a multi-processor world. So the question naturally
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1169
  arises whether PIP has any relevance nowadays beyond
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1170
  teaching. Priority inversion certainly occurs also in
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1171
  multi-processor systems.  The surprising answer, according to
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1172
  \cite{Steinberg10}, is that except for one unsatisfactory proposal
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1173
  nobody seems to have any good idea how PIP shoud be modified to work
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1174
  correctly on multi-processor systems. The obstacles become clear
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1175
  when considering that locking and releasing a resource always
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1176
  requires some small time span. If processes are independent, then a
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1177
  low priority process can always ``steal'' a the lock for such a
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1178
  resource from a high-priority process that should have run next. In
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1179
  effect, we have again the problem of Priority Inversions. It seems 
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1180
  difficult to design an algorithm with a meaningful property from
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1181
  PIP.  We can imagine PIP can be of use in a situation where
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1182
  processes are not independent, but coordinated such that a master
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1183
  process distributes the work over some slave processes. However a
0423e4d7c77b more conclusion
urbanc
parents: 315
diff changeset
  1184
  formal investigation of this is beyond the scope of this paper.
301
urbanc
parents: 300
diff changeset
  1185
314
ccb6c0601614 some parts of the conclusion
urbanc
parents: 313
diff changeset
  1186
 
265
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
  1187
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1188
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1189
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1190
section {* Key properties \label{extension} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1191
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1192
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1193
context extend_highest_gen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1194
begin
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1195
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1196
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1197
text {*
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1198
  The essential of {\em Priority Inheritance} is to avoid indefinite priority inversion. For this 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1199
  purpose, we need to investigate what happens after one thread takes the highest precedence. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1200
  A locale is used to describe such a situation, which assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1201
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1202
  \item @{term "s"} is a valid state (@{text "vt_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1203
    @{thm  vt_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1204
  \item @{term "th"} is a living thread in @{term "s"} (@{text "threads_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1205
    @{thm threads_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1206
  \item @{term "th"} has the highest precedence in @{term "s"} (@{text "highest"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1207
    @{thm highest}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1208
  \item The precedence of @{term "th"} is @{term "Prc prio tm"} (@{text "preced_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1209
    @{thm preced_th}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1210
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1211
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1212
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1213
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1214
  Under these assumptions, some basic priority can be derived for @{term "th"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1215
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1216
  \item The current precedence of @{term "th"} equals its own precedence (@{text "eq_cp_s_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1217
    @{thm [display] eq_cp_s_th}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1218
  \item The current precedence of @{term "th"} is the highest precedence in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1219
    the system (@{text "highest_cp_preced"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1220
    @{thm [display] highest_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1221
  \item The precedence of @{term "th"} is the highest precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1222
    in the system (@{text "highest_preced_thread"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1223
    @{thm [display] highest_preced_thread}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1224
  \item The current precedence of @{term "th"} is the highest current precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1225
    in the system (@{text "highest'"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1226
    @{thm [display] highest'}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1227
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1228
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1229
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1230
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1231
  To analysis what happens after state @{term "s"} a sub-locale is defined, which 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1232
  assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1233
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1234
  \item @{term "t"} is a valid extension of @{term "s"} (@{text "vt_t"}): @{thm vt_t}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1235
  \item Any thread created in @{term "t"} has priority no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1236
    its precedence can not be higher than @{term "th"},  therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1237
    @{term "th"} remain to be the one with the highest precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1238
    (@{text "create_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1239
    @{thm [display] create_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1240
  \item Any adjustment of priority in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1241
    @{term "t"} does not happen to @{term "th"} and 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1242
    the priority set is no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1243
    @{term "th"} remain to be the one with the highest precedence (@{text "set_diff_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1244
    @{thm [display] set_diff_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1245
  \item Since we are investigating what happens to @{term "th"}, it is assumed 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1246
    @{term "th"} does not exit during @{term "t"} (@{text "exit_diff"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1247
    @{thm [display] exit_diff}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1248
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1249
*}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1250
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1251
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1252
  All these assumptions are put into a predicate @{term "extend_highest_gen"}. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1253
  It can be proved that @{term "extend_highest_gen"} holds 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1254
  for any moment @{text "i"} in it @{term "t"} (@{text "red_moment"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1255
  @{thm [display] red_moment}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1256
  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1257
  From this, an induction principle can be derived for @{text "t"}, so that 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1258
  properties already derived for @{term "t"} can be applied to any prefix 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1259
  of @{text "t"} in the proof of new properties 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1260
  about @{term "t"} (@{text "ind"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1261
  \begin{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1262
  @{thm[display] ind}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1263
  \end{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1265
  The following properties can be proved about @{term "th"} in @{term "t"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1266
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1267
  \item In @{term "t"}, thread @{term "th"} is kept live and its 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1268
    precedence is preserved as well
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1269
    (@{text "th_kept"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1270
    @{thm [display] th_kept}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1271
  \item In @{term "t"}, thread @{term "th"}'s precedence is always the maximum among 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1272
    all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1273
    (@{text "max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1274
    @{thm [display] max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1275
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1276
    among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1277
    (@{text "th_cp_max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1278
    @{thm [display] th_cp_max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1279
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum current 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1280
    precedence among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1281
    (@{text "th_cp_max"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1282
    @{thm [display] th_cp_max}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1283
  \item In @{term "t"}, thread @{term "th"}'s current precedence equals its precedence at moment 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1284
    @{term "s"}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1285
    (@{text "th_cp_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1286
    @{thm [display] th_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1287
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1288
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1289
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1290
text {* \noindent
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
  1291
  The main theorem of this part is to characterizing the running thread during @{term "t"} 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1292
  (@{text "runing_inversion_2"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1293
  @{thm [display] runing_inversion_2}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1294
  According to this, if a thread is running, it is either @{term "th"} or was
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1295
  already live and held some resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1296
  at moment @{text "s"} (expressed by: @{text "cntV s th' < cntP s th'"}).
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1297
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1298
  Since there are only finite many threads live and holding some resource at any moment,
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1299
  if every such thread can release all its resources in finite duration, then after finite
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1300
  duration, none of them may block @{term "th"} anymore. So, no priority inversion may happen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1301
  then.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1302
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1303
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1304
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1305
end
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1306
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
  1307
272
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1308
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1309
section {* Related works \label{related} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1310
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1311
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1312
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1313
  \item {\em Integrating Priority Inheritance Algorithms in the Real-Time Specification for Java}
304
bd05c5011c0f contribution section
urbanc
parents: 301
diff changeset
  1314
    \cite{Wellings07} models and verifies the combination of Priority Inheritance (PI) and 
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1315
    Priority Ceiling Emulation (PCE) protocols in the setting of Java virtual machine 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1316
    using extended Timed Automata(TA) formalism of the UPPAAL tool. Although a detailed 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1317
    formal model of combined PI and PCE is given, the number of properties is quite 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1318
    small and the focus is put on the harmonious working of PI and PCE. Most key features of PI 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1319
    (as well as PCE) are not shown. Because of the limitation of the model checking technique
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1320
    used there, properties are shown only for a small number of scenarios. Therefore, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1321
    the verification does not show the correctness of the formal model itself in a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1322
    convincing way.  
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1323
  \item {\em Formal Development of Solutions for Real-Time Operating Systems with TLA+/TLC}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1324
    \cite{Faria08}. A formal model of PI is given in TLA+. Only 3 properties are shown 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1325
    for PI using model checking. The limitation of model checking is intrinsic to the work.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1326
  \item {\em Synchronous modeling and validation of priority inheritance schedulers}
304
bd05c5011c0f contribution section
urbanc
parents: 301
diff changeset
  1327
    \cite{Jahier09}. Gives a formal model
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1328
    of PI and PCE in AADL (Architecture Analysis \& Design Language) and checked 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1329
    several properties using model checking. The number of properties shown there is 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1330
    less than here and the scale is also limited by the model checking technique. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1331
  \item {\em The Priority Ceiling Protocol: Formalization and Analysis Using PVS}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1332
    \cite{dutertre99b}. Formalized another protocol for Priority Inversion in the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1333
    interactive theorem proving system PVS.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1334
\end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1335
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1336
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1337
  There are several works on inversion avoidance:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1338
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1339
  \item {\em Solving the group priority inversion problem in a timed asynchronous system}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1340
    \cite{Wang:2002:SGP}. The notion of Group Priority Inversion is introduced. The main 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1341
    strategy is still inversion avoidance. The method is by reordering requests 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1342
    in the setting of Client-Server.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1343
  \item {\em A Formalization of Priority Inversion} \cite{journals/rts/BabaogluMS93}. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1344
    Formalized the notion of Priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1345
    Inversion and proposes methods to avoid it. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1346
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1347
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1348
  {\em Examples of inaccurate specification of the protocol ???}.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1349
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1350
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1351
286
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1352
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1353
(*<*)
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1354
end
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1355
(*>*)