prio/Paper/Paper.thy
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(*<*)
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theory Paper
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imports CpsG ExtGG (* "~~/src/HOL/Library/LaTeXsugar" *) LaTeXsugar
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begin
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ML {*
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  open Printer;
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  show_question_marks_default := false;
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  *}
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notation (latex output)
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  Cons ("_::_" [78,77] 73) and
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  vt ("valid'_state") and
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  runing ("running") and
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  birthtime ("inception") and
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  If  ("(\<^raw:\textrm{>if\<^raw:}> (_)/ \<^raw:\textrm{>then\<^raw:}> (_)/ \<^raw:\textrm{>else\<^raw:}> (_))" 10) and
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  DUMMY  ("\<^raw:\mbox{$\_\!\_$}>")
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(*>*)
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section {* Introduction *}
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text {*
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  Many real-time systems need to support threads involving priorities and
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  locking of resources. Locking of resources ensures mutual exclusion
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  when accessing shared data or devices that cannot be
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  preempted. Priorities allow scheduling of threads that need to
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  finish their work within deadlines.  Unfortunately, both features
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  can interact in subtle ways leading to a problem, called
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  \emph{Priority Inversion}. Suppose three threads having priorities
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  $H$(igh), $M$(edium) and $L$(ow). We would expect that the thread
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  $H$ blocks any other thread with lower priority and itself cannot
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  be blocked by any thread with lower priority. Alas, in a naive
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  implementation of resource looking and priorities this property can
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  be violated. Even worse, $H$ can be delayed indefinitely by
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  threads with lower priorities. For this let $L$ be in the
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  possession of a lock for a resource that also $H$ needs. $H$ must
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  therefore wait for $L$ to exit the critical section and release this
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  lock. The problem is that $L$ might in turn be blocked by any
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  thread with priority $M$, and so $H$ sits there potentially waiting
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  indefinitely. Since $H$ is blocked by threads with lower
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  priorities, the problem is called Priority Inversion. It was first
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  described in \cite{Lampson80} in the context of the
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  Mesa programming language designed for concurrent programming.
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  If the problem of Priority Inversion is ignored, real-time systems
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  can become unpredictable and resulting bugs can be hard to diagnose.
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  The classic example where this happened is the software that
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  controlled the Mars Pathfinder mission in 1997 \cite{Reeves98}.
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  Once the spacecraft landed, the software shut down at irregular
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  intervals leading to loss of project time as normal operation of the
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  craft could only resume the next day (the mission and data already
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  collected were fortunately not lost, because of a clever system
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  design).  The reason for the shutdowns was that the scheduling
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  software fell victim of Priority Inversion: a low priority thread
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  locking a resource prevented a high priority thread from running in
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  time leading to a system reset. Once the problem was found, it was
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  rectified by enabling the \emph{Priority Inheritance Protocol} (PIP)
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  \cite{Sha90}\footnote{Sha et al.~call it the \emph{Basic Priority
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  Inheritance Protocol} \cite{Sha90} and others sometimes call it
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  also \emph{Priority Boosting}.} in the scheduling software.
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  The idea behind PIP is to let the thread $L$ temporarily inherit
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  the high priority from $H$ until $L$ leaves the critical section by
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  unlocking the resource. This solves the problem of $H$ having to
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  wait indefinitely, because $L$ cannot be blocked by threads having
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  priority $M$. While a few other solutions exist for the Priority
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  Inversion problem, PIP is one that is widely deployed and
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  implemented. This includes VxWorks (a proprietary real-time OS used
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  in the Mars Pathfinder mission, in Boeing's 787 Dreamliner, Honda's
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  ASIMO robot, etc.), but also the POSIX 1003.1c Standard realised for
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  example in libraries for FreeBSD, Solaris and Linux.
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  One advantage of PIP is that increasing the priority of a thread
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  can be dynamically calculated by the scheduler. This is in contrast
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  to, for example, \emph{Priority Ceiling} \cite{Sha90}, another
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  solution to the Priority Inversion problem, which requires static
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  analysis of the program in order to prevent Priority
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  Inversion. However, there has also been strong criticism against
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  PIP. For instance, PIP cannot prevent deadlocks when lock
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  dependencies are circular, and also blocking times can be
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  substantial (more than just the duration of a critical section).
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  Though, most criticism against PIP centres around unreliable
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  implementations and PIP being too complicated and too inefficient.
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  For example, Yodaiken writes in \cite{Yodaiken02}:
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  \begin{quote}
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  \it{}``Priority inheritance is neither efficient nor reliable. Implementations
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  are either incomplete (and unreliable) or surprisingly complex and intrusive.''
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  \end{quote}
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  \noindent
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  He suggests to avoid PIP altogether by not allowing critical
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  sections to be preempted. While this might have been a reasonable
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  solution in 2002, in our modern multiprocessor world, this seems out
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  of date. The reason is that this precludes other high-priority 
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  threads from running even when they do not make any use of the locked
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  resource.
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  However, there is clearly a need for investigating correct
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  algorithms for PIP. A few specifications for PIP exist (in English)
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  and also a few high-level descriptions of implementations (e.g.~in
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  the textbook \cite[Section 5.6.5]{Vahalia96}), but they help little
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  with actual implementations. That this is a problem in practise is
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  proved by an email from Baker, who wrote on 13 July 2009 on the Linux
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  Kernel mailing list:
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  \begin{quote}
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  \it{}``I observed in the kernel code (to my disgust), the Linux PIP
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  implementation is a nightmare: extremely heavy weight, involving
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  maintenance of a full wait-for graph, and requiring updates for a
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  range of events, including priority changes and interruptions of
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  wait operations.''
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  \end{quote}
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  \noindent
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  The criticism by Yodaiken, Baker and others suggests to us to look
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  again at PIP from a more abstract level (but still concrete enough
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  to inform an implementation) and makes PIP an ideal candidate for a
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  formal verification. One reason, of course, is that the original
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  presentation of PIP~\cite{Sha90}, despite being informally
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  ``proved'' correct, is actually \emph{flawed}. 
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  Yodaiken \cite{Yodaiken02} points to a subtlety that had been
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  overlooked in the informal proof by Sha et al. They specify in
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  \cite{Sha90} that after the thread (whose priority has been raised)
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  completes its critical section and releases the lock, it ``returns
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  to its original priority level.'' This leads them to believe that an
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  implementation of PIP is ``rather straightforward''~\cite{Sha90}.
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  Unfortunately, as Yodaiken points out, this behaviour is too
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  simplistic.  Consider the case where the low priority thread $L$
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  locks \emph{two} resources, and two high-priority threads $H$ and
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  $H'$ each wait for one of them.  If $L$ then releases one resource
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  so that $H$, say, can proceed, then we still have Priority Inversion
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  with $H'$ (which waits for the other resource). The correct
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  behaviour for $L$ is to revert to the highest remaining priority of
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  the threads that it blocks. The advantage of formalising the
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  correctness of a high-level specification of PIP in a theorem prover
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  is that such issues clearly show up and cannot be overlooked as in
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  informal reasoning (since we have to analyse all possible behaviours
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  of threads, i.e.~\emph{traces}, that could possibly happen).
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  There have been earlier formal investigations into PIP, but ...\cite{Faria08}
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  vt (valid trace) was introduced earlier, cite
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  distributed PIP
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*}
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section {* Formal Model of the Priority Inheritance Protocol *}
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text {*
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  We follow the original work by Sha et al.~\cite{Sha90} by modelling
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  first a classical single CPU system where only one \emph{thread} is
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  active at any given moment. We shall discuss later how to lift this
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  restriction. Our model of PIP is based on Paulson's inductive
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  approach to protocol verification \cite{Paulson98}, where the
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  \emph{state} of a system is given by a list of events that
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  happened so far.  \emph{Events} fall into four categories defined as
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  the datatype
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{r@ {\hspace{2mm}}c@ {\hspace{2mm}}l@ {\hspace{7mm}}l}
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  \isacommand{datatype} event 
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  & @{text "="} & @{term "Create thread priority"}\\
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  & @{text "|"} & @{term "Exit thread"} \\
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  & @{text "|"} & @{term "Set thread priority"} & {\rm reset of the proprity for} @{text thread}\\
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  & @{text "|"} & @{term "P thread cs"} & {\rm request of resource} @{text "cs"} {\rm by} @{text "thread"}\\
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  & @{text "|"} & @{term "V thread cs"} & {\rm release of resource} @{text "cs"} {\rm by} @{text "thread"}
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  whereby threads, priorities and (critical) resources are represented 
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  as natural numbers. As in Paulson's work, we need to define 
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  functions that allow one to make some observations about states.
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  One is the ``live'' threads we have seen so far in a state:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) threads.simps(1)} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(1)}\\
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  @{thm (lhs) threads.simps(2)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(2)[where thread="th"]}\\
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  @{thm (lhs) threads.simps(3)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(3)[where thread="th"]}\\
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  @{term "threads (DUMMY#s)"} & @{text "\<equiv>"} & @{term "threads s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  Another is that given a thread @{text "th"}, what is the original priority was at 
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  its inception. 
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) original_priority.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(1)[where thread="th"]}\\
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  @{thm (lhs) original_priority.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) original_priority.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "original_priority th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "original_priority th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition we set @{text 0} as the default priority for
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  threads that have not (yet) been created. The last function we need 
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  calculates the ``time'', or index, at which time a process had its 
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  priority set.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) birthtime.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(1)[where thread="th"]}\\
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  @{thm (lhs) birthtime.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) birthtime.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "birthtime th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "birthtime th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \begin{center}
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  threads, original-priority, birth time, precedence.
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  \end{center}
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  resources
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  step relation:
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  \begin{center}
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  \begin{tabular}{c}
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  @{thm[mode=Rule] thread_create[where thread=th]}\hspace{1cm}
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  @{thm[mode=Rule] thread_exit[where thread=th]}\medskip\\
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  @{thm[mode=Rule] thread_P[where thread=th]}\medskip\\
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  @{thm[mode=Rule] thread_V[where thread=th]}\\
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  \end{tabular}
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  \end{center}
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  valid state:
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  \begin{center}
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  \begin{tabular}{c}
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  @{thm[mode=Axiom] vt_nil[where cs=step]}\hspace{1cm}
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  @{thm[mode=Rule] vt_cons[where cs=step]}
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  \end{tabular}
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  \end{center}
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274
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  To define events, the identifiers of {\em threads},
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  {\em priority} and {\em critical resources } (abbreviated as @{text "cs"}) 
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  need to be represented. All three are represetned using standard 
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  Isabelle/HOL type @{typ "nat"}:
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*}
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text {*
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  \bigskip
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  The priority inversion phenomenon was first published in
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  \cite{Lampson80}.  The two protocols widely used to eliminate
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  priority inversion, namely PI (Priority Inheritance) and PCE
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  (Priority Ceiling Emulation), were proposed in \cite{Sha90}. PCE is
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  less convenient to use because it requires static analysis of
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  programs. Therefore, PI is more commonly used in
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  practice\cite{locke-july02}. However, as pointed out in the
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  literature, the analysis of priority inheritance protocol is quite
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  subtle\cite{yodaiken-july02}.  A formal analysis will certainly be
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  helpful for us to understand and correctly implement PI. All
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  existing formal analysis of PI
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  \cite{conf/fase/JahierHR09,WellingsBSB07,Faria08} are based on the
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  model checking technology. Because of the state explosion problem,
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  model check is much like an exhaustive testing of finite models with
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  limited size.  The results obtained can not be safely generalized to
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  models with arbitrarily large size. Worse still, since model
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  checking is fully automatic, it give little insight on why the
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  formal model is correct. It is therefore definitely desirable to
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  analyze PI using theorem proving, which gives more general results
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  as well as deeper insight. And this is the purpose of this paper
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  which gives a formal analysis of PI in the interactive theorem
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  prover Isabelle using Higher Order Logic (HOL). The formalization
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  focuses on on two issues:
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  \begin{enumerate}
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  \item The correctness of the protocol model itself. A series of desirable properties is 
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    derived until we are fully convinced that the formal model of PI does 
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    eliminate priority inversion. And a better understanding of PI is so obtained 
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    in due course. For example, we find through formalization that the choice of 
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    next thread to take hold when a 
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    resource is released is irrelevant for the very basic property of PI to hold. 
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    A point never mentioned in literature. 
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  \item The correctness of the implementation. A series of properties is derived the meaning 
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    of which can be used as guidelines on how PI can be implemented efficiently and correctly. 
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  \end{enumerate} 
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  The rest of the paper is organized as follows: Section \ref{overview} gives an overview 
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  of PI. Section \ref{model} introduces the formal model of PI. Section \ref{general} 
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  discusses a series of basic properties of PI. Section \ref{extension} shows formally 
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  how priority inversion is controlled by PI. Section \ref{implement} gives properties 
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  which can be used for guidelines of implementation. Section \ref{related} discusses 
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  related works. Section \ref{conclusion} concludes the whole paper.
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  The basic priority inheritance protocol has two problems:
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  It does not prevent a deadlock from happening in a program with circular lock dependencies.
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  A chain of blocking may be formed; blocking duration can be substantial, though bounded.
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  Contributions
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  Despite the wide use of Priority Inheritance Protocol in real time operating
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  system, it's correctness has never been formally proved and mechanically checked. 
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  All existing verification are based on model checking technology. Full automatic
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  verification gives little help to understand why the protocol is correct. 
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  And results such obtained only apply to models of limited size. 
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  This paper presents a formal verification based on theorem proving. 
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  Machine checked formal proof does help to get deeper understanding. We found 
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  the fact which is not mentioned in the literature, that the choice of next 
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  thread to take over when an critical resource is release does not affect the correctness
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  of the protocol. The paper also shows how formal proof can help to construct 
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  correct and efficient implementation.\bigskip 
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262
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*}
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section {* An overview of priority inversion and priority inheritance \label{overview} *}
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text {*
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  Priority inversion refers to the phenomenon when a thread with high priority is blocked 
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  by a thread with low priority. Priority happens when the high priority thread requests 
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  for some critical resource already taken by the low priority thread. Since the high 
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  priority thread has to wait for the low priority thread to complete, it is said to be 
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  blocked by the low priority thread. Priority inversion might prevent high priority 
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  thread from fulfill its task in time if the duration of priority inversion is indefinite 
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  and unpredictable. Indefinite priority inversion happens when indefinite number 
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  of threads with medium priorities is activated during the period when the high 
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  priority thread is blocked by the low priority thread. Although these medium 
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  priority threads can not preempt the high priority thread directly, they are able 
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  to preempt the low priority threads and cause it to stay in critical section for 
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  an indefinite long duration. In this way, the high priority thread may be blocked indefinitely. 
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  Priority inheritance is one protocol proposed to avoid indefinite priority inversion. 
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  The basic idea is to let the high priority thread donate its priority to the low priority 
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  thread holding the critical resource, so that it will not be preempted by medium priority 
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  threads. The thread with highest priority will not be blocked unless it is requesting 
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  some critical resource already taken by other threads. Viewed from a different angle, 
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  any thread which is able to block the highest priority threads must already hold some 
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  critical resource. Further more, it must have hold some critical resource at the 
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  moment the highest priority is created, otherwise, it may never get change to run and 
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  get hold. Since the number of such resource holding lower priority threads is finite, 
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  if every one of them finishes with its own critical section in a definite duration, 
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  the duration the highest priority thread is blocked is definite as well. The key to 
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  guarantee lower priority threads to finish in definite is to donate them the highest 
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  priority. In such cases, the lower priority threads is said to have inherited the 
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   357
  highest priority. And this explains the name of the protocol: 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   358
  {\em Priority Inheritance} and how Priority Inheritance prevents indefinite delay.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   359
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   360
  The objectives of this paper are:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   361
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   362
  \item Build the above mentioned idea into formal model and prove a series of properties 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   363
    until we are convinced that the formal model does fulfill the original idea. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   364
  \item Show how formally derived properties can be used as guidelines for correct 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   365
    and efficient implementation.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   366
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   367
  The proof is totally formal in the sense that every detail is reduced to the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   368
  very first principles of Higher Order Logic. The nature of interactive theorem 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   369
  proving is for the human user to persuade computer program to accept its arguments. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   370
  A clear and simple understanding of the problem at hand is both a prerequisite and a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   371
  byproduct of such an effort, because everything has finally be reduced to the very 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   372
  first principle to be checked mechanically. The former intuitive explanation of 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   373
  Priority Inheritance is just such a byproduct. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   374
  *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   375
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   376
section {* Formal model of Priority Inheritance \label{model} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   377
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   378
  \input{../../generated/PrioGDef}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   379
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   380
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   381
section {* General properties of Priority Inheritance \label{general} *}
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   382
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   383
text {*
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   384
  The following are several very basic prioprites:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   385
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   386
  \item All runing threads must be ready (@{text "runing_ready"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   387
          @{thm[display] "runing_ready"}  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   388
  \item All ready threads must be living (@{text "readys_threads"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   389
          @{thm[display] "readys_threads"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   390
  \item There are finite many living threads at any moment (@{text "finite_threads"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   391
          @{thm[display] "finite_threads"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   392
  \item Every waiting queue does not contain duplcated elements (@{text "wq_distinct"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   393
          @{thm[display] "wq_distinct"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   394
  \item All threads in waiting queues are living threads (@{text "wq_threads"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   395
          @{thm[display] "wq_threads"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   396
  \item The event which can get a thread into waiting queue must be @{term "P"}-events
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   397
         (@{text "block_pre"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   398
          @{thm[display] "block_pre"}   
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   399
  \item A thread may never wait for two different critical resources
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   400
         (@{text "waiting_unique"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   401
          @{thm[display] waiting_unique[of _ _ "cs\<^isub>1" "cs\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   402
  \item Every resource can only be held by one thread
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   403
         (@{text "held_unique"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   404
          @{thm[display] held_unique[of _ "th\<^isub>1" _ "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   405
  \item Every living thread has an unique precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   406
         (@{text "preced_unique"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   407
          @{thm[display] preced_unique[of "th\<^isub>1" _ "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   408
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   409
*}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   410
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   411
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   412
  The following lemmas show how RAG is changed with the execution of events:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   413
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   414
  \item Execution of @{term "Set"} does not change RAG (@{text "depend_set_unchanged"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   415
    @{thm[display] depend_set_unchanged}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   416
  \item Execution of @{term "Create"} does not change RAG (@{text "depend_create_unchanged"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   417
    @{thm[display] depend_create_unchanged}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   418
  \item Execution of @{term "Exit"} does not change RAG (@{text "depend_exit_unchanged"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   419
    @{thm[display] depend_exit_unchanged}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   420
  \item Execution of @{term "P"} (@{text "step_depend_p"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   421
    @{thm[display] step_depend_p}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   422
  \item Execution of @{term "V"} (@{text "step_depend_v"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   423
    @{thm[display] step_depend_v}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   424
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   425
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   426
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   427
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   428
  These properties are used to derive the following important results about RAG:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   429
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   430
  \item RAG is loop free (@{text "acyclic_depend"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   431
  @{thm [display] acyclic_depend}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   432
  \item RAGs are finite (@{text "finite_depend"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   433
  @{thm [display] finite_depend}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   434
  \item Reverse paths in RAG are well founded (@{text "wf_dep_converse"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   435
  @{thm [display] wf_dep_converse}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   436
  \item The dependence relation represented by RAG has a tree structure (@{text "unique_depend"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   437
  @{thm [display] unique_depend[of _ _ "n\<^isub>1" "n\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   438
  \item All threads in RAG are living threads 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   439
    (@{text "dm_depend_threads"} and @{text "range_in"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   440
    @{thm [display] dm_depend_threads range_in}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   441
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   442
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   443
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   444
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   445
  The following lemmas show how every node in RAG can be chased to ready threads:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   446
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   447
  \item Every node in RAG can be chased to a ready thread (@{text "chain_building"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   448
    @{thm [display] chain_building[rule_format]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   449
  \item The ready thread chased to is unique (@{text "dchain_unique"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   450
    @{thm [display] dchain_unique[of _ _ "th\<^isub>1" "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   451
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   452
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   453
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   454
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   455
  Properties about @{term "next_th"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   456
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   457
  \item The thread taking over is different from the thread which is releasing
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   458
  (@{text "next_th_neq"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   459
  @{thm [display] next_th_neq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   460
  \item The thread taking over is unique
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   461
  (@{text "next_th_unique"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   462
  @{thm [display] next_th_unique[of _ _ _ "th\<^isub>1" "th\<^isub>2"]}  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   463
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   464
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   465
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   466
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   467
  Some deeper results about the system:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   468
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   469
  \item There can only be one running thread (@{text "runing_unique"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   470
  @{thm [display] runing_unique[of _ "th\<^isub>1" "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   471
  \item The maximum of @{term "cp"} and @{term "preced"} are equal (@{text "max_cp_eq"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   472
  @{thm [display] max_cp_eq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   473
  \item There must be one ready thread having the max @{term "cp"}-value 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   474
  (@{text "max_cp_readys_threads"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   475
  @{thm [display] max_cp_readys_threads}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   476
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   477
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   478
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   479
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   480
  The relationship between the count of @{text "P"} and @{text "V"} and the number of 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   481
  critical resources held by a thread is given as follows:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   482
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   483
  \item The @{term "V"}-operation decreases the number of critical resources 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   484
    one thread holds (@{text "cntCS_v_dec"})
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   485
     @{thm [display]  cntCS_v_dec}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   486
  \item The number of @{text "V"} never exceeds the number of @{text "P"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   487
    (@{text "cnp_cnv_cncs"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   488
    @{thm [display]  cnp_cnv_cncs}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   489
  \item The number of @{text "V"} equals the number of @{text "P"} when 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   490
    the relevant thread is not living:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   491
    (@{text "cnp_cnv_eq"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   492
    @{thm [display]  cnp_cnv_eq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   493
  \item When a thread is not living, it does not hold any critical resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   494
    (@{text "not_thread_holdents"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   495
    @{thm [display] not_thread_holdents}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   496
  \item When the number of @{text "P"} equals the number of @{text "V"}, the relevant 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   497
    thread does not hold any critical resource, therefore no thread can depend on it
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   498
    (@{text "count_eq_dependents"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   499
    @{thm [display] count_eq_dependents}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   500
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   501
  *}
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   502
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   503
section {* Key properties \label{extension} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   504
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   505
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   506
context extend_highest_gen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   507
begin
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   508
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   509
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   510
text {*
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   511
  The essential of {\em Priority Inheritance} is to avoid indefinite priority inversion. For this 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   512
  purpose, we need to investigate what happens after one thread takes the highest precedence. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   513
  A locale is used to describe such a situation, which assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   514
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   515
  \item @{term "s"} is a valid state (@{text "vt_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   516
    @{thm  vt_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   517
  \item @{term "th"} is a living thread in @{term "s"} (@{text "threads_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   518
    @{thm threads_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   519
  \item @{term "th"} has the highest precedence in @{term "s"} (@{text "highest"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   520
    @{thm highest}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   521
  \item The precedence of @{term "th"} is @{term "Prc prio tm"} (@{text "preced_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   522
    @{thm preced_th}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   523
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   524
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   525
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   526
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   527
  Under these assumptions, some basic priority can be derived for @{term "th"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   528
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   529
  \item The current precedence of @{term "th"} equals its own precedence (@{text "eq_cp_s_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   530
    @{thm [display] eq_cp_s_th}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   531
  \item The current precedence of @{term "th"} is the highest precedence in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   532
    the system (@{text "highest_cp_preced"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   533
    @{thm [display] highest_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   534
  \item The precedence of @{term "th"} is the highest precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   535
    in the system (@{text "highest_preced_thread"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   536
    @{thm [display] highest_preced_thread}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   537
  \item The current precedence of @{term "th"} is the highest current precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   538
    in the system (@{text "highest'"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   539
    @{thm [display] highest'}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   540
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   541
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   542
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   543
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   544
  To analysis what happens after state @{term "s"} a sub-locale is defined, which 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   545
  assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   546
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   547
  \item @{term "t"} is a valid extension of @{term "s"} (@{text "vt_t"}): @{thm vt_t}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   548
  \item Any thread created in @{term "t"} has priority no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   549
    its precedence can not be higher than @{term "th"},  therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   550
    @{term "th"} remain to be the one with the highest precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   551
    (@{text "create_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   552
    @{thm [display] create_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   553
  \item Any adjustment of priority in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   554
    @{term "t"} does not happen to @{term "th"} and 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   555
    the priority set is no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   556
    @{term "th"} remain to be the one with the highest precedence (@{text "set_diff_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   557
    @{thm [display] set_diff_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   558
  \item Since we are investigating what happens to @{term "th"}, it is assumed 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   559
    @{term "th"} does not exit during @{term "t"} (@{text "exit_diff"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   560
    @{thm [display] exit_diff}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   561
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   562
*}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   563
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   564
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   565
  All these assumptions are put into a predicate @{term "extend_highest_gen"}. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   566
  It can be proved that @{term "extend_highest_gen"} holds 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   567
  for any moment @{text "i"} in it @{term "t"} (@{text "red_moment"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   568
  @{thm [display] red_moment}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   569
  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   570
  From this, an induction principle can be derived for @{text "t"}, so that 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   571
  properties already derived for @{term "t"} can be applied to any prefix 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   572
  of @{text "t"} in the proof of new properties 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   573
  about @{term "t"} (@{text "ind"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   574
  \begin{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   575
  @{thm[display] ind}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   576
  \end{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   577
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   578
  The following properties can be proved about @{term "th"} in @{term "t"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   579
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   580
  \item In @{term "t"}, thread @{term "th"} is kept live and its 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   581
    precedence is preserved as well
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   582
    (@{text "th_kept"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   583
    @{thm [display] th_kept}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   584
  \item In @{term "t"}, thread @{term "th"}'s precedence is always the maximum among 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   585
    all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   586
    (@{text "max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   587
    @{thm [display] max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   588
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   589
    among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   590
    (@{text "th_cp_max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   591
    @{thm [display] th_cp_max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   592
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum current 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   593
    precedence among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   594
    (@{text "th_cp_max"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   595
    @{thm [display] th_cp_max}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   596
  \item In @{term "t"}, thread @{term "th"}'s current precedence equals its precedence at moment 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   597
    @{term "s"}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   598
    (@{text "th_cp_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   599
    @{thm [display] th_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   600
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   601
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   602
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   603
text {* \noindent
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   604
  The main theorem of this part is to characterizing the running thread during @{term "t"} 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   605
  (@{text "runing_inversion_2"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   606
  @{thm [display] runing_inversion_2}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   607
  According to this, if a thread is running, it is either @{term "th"} or was
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   608
  already live and held some resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   609
  at moment @{text "s"} (expressed by: @{text "cntV s th' < cntP s th'"}).
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   610
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   611
  Since there are only finite many threads live and holding some resource at any moment,
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   612
  if every such thread can release all its resources in finite duration, then after finite
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   613
  duration, none of them may block @{term "th"} anymore. So, no priority inversion may happen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   614
  then.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   615
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   616
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   617
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   618
end
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   619
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   620
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   621
section {* Properties to guide implementation \label{implement} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   622
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   623
text {*
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   624
  The properties (especially @{text "runing_inversion_2"}) convinced us that the model defined 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   625
  in Section \ref{model} does prevent indefinite priority inversion and therefore fulfills 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   626
  the fundamental requirement of Priority Inheritance protocol. Another purpose of this paper 
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   627
  is to show how this model can be used to guide a concrete implementation. As discussed in
276
a821434474c9 more on intro
urbanc
parents: 275
diff changeset
   628
  Section 5.6.5 of \cite{Vahalia96}, the implementation of Priority Inheritance in Solaris 
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   629
  uses sophisticated linking data structure. Except discussing two scenarios to show how
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   630
  the data structure should be manipulated, a lot of details of the implementation are missing. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   631
  In \cite{Faria08,conf/fase/JahierHR09,WellingsBSB07} the protocol is described formally 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   632
  using different notations, but little information is given on how this protocol can be 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   633
  implemented efficiently, especially there is no information on how these data structure 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   634
  should be manipulated. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   635
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   636
  Because the scheduling of threads is based on current precedence, 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   637
  the central issue in implementation of Priority Inheritance is how to compute the precedence
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   638
  correctly and efficiently. As long as the precedence is correct, it is very easy to 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   639
  modify the scheduling algorithm to select the correct thread to execute. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   640
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   641
  First, it can be proved that the computation of current precedence @{term "cp"} of a threads
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   642
  only involves its children (@{text "cp_rec"}):
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   643
  @{thm [display] cp_rec} 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   644
  where @{term "children s th"} represents the set of children of @{term "th"} in the current
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   645
  RAG: 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   646
  \[
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   647
  @{thm (lhs) children_def} @{text "\<equiv>"} @{thm (rhs) children_def}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   648
  \]
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   649
  where the definition of @{term "child"} is: 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   650
  \[ @{thm (lhs) child_def} @{text "\<equiv>"}  @{thm (rhs) child_def}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   651
  \]
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   652
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   653
  The aim of this section is to fill the missing details of how current precedence should
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   654
  be changed with the happening of events, with each event type treated by one subsection,
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   655
  where the computation of @{term "cp"} uses lemma @{text "cp_rec"}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   656
  *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   657
 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   658
subsection {* Event @{text "Set th prio"} *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   659
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   660
(*<*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   661
context step_set_cps
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   662
begin
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   663
(*>*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   664
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   665
text {*
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   666
  The context under which event @{text "Set th prio"} happens is formalized as follows:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   667
  \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   668
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   669
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   670
      event @{text "Set th prio"} is eligible to happen under state @{term "s'"} and
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   671
      state @{term "s'"} is a valid state.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   672
  \end{enumerate}
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   673
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   674
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   675
text {* \noindent
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   676
  Under such a context, we investigated how the current precedence @{term "cp"} of 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   677
  threads change from state @{term "s'"} to @{term "s"} and obtained the following
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   678
  conclusions:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   679
  \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   680
  %% \item The RAG does not change (@{text "eq_dep"}): @{thm "eq_dep"}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   681
  \item All threads with no dependence relation with thread @{term "th"} have their
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   682
    @{term "cp"}-value unchanged (@{text "eq_cp"}):
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   683
    @{thm [display] eq_cp}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   684
    This lemma implies the @{term "cp"}-value of @{term "th"}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   685
    and those threads which have a dependence relation with @{term "th"} might need
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   686
    to be recomputed. The way to do this is to start from @{term "th"} 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   687
    and follow the @{term "depend"}-chain to recompute the @{term "cp"}-value of every 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   688
    encountered thread using lemma @{text "cp_rec"}. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   689
    Since the @{term "depend"}-relation is loop free, this procedure 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   690
    can always stop. The the following lemma shows this procedure actually could stop earlier.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   691
  \item The following two lemma shows, if a thread the re-computation of which
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   692
    gives an unchanged @{term "cp"}-value, the procedure described above can stop. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   693
    \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   694
      \item Lemma @{text "eq_up_self"} shows if the re-computation of
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   695
        @{term "th"}'s @{term "cp"} gives the same result, the procedure can stop:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   696
        @{thm [display] eq_up_self}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   697
      \item Lemma @{text "eq_up"}) shows if the re-computation at intermediate threads
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   698
        gives unchanged result, the procedure can stop:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   699
        @{thm [display] eq_up}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   700
  \end{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   701
  \end{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   702
  *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   703
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   704
(*<*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   705
end
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   706
(*>*)
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   707
272
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   708
subsection {* Event @{text "V th cs"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   709
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   710
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   711
context step_v_cps_nt
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   712
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   713
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   714
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   715
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   716
  The context under which event @{text "V th cs"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   717
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   718
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   719
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   720
      event @{text "V th cs"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   721
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   722
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   723
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   724
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   725
text {* \noindent
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   726
  Under such a context, we investigated how the current precedence @{term "cp"} of 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   727
  threads change from state @{term "s'"} to @{term "s"}. 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   728
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   729
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   730
  Two subcases are considerted, 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   731
  where the first is that there exits @{term "th'"} 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   732
  such that 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   733
  @{thm [display] nt} 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   734
  holds, which means there exists a thread @{term "th'"} to take over
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   735
  the resource release by thread @{term "th"}. 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   736
  In this sub-case, the following results are obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   737
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   738
  \item The change of RAG is given by lemma @{text "depend_s"}: 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   739
  @{thm [display] "depend_s"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   740
  which shows two edges are removed while one is added. These changes imply how
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   741
  the current precedences should be re-computed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   742
  \item First all threads different from @{term "th"} and @{term "th'"} have their
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   743
  @{term "cp"}-value kept, therefore do not need a re-computation
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   744
  (@{text "cp_kept"}): @{thm [display] cp_kept}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   745
  This lemma also implies, only the @{term "cp"}-values of @{term "th"} and @{term "th'"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   746
  need to be recomputed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   747
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   748
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   749
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   750
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   751
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   752
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   753
context step_v_cps_nnt
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   754
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   755
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   756
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   757
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   758
  The other sub-case is when for all @{text "th'"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   759
  @{thm [display] nnt}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   760
  holds, no such thread exists. The following results can be obtained for this 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   761
  sub-case:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   762
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   763
  \item The change of RAG is given by lemma @{text "depend_s"}:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   764
  @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   765
  which means only one edge is removed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   766
  \item In this case, no re-computation is needed (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   767
  @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   768
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   769
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   770
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   771
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   772
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   773
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   774
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   775
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   776
subsection {* Event @{text "P th cs"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   777
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   778
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   779
context step_P_cps_e
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   780
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   781
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   782
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   783
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   784
  The context under which event @{text "P th cs"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   785
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   786
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   787
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   788
      event @{text "P th cs"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   789
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   790
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   791
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   792
  This case is further divided into two sub-cases. The first is when @{thm ee} holds.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   793
  The following results can be obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   794
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   795
  \item One edge is added to the RAG (@{text "depend_s"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   796
    @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   797
  \item No re-computation is needed (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   798
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   799
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   800
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   801
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   802
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   803
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   804
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   805
context step_P_cps_ne
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   806
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   807
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   808
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   809
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   810
  The second is when @{thm ne} holds.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   811
  The following results can be obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   812
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   813
  \item One edge is added to the RAG (@{text "depend_s"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   814
    @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   815
  \item Threads with no dependence relation with @{term "th"} do not need a re-computation
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   816
    of their @{term "cp"}-values (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   817
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   818
    This lemma implies all threads with a dependence relation with @{term "th"} may need 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   819
    re-computation.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   820
  \item Similar to the case of @{term "Set"}, the computation procedure could stop earlier
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   821
    (@{text "eq_up"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   822
    @{thm [display] eq_up}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   823
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   824
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   825
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   826
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   827
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   828
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   829
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   830
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   831
subsection {* Event @{text "Create th prio"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   832
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   833
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   834
context step_create_cps
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   835
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   836
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   837
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   838
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   839
  The context under which event @{text "Create th prio"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   840
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   841
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   842
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   843
      event @{text "Create th prio"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   844
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   845
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   846
  The following results can be obtained under this context:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   847
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   848
  \item The RAG does not change (@{text "eq_dep"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   849
    @{thm [display] eq_dep}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   850
  \item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   851
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   852
  \item The @{term "cp"}-value of @{term "th"} equals its precedence 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   853
    (@{text "eq_cp_th"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   854
    @{thm [display] eq_cp_th}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   855
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   856
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   857
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   858
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   859
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   860
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   861
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   862
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   863
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   864
subsection {* Event @{text "Exit th"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   865
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   866
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   867
context step_exit_cps
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   868
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   869
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   870
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   871
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   872
  The context under which event @{text "Exit th"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   873
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   874
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   875
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   876
      event @{text "Exit th"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   877
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   878
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   879
  The following results can be obtained under this context:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   880
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   881
  \item The RAG does not change (@{text "eq_dep"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   882
    @{thm [display] eq_dep}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   883
  \item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   884
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   885
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   886
  Since @{term th} does not live in state @{term "s"}, there is no need to compute 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   887
  its @{term cp}-value.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   888
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   889
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   890
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   891
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   892
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   893
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   894
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   895
section {* Related works \label{related} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   896
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   897
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   898
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   899
  \item {\em Integrating Priority Inheritance Algorithms in the Real-Time Specification for Java}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   900
    \cite{WellingsBSB07} models and verifies the combination of Priority Inheritance (PI) and 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   901
    Priority Ceiling Emulation (PCE) protocols in the setting of Java virtual machine 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   902
    using extended Timed Automata(TA) formalism of the UPPAAL tool. Although a detailed 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   903
    formal model of combined PI and PCE is given, the number of properties is quite 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   904
    small and the focus is put on the harmonious working of PI and PCE. Most key features of PI 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   905
    (as well as PCE) are not shown. Because of the limitation of the model checking technique
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   906
    used there, properties are shown only for a small number of scenarios. Therefore, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   907
    the verification does not show the correctness of the formal model itself in a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   908
    convincing way.  
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   909
  \item {\em Formal Development of Solutions for Real-Time Operating Systems with TLA+/TLC}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   910
    \cite{Faria08}. A formal model of PI is given in TLA+. Only 3 properties are shown 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   911
    for PI using model checking. The limitation of model checking is intrinsic to the work.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   912
  \item {\em Synchronous modeling and validation of priority inheritance schedulers}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   913
    \cite{conf/fase/JahierHR09}. Gives a formal model
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   914
    of PI and PCE in AADL (Architecture Analysis \& Design Language) and checked 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   915
    several properties using model checking. The number of properties shown there is 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   916
    less than here and the scale is also limited by the model checking technique. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   917
  \item {\em The Priority Ceiling Protocol: Formalization and Analysis Using PVS}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   918
    \cite{dutertre99b}. Formalized another protocol for Priority Inversion in the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   919
    interactive theorem proving system PVS.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   920
\end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   921
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   922
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   923
  There are several works on inversion avoidance:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   924
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   925
  \item {\em Solving the group priority inversion problem in a timed asynchronous system}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   926
    \cite{Wang:2002:SGP}. The notion of Group Priority Inversion is introduced. The main 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   927
    strategy is still inversion avoidance. The method is by reordering requests 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   928
    in the setting of Client-Server.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   929
  \item {\em A Formalization of Priority Inversion} \cite{journals/rts/BabaogluMS93}. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   930
    Formalized the notion of Priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   931
    Inversion and proposes methods to avoid it. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   932
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   933
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   934
  {\em Examples of inaccurate specification of the protocol ???}.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   935
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   936
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   937
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   938
section {* Conclusions \label{conclusion} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   939
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   940
(*<*)
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   941
end
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   942
(*>*)