prio/Paper/Paper.thy
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(*<*)
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theory Paper
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imports CpsG ExtGG "~~/src/HOL/Library/LaTeXsugar"
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begin
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ML {*
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  open Printer;
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  show_question_marks_default := false;
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  *}
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notation (latex output)
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  Cons ("_::_" [78,77] 73) and
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  vt ("valid'_state") and
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  runing ("running") and
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  birthtime ("last'_set") and
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  If  ("(\<^raw:\textrm{>if\<^raw:}> (_)/ \<^raw:\textrm{>then\<^raw:}> (_)/ \<^raw:\textrm{>else\<^raw:}> (_))" 10) and
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  Prc ("'(_, _')") and
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  holding ("holds") and
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  waiting ("waits") and
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  Th ("T") and
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  Cs ("C") and
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  readys ("ready") and
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  depend ("RAG") and 
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  preced ("prec") and
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  cpreced ("cprec") and
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  dependents ("dependants") and
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  waiting_queue ("wq_fun") and
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  cur_preced ("cprec_fun") and
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  DUMMY  ("\<^raw:\mbox{$\_\!\_$}>")
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(*>*)
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section {* Introduction *}
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text {*
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  Many real-time systems need to support threads involving priorities and
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  locking of resources. Locking of resources ensures mutual exclusion
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  when accessing shared data or devices that cannot be
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  preempted. Priorities allow scheduling of threads that need to
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  finish their work within deadlines.  Unfortunately, both features
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  can interact in subtle ways leading to a problem, called
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  \emph{Priority Inversion}. Suppose three threads having priorities
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  $H$(igh), $M$(edium) and $L$(ow). We would expect that the thread
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  $H$ blocks any other thread with lower priority and itself cannot
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  be blocked by any thread with lower priority. Alas, in a naive
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  implementation of resource looking and priorities this property can
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  be violated. Even worse, $H$ can be delayed indefinitely by
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  threads with lower priorities. For this let $L$ be in the
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  possession of a lock for a resource that also $H$ needs. $H$ must
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  therefore wait for $L$ to exit the critical section and release this
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  lock. The problem is that $L$ might in turn be blocked by any
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  thread with priority $M$, and so $H$ sits there potentially waiting
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  indefinitely. Since $H$ is blocked by threads with lower
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  priorities, the problem is called Priority Inversion. It was first
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  described in \cite{Lampson80} in the context of the
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  Mesa programming language designed for concurrent programming.
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  If the problem of Priority Inversion is ignored, real-time systems
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  can become unpredictable and resulting bugs can be hard to diagnose.
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  The classic example where this happened is the software that
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  controlled the Mars Pathfinder mission in 1997 \cite{Reeves98}.
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  Once the spacecraft landed, the software shut down at irregular
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  intervals leading to loss of project time as normal operation of the
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  craft could only resume the next day (the mission and data already
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  collected were fortunately not lost, because of a clever system
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  design).  The reason for the shutdowns was that the scheduling
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  software fell victim of Priority Inversion: a low priority thread
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  locking a resource prevented a high priority thread from running in
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  time leading to a system reset. Once the problem was found, it was
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  rectified by enabling the \emph{Priority Inheritance Protocol} (PIP)
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  \cite{Sha90}\footnote{Sha et al.~call it the \emph{Basic Priority
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  Inheritance Protocol} \cite{Sha90} and others sometimes also call it
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  \emph{Priority Boosting}.} in the scheduling software.
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  The idea behind PIP is to let the thread $L$ temporarily inherit
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  the high priority from $H$ until $L$ leaves the critical section
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  unlocking the resource. This solves the problem of $H$ having to
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  wait indefinitely, because $L$ cannot be blocked by threads having
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  priority $M$. While a few other solutions exist for the Priority
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  Inversion problem, PIP is one that is widely deployed and
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  implemented. This includes VxWorks (a proprietary real-time OS used
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  in the Mars Pathfinder mission, in Boeing's 787 Dreamliner, Honda's
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  ASIMO robot, etc.), but also the POSIX 1003.1c Standard realised for
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  example in libraries for FreeBSD, Solaris and Linux.
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  One advantage of PIP is that increasing the priority of a thread
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  can be dynamically calculated by the scheduler. This is in contrast
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  to, for example, \emph{Priority Ceiling} \cite{Sha90}, another
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  solution to the Priority Inversion problem, which requires static
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  analysis of the program in order to prevent Priority
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  Inversion. However, there has also been strong criticism against
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  PIP. For instance, PIP cannot prevent deadlocks when lock
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  dependencies are circular, and also blocking times can be
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  substantial (more than just the duration of a critical section).
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  Though, most criticism against PIP centres around unreliable
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  implementations and PIP being too complicated and too inefficient.
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  For example, Yodaiken writes in \cite{Yodaiken02}:
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  \begin{quote}
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  \it{}``Priority inheritance is neither efficient nor reliable. Implementations
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  are either incomplete (and unreliable) or surprisingly complex and intrusive.''
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  \end{quote}
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  \noindent
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  He suggests to avoid PIP altogether by not allowing critical
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  sections to be preempted. Unfortunately, this solution does not
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  help in real-time systems with low latency \emph{requirements}.
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  In our opinion, there is clearly a need for investigating correct
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  algorithms for PIP. A few specifications for PIP exist (in English)
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  and also a few high-level descriptions of implementations (e.g.~in
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  the textbook \cite[Section 5.6.5]{Vahalia96}), but they help little
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  with actual implementations. That this is a problem in practise is
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  proved by an email from Baker, who wrote on 13 July 2009 on the Linux
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  Kernel mailing list:
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  \begin{quote}
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  \it{}``I observed in the kernel code (to my disgust), the Linux PIP
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  implementation is a nightmare: extremely heavy weight, involving
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  maintenance of a full wait-for graph, and requiring updates for a
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  range of events, including priority changes and interruptions of
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  wait operations.''
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  \end{quote}
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  \noindent
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  The criticism by Yodaiken, Baker and others suggests to us to look
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  again at PIP from a more abstract level (but still concrete enough
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  to inform an implementation), and makes PIP an ideal candidate for a
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  formal verification. One reason, of course, is that the original
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  presentation of PIP~\cite{Sha90}, despite being informally
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  ``proved'' correct, is actually \emph{flawed}. 
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  Yodaiken \cite{Yodaiken02} points to a subtlety that had been
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  overlooked in the informal proof by Sha et al. They specify in
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  \cite{Sha90} that after the thread (whose priority has been raised)
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  completes its critical section and releases the lock, it ``returns
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  to its original priority level.'' This leads them to believe that an
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  implementation of PIP is ``rather straightforward''~\cite{Sha90}.
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  Unfortunately, as Yodaiken points out, this behaviour is too
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  simplistic.  Consider the case where the low priority thread $L$
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  locks \emph{two} resources, and two high-priority threads $H$ and
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  $H'$ each wait for one of them.  If $L$ then releases one resource
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  so that $H$, say, can proceed, then we still have Priority Inversion
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  with $H'$ (which waits for the other resource). The correct
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  behaviour for $L$ is to revert to the highest remaining priority of
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  the threads that it blocks. The advantage of formalising the
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  correctness of a high-level specification of PIP in a theorem prover
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  is that such issues clearly show up and cannot be overlooked as in
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  informal reasoning (since we have to analyse all possible behaviours
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  of threads, i.e.~\emph{traces}, that could possibly happen).
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  There have been earlier formal investigations into PIP, but ...\cite{Faria08}
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  vt (valid trace) was introduced earlier, cite
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  distributed PIP
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  Paulson's method has not been used outside security field, except
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  work by Zhang et al.
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  no clue about multi-processor case according to \cite{Steinberg10} 
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*}
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section {* Formal Model of the Priority Inheritance Protocol *}
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text {*
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  The Priority Inheritance Protocol, short PIP, is a scheduling
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  algorithm for a single-processor system.\footnote{We shall come back
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  later to the case of PIP on multi-processor systems.} Our model of
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  PIP is based on Paulson's inductive approach to protocol
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  verification \cite{Paulson98}, where the \emph{state} of a system is
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  given by a list of events that happened so far.  \emph{Events} in PIP fall
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  into five categories defined as the datatype:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{r@ {\hspace{2mm}}c@ {\hspace{2mm}}l@ {\hspace{7mm}}l}
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  \isacommand{datatype} event 
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  & @{text "="} & @{term "Create thread priority"}\\
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  & @{text "|"} & @{term "Exit thread"} \\
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  & @{text "|"} & @{term "Set thread priority"} & {\rm reset of the priority for} @{text thread}\\
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  & @{text "|"} & @{term "P thread cs"} & {\rm request of resource} @{text "cs"} {\rm by} @{text "thread"}\\
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  & @{text "|"} & @{term "V thread cs"} & {\rm release of resource} @{text "cs"} {\rm by} @{text "thread"}
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  whereby threads, priorities and (critical) resources are represented
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  as natural numbers. The event @{term Set} models the situation that
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  a thread obtains a new priority given by the programmer or
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  user (for example via the {\tt nice} utility under UNIX).  As in Paulson's work, we
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  need to define functions that allow one to make some observations
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  about states.  One, called @{term threads}, calculates the set of
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  ``live'' threads that we have seen so far in a state:
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) threads.simps(1)} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(1)}\\
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  @{thm (lhs) threads.simps(2)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(2)[where thread="th"]}\\
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  @{thm (lhs) threads.simps(3)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) threads.simps(3)[where thread="th"]}\\
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  @{term "threads (DUMMY#s)"} & @{text "\<equiv>"} & @{term "threads s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  Another function calculates the priority for a thread @{text "th"}, which is 
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  defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) original_priority.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(1)[where thread="th"]}\\
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  @{thm (lhs) original_priority.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) original_priority.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) original_priority.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "original_priority th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "original_priority th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition we set @{text 0} as the default priority for
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  threads that have not (yet) been created. The last function we need 
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  calculates the ``time'', or index, at which time a process had its 
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  priority last set.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \mbox{\begin{tabular}{lcl}
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  @{thm (lhs) birthtime.simps(1)[where thread="th"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(1)[where thread="th"]}\\
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  @{thm (lhs) birthtime.simps(2)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(2)[where thread="th" and thread'="th'"]}\\
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  @{thm (lhs) birthtime.simps(3)[where thread="th" and thread'="th'"]} & @{text "\<equiv>"} & 
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    @{thm (rhs) birthtime.simps(3)[where thread="th" and thread'="th'"]}\\
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  @{term "birthtime th (DUMMY#s)"} & @{text "\<equiv>"} & @{term "birthtime th s"}\\
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  \end{tabular}}
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  \end{isabelle}
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  \noindent
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  In this definition @{term "length s"} stands for the length of the list
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  of events @{text s}. Again the default value in this function is @{text 0}
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  for threads that have not been created yet. A \emph{precedence} of a thread @{text th} in a 
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  state @{text s} is the pair of natural numbers defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm preced_def[where thread="th"]}
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  \end{isabelle}
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  \noindent
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  The point of precedences is to schedule threads not according to priorities (because what should
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  we do in case two threads have the same priority), but according to precedences. 
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  Precedences allow us to always discriminate between two threads with equal priority by 
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  tacking into account the time when the priority was last set. We order precedences so 
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  that threads with the same priority get a higher precedence if their priority has been 
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  set earlier, since for such threads it is more urgent to finish their work. In an impementation
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  this choice would translate to a quite natural a FIFO-scheduling of processes with 
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  the same priority.
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  Next, we introduce the concept of \emph{waiting queues}. They are
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  lists of threads associated with every resource. The first thread in
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  this list (the head, or short @{term hd}) is chosen to be the one 
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  that is in possession of the
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  ``lock'' of the corresponding resource. We model waiting queues as
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  functions, below abbreviated as @{text wq}, taking a resource as
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  argument and returning a list of threads.  This allows us to define
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  when a thread \emph{holds}, respectively \emph{waits} for, a
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  resource @{text cs} given a waiting queue function.
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  \begin{isabelle}\ \ \ \ \ %%%
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  \begin{tabular}{@ {}l}
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  @{thm cs_holding_def[where thread="th"]}\\
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  @{thm cs_waiting_def[where thread="th"]}
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  \end{tabular}
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  \end{isabelle}
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  \noindent
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  In this definition we assume @{text "set"} converts a list into a set.
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  At the beginning, that is in the state where no process is created yet, 
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  the waiting queue function will be just the function that returns the
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  empty list.
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{abbrev all_unlocked}
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  \end{isabelle}
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  \noindent
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  Using @{term "holding"} and @{term waiting}, we can introduce \emph{Resource Allocation Graphs} 
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  (RAG), which represent the dependencies between threads and resources.
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  We represent RAGs as relations using pairs of the form
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{term "(Th th, Cs cs)"} \hspace{5mm}{\rm and}\hspace{5mm}
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  @{term "(Cs cs, Th th)"}
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  \end{isabelle}
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  \noindent
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  where the first stands for a \emph{waiting edge} and the second for a 
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  \emph{holding edge} (@{term Cs} and @{term Th} are constructors of a 
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  datatype for vertices). Given a waiting queue function, a RAG is defined 
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  as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cs_depend_def}
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  \end{isabelle}
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  \noindent
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  An instance of a RAG is as follows:
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  \begin{center}
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  \begin{tikzpicture}[scale=1]
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  \draw[step=2mm] (0,0) grid (3,2);
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  \draw[rounded corners=1mm, very thick] (0,0) rectangle (0.6,0.6);
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  \draw[rounded corners=1mm, very thick] (3,0) rectangle (3.6,0.6);
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  \draw (0.3,0.3) node {\small$th_0$};
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  \draw (3.3,0.3) node {\small$th_1$};
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  \end{tikzpicture}
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  \end{center}
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  \noindent
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  The use or relations for representing RAGs allows us to conveninetly define
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  the notion of the \emph{dependants} of a thread. This is defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cs_dependents_def}
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  \end{isabelle}
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  \noindent
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  This definition needs to account for all threads that wait for tread to
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  release a resource. This means we need to include threads that transitively
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  wait for a resource being realeased (in the picture this means also @{text "th\<^isub>3"}, 
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  which cannot make any progress unless @{text "th\<^isub>2"} makes progress which
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  in turn waits for @{text "th\<^isub>1"}). If there is a cirle in a RAG, then clearly
291
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  we have a deadlock. Therefore when a thread requests a resource,
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  we must ensure that the resulting RAG is not not circular. 
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  Next we introduce the notion of \emph{current precedence} for a thread @{text th} in a 
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  state @{text s}, which is defined as
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  \begin{isabelle}\ \ \ \ \ %%%
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  @{thm cpreced_def2}
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   343
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   344
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   345
  \noindent
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   346
  While the precedence of a thread is determined by the programmer (for example when the thread is
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
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diff changeset
   347
  created), the point of the current precedence is to let scheduler increase this
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   348
  priority, if needed according to PIP. Therefore the current precedence of @{text th} is
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   349
  given as the maximum of the precedence @{text th} has in state @{text s} \emph{and} all 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   350
  processes that are dependants of @{text th}. Since the notion @{term "dependents"} is
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   351
  defined as the transitive closure of all dependent threads, we deal correctly with the 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   352
  problem in the algorithm by Sha et al.~\cite{Sha90} where a priority of a thread is
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   353
  lowered prematurely.
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   354
  
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   355
  The next function, called @{term schs}, defines the behaviour of the scheduler. It is defined
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   356
  by recursion on the state (a list of events); @{term "schs"} takes a state as argument
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   357
  and returns a \emph{schedule state}, which we defined as a record consisting of ...
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   358
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
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diff changeset
   359
  In the initial state, the scheduler starts with all resources unlocked and the
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
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diff changeset
   360
  precedence of every thread is initialised with @{term "Prc 0 0"}. 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   361
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   362
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   363
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   364
  @{thm (lhs) schs.simps(1)} @{text "\<equiv>"}\\ 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   365
  \hspace{5mm}@{term "(|waiting_queue = all_unlocked, cur_preced = (\<lambda>_::thread. Prc 0 0)|)"}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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parents: 290
diff changeset
   366
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
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diff changeset
   367
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   368
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
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diff changeset
   369
  \noindent
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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parents: 290
diff changeset
   370
  The cases for @{term Create}, @{term Exit} and @{term Set} are straightforward:
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   371
  we calculuate the waiting queue function of the (previous) state @{text s}; 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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parents: 290
diff changeset
   372
  this waiting queue function @{text wq} is unchanged in the next schedule state; for calculuating 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   373
  the next @{term "cprec_fun"} we use @{text wq} and the function @{term cpreced}. 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   374
  This gives the following clauses:
290
6a6d0bd16035 more on paper
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diff changeset
   375
6a6d0bd16035 more on paper
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diff changeset
   376
  \begin{isabelle}\ \ \ \ \ %%%
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   377
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   378
  @{thm (lhs) schs.simps(2)} @{text "\<equiv>"}\\ 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   379
  \hspace{5mm}@{text "let"} @{text "wq = waiting_queue (schs s)"} @{text "in"}\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
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diff changeset
   380
  \hspace{8mm}@{term "(|waiting_queue = wq\<iota>, cur_preced = cpreced wq\<iota> (Create th prio # s)|)"}\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   381
  @{thm (lhs) schs.simps(3)} @{text "\<equiv>"}\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   382
  \hspace{5mm}@{text "let"} @{text "wq = waiting_queue (schs s)"} @{text "in"}\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   383
  \hspace{8mm}@{term "(|waiting_queue = wq\<iota>, cur_preced = cpreced wq\<iota> (Exit th # s)|)"}\smallskip\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   384
  @{thm (lhs) schs.simps(4)} @{text "\<equiv>"}\\ 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   385
  \hspace{5mm}@{text "let"} @{text "wq = waiting_queue (schs s)"} @{text "in"}\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   386
  \hspace{8mm}@{term "(|waiting_queue = wq\<iota>, cur_preced = cpreced wq\<iota> (Set th prio # s)|)"}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   387
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   388
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   389
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   390
  \noindent 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   391
  More interesting are the cases when a resource, say @{text cs}, is locked or relaesed. In this case
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   392
  we need to calculate a new waiting queue function. In case of @{term P} we update
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   393
  the function so that the new thread list for @{text cs} is old thread list with the waiting 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   394
  thread appended to the end (remember the head of this list is in the possession of the
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   395
  resource).
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   396
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   397
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   398
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   399
  @{thm (lhs) schs.simps(5)} @{text "\<equiv>"}\\ 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   400
  \hspace{5mm}@{text "let"} @{text "wq = waiting_queue (schs s)"} @{text "in"}\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   401
  \hspace{5mm}@{text "let"} @{text "new_wq = wq(cs := (wq cs @ [th]))"} @{text "in"}\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   402
  \hspace{8mm}@{term "(|waiting_queue = new_wq, cur_preced = cpreced new_wq (P th cs # s)|)"}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   403
  \end{tabular}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   404
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   405
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   406
  \noindent
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   407
  The case for @{term V} is similarly, except that we update the waiting queue function
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   408
  using the auxiliary definition
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   409
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   410
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   411
  @{abbrev release}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   412
  \end{isabelle}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   413
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   414
  \noindent
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   415
  This gives for @{term schs} the clause:
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   416
 
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   417
  \begin{isabelle}\ \ \ \ \ %%%
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   418
  \begin{tabular}{@ {}l}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   419
  @{thm (lhs) schs.simps(6)} @{text "\<equiv>"}\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   420
  \hspace{5mm}@{text "let"} @{text "wq = waiting_queue (schs s)"} @{text "in"}\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   421
  \hspace{5mm}@{text "let"} @{text "new_wq = release (wq cs)"} @{text "in"}\\
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   422
  \hspace{8mm}@{term "(|waiting_queue = new_wq, cur_preced = cpreced new_wq (V th cs # s)|)"}
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   423
  \end{tabular}
290
6a6d0bd16035 more on paper
urbanc
parents: 287
diff changeset
   424
  \end{isabelle}
6a6d0bd16035 more on paper
urbanc
parents: 287
diff changeset
   425
6a6d0bd16035 more on paper
urbanc
parents: 287
diff changeset
   426
291
5ef9f6ebe827 more on paper; modified schs functions; it is still compatible with the old definition
urbanc
parents: 290
diff changeset
   427
  TODO
286
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   428
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   429
  \begin{isabelle}\ \ \ \ \ %%%
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   430
  \begin{tabular}{@ {}l}
287
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   431
  @{thm s_depend_def}\\
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   432
  \end{tabular}
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   433
  \end{isabelle}
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   434
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   435
  \begin{isabelle}\ \ \ \ \ %%%
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   436
  \begin{tabular}{@ {}l}
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   437
  @{thm readys_def}\\
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   438
  \end{tabular}
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   439
  \end{isabelle}
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   440
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   441
  \begin{isabelle}\ \ \ \ \ %%%
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   442
  \begin{tabular}{@ {}l}
440382eb6427 more on the specification section
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parents: 286
diff changeset
   443
  @{thm runing_def}\\
286
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   444
  \end{tabular}
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
   445
  \end{isabelle}
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   446
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   447
287
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   448
  resources
284
d296cb127fcb more on paper
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parents: 283
diff changeset
   449
287
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   450
  done: threads     not done: running
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   451
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   452
  step relation:
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   453
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   454
  \begin{center}
d296cb127fcb more on paper
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parents: 283
diff changeset
   455
  \begin{tabular}{c}
d296cb127fcb more on paper
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diff changeset
   456
  @{thm[mode=Rule] thread_create[where thread=th]}\hspace{1cm}
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   457
  @{thm[mode=Rule] thread_exit[where thread=th]}\medskip\\
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   458
287
440382eb6427 more on the specification section
urbanc
parents: 286
diff changeset
   459
  @{thm[mode=Rule] thread_set[where thread=th]}\medskip\\
284
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   460
  @{thm[mode=Rule] thread_P[where thread=th]}\medskip\\
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   461
  @{thm[mode=Rule] thread_V[where thread=th]}\\
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   462
  \end{tabular}
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   463
  \end{center}
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   464
d296cb127fcb more on paper
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parents: 283
diff changeset
   465
  valid state:
d296cb127fcb more on paper
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parents: 283
diff changeset
   466
d296cb127fcb more on paper
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parents: 283
diff changeset
   467
  \begin{center}
d296cb127fcb more on paper
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parents: 283
diff changeset
   468
  \begin{tabular}{c}
d296cb127fcb more on paper
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parents: 283
diff changeset
   469
  @{thm[mode=Axiom] vt_nil[where cs=step]}\hspace{1cm}
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   470
  @{thm[mode=Rule] vt_cons[where cs=step]}
d296cb127fcb more on paper
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parents: 283
diff changeset
   471
  \end{tabular}
d296cb127fcb more on paper
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parents: 283
diff changeset
   472
  \end{center}
d296cb127fcb more on paper
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parents: 283
diff changeset
   473
274
83b0317370c2 more on intro
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parents: 273
diff changeset
   474
280
c91c2dd08599 updated
urbanc
parents: 279
diff changeset
   475
  To define events, the identifiers of {\em threads},
c91c2dd08599 updated
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parents: 279
diff changeset
   476
  {\em priority} and {\em critical resources } (abbreviated as @{text "cs"}) 
c91c2dd08599 updated
urbanc
parents: 279
diff changeset
   477
  need to be represented. All three are represetned using standard 
c91c2dd08599 updated
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parents: 279
diff changeset
   478
  Isabelle/HOL type @{typ "nat"}:
c91c2dd08599 updated
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parents: 279
diff changeset
   479
*}
273
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   480
280
c91c2dd08599 updated
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parents: 279
diff changeset
   481
text {*
c91c2dd08599 updated
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parents: 279
diff changeset
   482
  \bigskip
284
d296cb127fcb more on paper
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parents: 283
diff changeset
   483
  The priority inversion phenomenon was first published in
d296cb127fcb more on paper
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parents: 283
diff changeset
   484
  \cite{Lampson80}.  The two protocols widely used to eliminate
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   485
  priority inversion, namely PI (Priority Inheritance) and PCE
d296cb127fcb more on paper
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parents: 283
diff changeset
   486
  (Priority Ceiling Emulation), were proposed in \cite{Sha90}. PCE is
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   487
  less convenient to use because it requires static analysis of
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   488
  programs. Therefore, PI is more commonly used in
d296cb127fcb more on paper
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parents: 283
diff changeset
   489
  practice\cite{locke-july02}. However, as pointed out in the
d296cb127fcb more on paper
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parents: 283
diff changeset
   490
  literature, the analysis of priority inheritance protocol is quite
d296cb127fcb more on paper
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parents: 283
diff changeset
   491
  subtle\cite{yodaiken-july02}.  A formal analysis will certainly be
d296cb127fcb more on paper
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parents: 283
diff changeset
   492
  helpful for us to understand and correctly implement PI. All
d296cb127fcb more on paper
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parents: 283
diff changeset
   493
  existing formal analysis of PI
d296cb127fcb more on paper
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parents: 283
diff changeset
   494
  \cite{conf/fase/JahierHR09,WellingsBSB07,Faria08} are based on the
d296cb127fcb more on paper
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parents: 283
diff changeset
   495
  model checking technology. Because of the state explosion problem,
d296cb127fcb more on paper
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parents: 283
diff changeset
   496
  model check is much like an exhaustive testing of finite models with
d296cb127fcb more on paper
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parents: 283
diff changeset
   497
  limited size.  The results obtained can not be safely generalized to
d296cb127fcb more on paper
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parents: 283
diff changeset
   498
  models with arbitrarily large size. Worse still, since model
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   499
  checking is fully automatic, it give little insight on why the
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   500
  formal model is correct. It is therefore definitely desirable to
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   501
  analyze PI using theorem proving, which gives more general results
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   502
  as well as deeper insight. And this is the purpose of this paper
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   503
  which gives a formal analysis of PI in the interactive theorem
d296cb127fcb more on paper
urbanc
parents: 283
diff changeset
   504
  prover Isabelle using Higher Order Logic (HOL). The formalization
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   505
  focuses on on two issues:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   506
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   507
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   508
  \item The correctness of the protocol model itself. A series of desirable properties is 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   509
    derived until we are fully convinced that the formal model of PI does 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   510
    eliminate priority inversion. And a better understanding of PI is so obtained 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   511
    in due course. For example, we find through formalization that the choice of 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   512
    next thread to take hold when a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   513
    resource is released is irrelevant for the very basic property of PI to hold. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   514
    A point never mentioned in literature. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   515
  \item The correctness of the implementation. A series of properties is derived the meaning 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   516
    of which can be used as guidelines on how PI can be implemented efficiently and correctly. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   517
  \end{enumerate} 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   518
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   519
  The rest of the paper is organized as follows: Section \ref{overview} gives an overview 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   520
  of PI. Section \ref{model} introduces the formal model of PI. Section \ref{general} 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   521
  discusses a series of basic properties of PI. Section \ref{extension} shows formally 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   522
  how priority inversion is controlled by PI. Section \ref{implement} gives properties 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   523
  which can be used for guidelines of implementation. Section \ref{related} discusses 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   524
  related works. Section \ref{conclusion} concludes the whole paper.
265
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   525
273
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   526
  The basic priority inheritance protocol has two problems:
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   527
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   528
  It does not prevent a deadlock from happening in a program with circular lock dependencies.
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   529
  
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   530
  A chain of blocking may be formed; blocking duration can be substantial, though bounded.
039711ba6cf9 slightly more on text
urbanc
parents: 272
diff changeset
   531
265
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   532
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   533
  Contributions
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   534
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   535
  Despite the wide use of Priority Inheritance Protocol in real time operating
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   536
  system, it's correctness has never been formally proved and mechanically checked. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   537
  All existing verification are based on model checking technology. Full automatic
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   538
  verification gives little help to understand why the protocol is correct. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   539
  And results such obtained only apply to models of limited size. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   540
  This paper presents a formal verification based on theorem proving. 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   541
  Machine checked formal proof does help to get deeper understanding. We found 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   542
  the fact which is not mentioned in the literature, that the choice of next 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   543
  thread to take over when an critical resource is release does not affect the correctness
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   544
  of the protocol. The paper also shows how formal proof can help to construct 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   545
  correct and efficient implementation.\bigskip 
993068ce745f changed abstract, intro and IsaMakefile
urbanc
parents: 264
diff changeset
   546
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   547
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   548
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   549
section {* An overview of priority inversion and priority inheritance \label{overview} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   550
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   551
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   552
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   553
  Priority inversion refers to the phenomenon when a thread with high priority is blocked 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   554
  by a thread with low priority. Priority happens when the high priority thread requests 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   555
  for some critical resource already taken by the low priority thread. Since the high 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   556
  priority thread has to wait for the low priority thread to complete, it is said to be 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   557
  blocked by the low priority thread. Priority inversion might prevent high priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   558
  thread from fulfill its task in time if the duration of priority inversion is indefinite 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   559
  and unpredictable. Indefinite priority inversion happens when indefinite number 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   560
  of threads with medium priorities is activated during the period when the high 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   561
  priority thread is blocked by the low priority thread. Although these medium 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   562
  priority threads can not preempt the high priority thread directly, they are able 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   563
  to preempt the low priority threads and cause it to stay in critical section for 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   564
  an indefinite long duration. In this way, the high priority thread may be blocked indefinitely. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   565
  
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   566
  Priority inheritance is one protocol proposed to avoid indefinite priority inversion. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   567
  The basic idea is to let the high priority thread donate its priority to the low priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   568
  thread holding the critical resource, so that it will not be preempted by medium priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   569
  threads. The thread with highest priority will not be blocked unless it is requesting 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   570
  some critical resource already taken by other threads. Viewed from a different angle, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   571
  any thread which is able to block the highest priority threads must already hold some 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   572
  critical resource. Further more, it must have hold some critical resource at the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   573
  moment the highest priority is created, otherwise, it may never get change to run and 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   574
  get hold. Since the number of such resource holding lower priority threads is finite, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   575
  if every one of them finishes with its own critical section in a definite duration, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   576
  the duration the highest priority thread is blocked is definite as well. The key to 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   577
  guarantee lower priority threads to finish in definite is to donate them the highest 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   578
  priority. In such cases, the lower priority threads is said to have inherited the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   579
  highest priority. And this explains the name of the protocol: 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   580
  {\em Priority Inheritance} and how Priority Inheritance prevents indefinite delay.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   581
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   582
  The objectives of this paper are:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   583
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   584
  \item Build the above mentioned idea into formal model and prove a series of properties 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   585
    until we are convinced that the formal model does fulfill the original idea. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   586
  \item Show how formally derived properties can be used as guidelines for correct 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   587
    and efficient implementation.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   588
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   589
  The proof is totally formal in the sense that every detail is reduced to the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   590
  very first principles of Higher Order Logic. The nature of interactive theorem 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   591
  proving is for the human user to persuade computer program to accept its arguments. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   592
  A clear and simple understanding of the problem at hand is both a prerequisite and a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   593
  byproduct of such an effort, because everything has finally be reduced to the very 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   594
  first principle to be checked mechanically. The former intuitive explanation of 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   595
  Priority Inheritance is just such a byproduct. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   596
  *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   597
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   598
section {* Formal model of Priority Inheritance \label{model} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   599
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   600
  \input{../../generated/PrioGDef}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   601
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   602
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   603
section {* General properties of Priority Inheritance \label{general} *}
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   604
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   605
text {*
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   606
  The following are several very basic prioprites:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   607
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   608
  \item All runing threads must be ready (@{text "runing_ready"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   609
          @{thm[display] "runing_ready"}  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   610
  \item All ready threads must be living (@{text "readys_threads"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   611
          @{thm[display] "readys_threads"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   612
  \item There are finite many living threads at any moment (@{text "finite_threads"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   613
          @{thm[display] "finite_threads"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   614
  \item Every waiting queue does not contain duplcated elements (@{text "wq_distinct"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   615
          @{thm[display] "wq_distinct"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   616
  \item All threads in waiting queues are living threads (@{text "wq_threads"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   617
          @{thm[display] "wq_threads"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   618
  \item The event which can get a thread into waiting queue must be @{term "P"}-events
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   619
         (@{text "block_pre"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   620
          @{thm[display] "block_pre"}   
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   621
  \item A thread may never wait for two different critical resources
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   622
         (@{text "waiting_unique"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   623
          @{thm[display] waiting_unique[of _ _ "cs\<^isub>1" "cs\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   624
  \item Every resource can only be held by one thread
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   625
         (@{text "held_unique"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   626
          @{thm[display] held_unique[of _ "th\<^isub>1" _ "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   627
  \item Every living thread has an unique precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   628
         (@{text "preced_unique"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   629
          @{thm[display] preced_unique[of "th\<^isub>1" _ "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   630
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   631
*}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   632
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   633
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   634
  The following lemmas show how RAG is changed with the execution of events:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   635
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   636
  \item Execution of @{term "Set"} does not change RAG (@{text "depend_set_unchanged"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   637
    @{thm[display] depend_set_unchanged}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   638
  \item Execution of @{term "Create"} does not change RAG (@{text "depend_create_unchanged"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   639
    @{thm[display] depend_create_unchanged}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   640
  \item Execution of @{term "Exit"} does not change RAG (@{text "depend_exit_unchanged"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   641
    @{thm[display] depend_exit_unchanged}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   642
  \item Execution of @{term "P"} (@{text "step_depend_p"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   643
    @{thm[display] step_depend_p}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   644
  \item Execution of @{term "V"} (@{text "step_depend_v"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   645
    @{thm[display] step_depend_v}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   646
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   647
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   648
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   649
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   650
  These properties are used to derive the following important results about RAG:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   651
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   652
  \item RAG is loop free (@{text "acyclic_depend"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   653
  @{thm [display] acyclic_depend}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   654
  \item RAGs are finite (@{text "finite_depend"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   655
  @{thm [display] finite_depend}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   656
  \item Reverse paths in RAG are well founded (@{text "wf_dep_converse"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   657
  @{thm [display] wf_dep_converse}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   658
  \item The dependence relation represented by RAG has a tree structure (@{text "unique_depend"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   659
  @{thm [display] unique_depend[of _ _ "n\<^isub>1" "n\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   660
  \item All threads in RAG are living threads 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   661
    (@{text "dm_depend_threads"} and @{text "range_in"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   662
    @{thm [display] dm_depend_threads range_in}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   663
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   664
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   665
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   666
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   667
  The following lemmas show how every node in RAG can be chased to ready threads:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   668
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   669
  \item Every node in RAG can be chased to a ready thread (@{text "chain_building"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   670
    @{thm [display] chain_building[rule_format]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   671
  \item The ready thread chased to is unique (@{text "dchain_unique"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   672
    @{thm [display] dchain_unique[of _ _ "th\<^isub>1" "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   673
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   674
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   675
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   676
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   677
  Properties about @{term "next_th"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   678
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   679
  \item The thread taking over is different from the thread which is releasing
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   680
  (@{text "next_th_neq"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   681
  @{thm [display] next_th_neq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   682
  \item The thread taking over is unique
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   683
  (@{text "next_th_unique"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   684
  @{thm [display] next_th_unique[of _ _ _ "th\<^isub>1" "th\<^isub>2"]}  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   685
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   686
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   687
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   688
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   689
  Some deeper results about the system:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   690
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   691
  \item There can only be one running thread (@{text "runing_unique"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   692
  @{thm [display] runing_unique[of _ "th\<^isub>1" "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   693
  \item The maximum of @{term "cp"} and @{term "preced"} are equal (@{text "max_cp_eq"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   694
  @{thm [display] max_cp_eq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   695
  \item There must be one ready thread having the max @{term "cp"}-value 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   696
  (@{text "max_cp_readys_threads"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   697
  @{thm [display] max_cp_readys_threads}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   698
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   699
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   700
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   701
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   702
  The relationship between the count of @{text "P"} and @{text "V"} and the number of 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   703
  critical resources held by a thread is given as follows:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   704
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   705
  \item The @{term "V"}-operation decreases the number of critical resources 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   706
    one thread holds (@{text "cntCS_v_dec"})
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   707
     @{thm [display]  cntCS_v_dec}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   708
  \item The number of @{text "V"} never exceeds the number of @{text "P"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   709
    (@{text "cnp_cnv_cncs"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   710
    @{thm [display]  cnp_cnv_cncs}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   711
  \item The number of @{text "V"} equals the number of @{text "P"} when 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   712
    the relevant thread is not living:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   713
    (@{text "cnp_cnv_eq"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   714
    @{thm [display]  cnp_cnv_eq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   715
  \item When a thread is not living, it does not hold any critical resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   716
    (@{text "not_thread_holdents"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   717
    @{thm [display] not_thread_holdents}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   718
  \item When the number of @{text "P"} equals the number of @{text "V"}, the relevant 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   719
    thread does not hold any critical resource, therefore no thread can depend on it
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   720
    (@{text "count_eq_dependents"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   721
    @{thm [display] count_eq_dependents}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   722
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   723
  *}
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   724
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   725
section {* Key properties \label{extension} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   726
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   727
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   728
context extend_highest_gen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   729
begin
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   730
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   731
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   732
text {*
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   733
  The essential of {\em Priority Inheritance} is to avoid indefinite priority inversion. For this 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   734
  purpose, we need to investigate what happens after one thread takes the highest precedence. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   735
  A locale is used to describe such a situation, which assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   736
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   737
  \item @{term "s"} is a valid state (@{text "vt_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   738
    @{thm  vt_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   739
  \item @{term "th"} is a living thread in @{term "s"} (@{text "threads_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   740
    @{thm threads_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   741
  \item @{term "th"} has the highest precedence in @{term "s"} (@{text "highest"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   742
    @{thm highest}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   743
  \item The precedence of @{term "th"} is @{term "Prc prio tm"} (@{text "preced_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   744
    @{thm preced_th}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   745
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   746
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   747
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   748
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   749
  Under these assumptions, some basic priority can be derived for @{term "th"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   750
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   751
  \item The current precedence of @{term "th"} equals its own precedence (@{text "eq_cp_s_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   752
    @{thm [display] eq_cp_s_th}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   753
  \item The current precedence of @{term "th"} is the highest precedence in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   754
    the system (@{text "highest_cp_preced"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   755
    @{thm [display] highest_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   756
  \item The precedence of @{term "th"} is the highest precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   757
    in the system (@{text "highest_preced_thread"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   758
    @{thm [display] highest_preced_thread}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   759
  \item The current precedence of @{term "th"} is the highest current precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   760
    in the system (@{text "highest'"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   761
    @{thm [display] highest'}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   762
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   763
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   764
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   765
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   766
  To analysis what happens after state @{term "s"} a sub-locale is defined, which 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   767
  assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   768
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   769
  \item @{term "t"} is a valid extension of @{term "s"} (@{text "vt_t"}): @{thm vt_t}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   770
  \item Any thread created in @{term "t"} has priority no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   771
    its precedence can not be higher than @{term "th"},  therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   772
    @{term "th"} remain to be the one with the highest precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   773
    (@{text "create_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   774
    @{thm [display] create_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   775
  \item Any adjustment of priority in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   776
    @{term "t"} does not happen to @{term "th"} and 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   777
    the priority set is no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   778
    @{term "th"} remain to be the one with the highest precedence (@{text "set_diff_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   779
    @{thm [display] set_diff_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   780
  \item Since we are investigating what happens to @{term "th"}, it is assumed 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   781
    @{term "th"} does not exit during @{term "t"} (@{text "exit_diff"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   782
    @{thm [display] exit_diff}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   783
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   784
*}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   785
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   786
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   787
  All these assumptions are put into a predicate @{term "extend_highest_gen"}. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   788
  It can be proved that @{term "extend_highest_gen"} holds 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   789
  for any moment @{text "i"} in it @{term "t"} (@{text "red_moment"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   790
  @{thm [display] red_moment}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   791
  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   792
  From this, an induction principle can be derived for @{text "t"}, so that 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   793
  properties already derived for @{term "t"} can be applied to any prefix 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   794
  of @{text "t"} in the proof of new properties 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   795
  about @{term "t"} (@{text "ind"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   796
  \begin{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   797
  @{thm[display] ind}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   798
  \end{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   799
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   800
  The following properties can be proved about @{term "th"} in @{term "t"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   801
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   802
  \item In @{term "t"}, thread @{term "th"} is kept live and its 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   803
    precedence is preserved as well
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   804
    (@{text "th_kept"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   805
    @{thm [display] th_kept}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   806
  \item In @{term "t"}, thread @{term "th"}'s precedence is always the maximum among 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   807
    all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   808
    (@{text "max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   809
    @{thm [display] max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   810
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   811
    among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   812
    (@{text "th_cp_max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   813
    @{thm [display] th_cp_max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   814
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum current 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   815
    precedence among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   816
    (@{text "th_cp_max"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   817
    @{thm [display] th_cp_max}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   818
  \item In @{term "t"}, thread @{term "th"}'s current precedence equals its precedence at moment 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   819
    @{term "s"}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   820
    (@{text "th_cp_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   821
    @{thm [display] th_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   822
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   823
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   824
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   825
text {* \noindent
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   826
  The main theorem of this part is to characterizing the running thread during @{term "t"} 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   827
  (@{text "runing_inversion_2"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   828
  @{thm [display] runing_inversion_2}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   829
  According to this, if a thread is running, it is either @{term "th"} or was
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   830
  already live and held some resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   831
  at moment @{text "s"} (expressed by: @{text "cntV s th' < cntP s th'"}).
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   832
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   833
  Since there are only finite many threads live and holding some resource at any moment,
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   834
  if every such thread can release all its resources in finite duration, then after finite
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   835
  duration, none of them may block @{term "th"} anymore. So, no priority inversion may happen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   836
  then.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   837
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   838
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   839
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   840
end
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   841
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   842
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   843
section {* Properties to guide implementation \label{implement} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   844
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   845
text {*
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   846
  The properties (especially @{text "runing_inversion_2"}) convinced us that the model defined 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   847
  in Section \ref{model} does prevent indefinite priority inversion and therefore fulfills 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   848
  the fundamental requirement of Priority Inheritance protocol. Another purpose of this paper 
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   849
  is to show how this model can be used to guide a concrete implementation. As discussed in
276
a821434474c9 more on intro
urbanc
parents: 275
diff changeset
   850
  Section 5.6.5 of \cite{Vahalia96}, the implementation of Priority Inheritance in Solaris 
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   851
  uses sophisticated linking data structure. Except discussing two scenarios to show how
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   852
  the data structure should be manipulated, a lot of details of the implementation are missing. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   853
  In \cite{Faria08,conf/fase/JahierHR09,WellingsBSB07} the protocol is described formally 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   854
  using different notations, but little information is given on how this protocol can be 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   855
  implemented efficiently, especially there is no information on how these data structure 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   856
  should be manipulated. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   857
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   858
  Because the scheduling of threads is based on current precedence, 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   859
  the central issue in implementation of Priority Inheritance is how to compute the precedence
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   860
  correctly and efficiently. As long as the precedence is correct, it is very easy to 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   861
  modify the scheduling algorithm to select the correct thread to execute. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   862
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   863
  First, it can be proved that the computation of current precedence @{term "cp"} of a threads
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   864
  only involves its children (@{text "cp_rec"}):
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   865
  @{thm [display] cp_rec} 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   866
  where @{term "children s th"} represents the set of children of @{term "th"} in the current
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   867
  RAG: 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   868
  \[
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   869
  @{thm (lhs) children_def} @{text "\<equiv>"} @{thm (rhs) children_def}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   870
  \]
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   871
  where the definition of @{term "child"} is: 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   872
  \[ @{thm (lhs) child_def} @{text "\<equiv>"}  @{thm (rhs) child_def}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   873
  \]
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   874
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   875
  The aim of this section is to fill the missing details of how current precedence should
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   876
  be changed with the happening of events, with each event type treated by one subsection,
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   877
  where the computation of @{term "cp"} uses lemma @{text "cp_rec"}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   878
  *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   879
 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   880
subsection {* Event @{text "Set th prio"} *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   881
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   882
(*<*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   883
context step_set_cps
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   884
begin
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   885
(*>*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   886
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   887
text {*
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   888
  The context under which event @{text "Set th prio"} happens is formalized as follows:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   889
  \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   890
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   891
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   892
      event @{text "Set th prio"} is eligible to happen under state @{term "s'"} and
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   893
      state @{term "s'"} is a valid state.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   894
  \end{enumerate}
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   895
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   896
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   897
text {* \noindent
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   898
  Under such a context, we investigated how the current precedence @{term "cp"} of 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   899
  threads change from state @{term "s'"} to @{term "s"} and obtained the following
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   900
  conclusions:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   901
  \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   902
  %% \item The RAG does not change (@{text "eq_dep"}): @{thm "eq_dep"}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   903
  \item All threads with no dependence relation with thread @{term "th"} have their
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   904
    @{term "cp"}-value unchanged (@{text "eq_cp"}):
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   905
    @{thm [display] eq_cp}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   906
    This lemma implies the @{term "cp"}-value of @{term "th"}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   907
    and those threads which have a dependence relation with @{term "th"} might need
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   908
    to be recomputed. The way to do this is to start from @{term "th"} 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   909
    and follow the @{term "depend"}-chain to recompute the @{term "cp"}-value of every 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   910
    encountered thread using lemma @{text "cp_rec"}. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   911
    Since the @{term "depend"}-relation is loop free, this procedure 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   912
    can always stop. The the following lemma shows this procedure actually could stop earlier.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   913
  \item The following two lemma shows, if a thread the re-computation of which
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   914
    gives an unchanged @{term "cp"}-value, the procedure described above can stop. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   915
    \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   916
      \item Lemma @{text "eq_up_self"} shows if the re-computation of
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   917
        @{term "th"}'s @{term "cp"} gives the same result, the procedure can stop:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   918
        @{thm [display] eq_up_self}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   919
      \item Lemma @{text "eq_up"}) shows if the re-computation at intermediate threads
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   920
        gives unchanged result, the procedure can stop:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   921
        @{thm [display] eq_up}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   922
  \end{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   923
  \end{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   924
  *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   925
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   926
(*<*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   927
end
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   928
(*>*)
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   929
272
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   930
subsection {* Event @{text "V th cs"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   931
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   932
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   933
context step_v_cps_nt
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   934
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   935
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   936
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   937
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   938
  The context under which event @{text "V th cs"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   939
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   940
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   941
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   942
      event @{text "V th cs"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   943
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   944
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   945
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   946
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   947
text {* \noindent
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   948
  Under such a context, we investigated how the current precedence @{term "cp"} of 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   949
  threads change from state @{term "s'"} to @{term "s"}. 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   950
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   951
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   952
  Two subcases are considerted, 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   953
  where the first is that there exits @{term "th'"} 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   954
  such that 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   955
  @{thm [display] nt} 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   956
  holds, which means there exists a thread @{term "th'"} to take over
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   957
  the resource release by thread @{term "th"}. 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   958
  In this sub-case, the following results are obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   959
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   960
  \item The change of RAG is given by lemma @{text "depend_s"}: 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   961
  @{thm [display] "depend_s"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   962
  which shows two edges are removed while one is added. These changes imply how
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   963
  the current precedences should be re-computed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   964
  \item First all threads different from @{term "th"} and @{term "th'"} have their
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   965
  @{term "cp"}-value kept, therefore do not need a re-computation
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   966
  (@{text "cp_kept"}): @{thm [display] cp_kept}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   967
  This lemma also implies, only the @{term "cp"}-values of @{term "th"} and @{term "th'"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   968
  need to be recomputed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   969
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   970
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   971
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   972
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   973
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   974
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   975
context step_v_cps_nnt
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   976
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   977
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   978
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   979
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   980
  The other sub-case is when for all @{text "th'"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   981
  @{thm [display] nnt}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   982
  holds, no such thread exists. The following results can be obtained for this 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   983
  sub-case:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   984
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   985
  \item The change of RAG is given by lemma @{text "depend_s"}:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   986
  @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   987
  which means only one edge is removed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   988
  \item In this case, no re-computation is needed (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   989
  @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   990
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   991
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   992
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   993
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   994
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   995
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   996
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   997
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   998
subsection {* Event @{text "P th cs"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   999
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1000
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1001
context step_P_cps_e
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1002
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1003
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1004
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1005
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1006
  The context under which event @{text "P th cs"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1007
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1008
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1009
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1010
      event @{text "P th cs"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1011
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1012
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1013
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1014
  This case is further divided into two sub-cases. The first is when @{thm ee} holds.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1015
  The following results can be obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1016
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1017
  \item One edge is added to the RAG (@{text "depend_s"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1018
    @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1019
  \item No re-computation is needed (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1020
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1021
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1022
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1023
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1024
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1025
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1026
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1027
context step_P_cps_ne
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1028
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1029
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1030
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1031
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1032
  The second is when @{thm ne} holds.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1033
  The following results can be obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1034
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1035
  \item One edge is added to the RAG (@{text "depend_s"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1036
    @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1037
  \item Threads with no dependence relation with @{term "th"} do not need a re-computation
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1038
    of their @{term "cp"}-values (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1039
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1040
    This lemma implies all threads with a dependence relation with @{term "th"} may need 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1041
    re-computation.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1042
  \item Similar to the case of @{term "Set"}, the computation procedure could stop earlier
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1043
    (@{text "eq_up"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1044
    @{thm [display] eq_up}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1045
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1046
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1047
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1048
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1049
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1050
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1051
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1052
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1053
subsection {* Event @{text "Create th prio"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1054
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1055
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1056
context step_create_cps
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1057
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1058
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1059
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1060
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1061
  The context under which event @{text "Create th prio"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1062
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1063
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1064
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1065
      event @{text "Create th prio"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1066
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1067
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1068
  The following results can be obtained under this context:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1069
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1070
  \item The RAG does not change (@{text "eq_dep"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1071
    @{thm [display] eq_dep}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1072
  \item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1073
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1074
  \item The @{term "cp"}-value of @{term "th"} equals its precedence 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1075
    (@{text "eq_cp_th"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1076
    @{thm [display] eq_cp_th}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1077
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1078
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1079
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1080
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1081
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1082
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1083
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1084
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1085
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1086
subsection {* Event @{text "Exit th"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1087
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1088
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1089
context step_exit_cps
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1090
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1091
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1092
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1093
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1094
  The context under which event @{text "Exit th"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1095
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1096
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1097
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1098
      event @{text "Exit th"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1099
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1100
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1101
  The following results can be obtained under this context:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1102
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1103
  \item The RAG does not change (@{text "eq_dep"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1104
    @{thm [display] eq_dep}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1105
  \item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1106
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1107
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1108
  Since @{term th} does not live in state @{term "s"}, there is no need to compute 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1109
  its @{term cp}-value.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1110
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1111
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1112
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1113
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1114
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1115
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
  1116
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1117
section {* Related works \label{related} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1118
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1119
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1120
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1121
  \item {\em Integrating Priority Inheritance Algorithms in the Real-Time Specification for Java}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1122
    \cite{WellingsBSB07} models and verifies the combination of Priority Inheritance (PI) and 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1123
    Priority Ceiling Emulation (PCE) protocols in the setting of Java virtual machine 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1124
    using extended Timed Automata(TA) formalism of the UPPAAL tool. Although a detailed 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1125
    formal model of combined PI and PCE is given, the number of properties is quite 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1126
    small and the focus is put on the harmonious working of PI and PCE. Most key features of PI 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1127
    (as well as PCE) are not shown. Because of the limitation of the model checking technique
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1128
    used there, properties are shown only for a small number of scenarios. Therefore, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1129
    the verification does not show the correctness of the formal model itself in a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1130
    convincing way.  
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1131
  \item {\em Formal Development of Solutions for Real-Time Operating Systems with TLA+/TLC}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1132
    \cite{Faria08}. A formal model of PI is given in TLA+. Only 3 properties are shown 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1133
    for PI using model checking. The limitation of model checking is intrinsic to the work.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1134
  \item {\em Synchronous modeling and validation of priority inheritance schedulers}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1135
    \cite{conf/fase/JahierHR09}. Gives a formal model
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1136
    of PI and PCE in AADL (Architecture Analysis \& Design Language) and checked 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1137
    several properties using model checking. The number of properties shown there is 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1138
    less than here and the scale is also limited by the model checking technique. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1139
  \item {\em The Priority Ceiling Protocol: Formalization and Analysis Using PVS}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1140
    \cite{dutertre99b}. Formalized another protocol for Priority Inversion in the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1141
    interactive theorem proving system PVS.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1142
\end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1143
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1144
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1145
  There are several works on inversion avoidance:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1146
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1147
  \item {\em Solving the group priority inversion problem in a timed asynchronous system}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1148
    \cite{Wang:2002:SGP}. The notion of Group Priority Inversion is introduced. The main 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1149
    strategy is still inversion avoidance. The method is by reordering requests 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1150
    in the setting of Client-Server.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1151
  \item {\em A Formalization of Priority Inversion} \cite{journals/rts/BabaogluMS93}. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1152
    Formalized the notion of Priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1153
    Inversion and proposes methods to avoid it. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1154
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1155
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1156
  {\em Examples of inaccurate specification of the protocol ???}.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1157
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1158
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1159
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1160
section {* Conclusions \label{conclusion} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1161
286
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1162
text {*
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1163
  The work in this paper only deals with single CPU configurations. The
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1164
  "one CPU" assumption is essential for our formalisation, because the
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1165
  main lemma fails in multi-CPU configuration. The lemma says that any
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1166
  runing thead must be the one with the highest prioirty or already held
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1167
  some resource when the highest priority thread was initiated. When
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1168
  there are multiple CPUs, it may well be the case that a threads did
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1169
  not hold any resource when the highest priority thread was initiated,
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1170
  but that thread still runs after that moment on a separate CPU. In
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1171
  this way, the main lemma does not hold anymore.
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1172
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1173
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1174
  There are some works deals with priority inversion in multi-CPU
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1175
  configurations[???], but none of them have given a formal correctness
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1176
  proof. The extension of our formal proof to deal with multi-CPU
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1177
  configurations is not obvious. One possibility, as suggested in paper
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1178
  [???], is change our formal model (the defiintion of "schs") to give
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1179
  the released resource to the thread with the highest prioirty. In this
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1180
  way, indefinite prioirty inversion can be avoided, but for a quite
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1181
  different reason from the one formalized in this paper (because the
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1182
  "mail lemma" will be different). This means a formal correctness proof
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1183
  for milt-CPU configuration would be quite different from the one given
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1184
  in this paper. The solution of prioirty inversion problem in mult-CPU
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1185
  configurations is a different problem which needs different solutions
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1186
  which is outside the scope of this paper.
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1187
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1188
*}
572f202659ff corrections by Xingyuan
urbanc
parents: 285
diff changeset
  1189
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1190
(*<*)
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1191
end
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
  1192
(*>*)