prio/Paper/Paper.thy
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(*<*)
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theory Paper
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imports CpsG ExtGG (* "~~/src/HOL/Library/LaTeXsugar" *) LaTeXsugar
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begin
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ML {*
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  open Printer;
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  show_question_marks_default := false;
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  *}
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(*>*)
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section {* Introduction *}
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text {*
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  Many real-time systems need to support processes with priorities and
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  locking of resources. Locking of resources ensures mutual exclusion
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  when accessing shared data or devices that cannot be
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  preempted. Priorities allow scheduling of processes that need to
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  finish their work within deadlines.  Unfortunately, both features
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  can interact in subtle ways leading to a problem, called
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  \emph{Priority Inversion}. Suppose three processes having priorities
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  $H$(igh), $M$(edium) and $L$(ow). We would expect that the process
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  $H$ blocks any other process with lower priority and itself cannot
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  be blocked by any process with lower priority. Alas, in a naive
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  implementation of resource looking and priorities this property can
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  be violated. Even worse, $H$ can be delayed indefinitely by
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  processes with lower priorities. For this let $L$ be in the
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  possession of a lock for a resource that also $H$ needs. $H$ must
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  therefore wait for $L$ to exit the critical section and release this
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  lock. The problem is that $L$ might in turn be blocked by any
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  process with priority $M$, and so $H$ sits there potentially waiting
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  indefinitely. Since $H$ is blocked by processes with lower
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  priorities, the problem is called Priority Inversion. It was first
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  described in \cite{Lampson80} in the context of the
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  Mesa programming language designed for concurrent programming.
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  If the problem of Priority Inversion is ignored, real-time systems
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  can become unpredictable and resulting bugs can be hard to diagnose.
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  The classic example where this happened is the software that
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  controlled the Mars Pathfinder mission in 1997
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  \cite{Reeves98}.  Once the spacecraft landed, the software
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  shut down at irregular intervals leading to loss of project time as
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  normal operation of the craft could only resume the next day (the
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  mission and data already collected were fortunately not lost, because
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  of a clever system design).  The reason for the shutdowns was that
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  the scheduling software fell victim of Priority Inversion: a low
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  priority task locking a resource prevented a high priority process
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  from running in time leading to a system reset. Once the problem was found,
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  it was rectified by enabling the \emph{Priority Inheritance Protocol} 
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  (PIP) \cite{Sha90} in the scheduling software.
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  The idea behind PIP is to let the process $L$ temporarily
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  inherit the high priority from $H$ until $L$ leaves the critical
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  section unlocking the resource. This solves the problem of $H$
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  having to wait indefinitely, because $L$ cannot, for example, be
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  blocked by processes having priority $M$. While a few other
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  solutions exist for the Priority Inversion problem, PIP is one that is widely deployed
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  and implemented. This includes VxWorks (a proprietary real-time OS
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  used in the Mars Pathfinder mission, in Boeing's 787 Dreamliner,
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  Honda's ASIMO robot, etc.), but also the POSIX 1003.1c Standard
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  realised for example in libraries for FreeBSD, Solaris and Linux.
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  One advantage of PIP is that increasing the priority of a process
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  can be dynamically calculated by the scheduler. This is in contrast
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  to, for example, \emph{Priority Ceiling} \cite{Sha90}, another
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  solution to the Priority Inversion problem, which requires static
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  analysis of the program in order to be helpful. However, there has
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  also been strong criticism against PIP. For instance, PIP cannot
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  prevent deadlocks when lock dependencies are circular, and also
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  blocking times can be substantial (more than just the duration of a
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  critical section).  Though, most criticism against PIP centres
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  around unreliable implementations and PIP being too complicated and
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  too inefficient.  For example, Yodaiken writes in \cite{Yodaiken02}:
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  \begin{quote}
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  \it{}``Priority inheritance is neither efficient nor reliable. Implementations
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  are either incomplete (and unreliable) or surprisingly complex and intrusive.''
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  \end{quote}
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  \noindent
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  He suggests to avoid PIP altogether by not allowing critical
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  sections to be preempted. While this might have been a reasonable
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  solution in 2002, in our modern multiprocessor world, this seems out
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  of date.  However, there is clearly a need for investigating correct
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  and efficient algorithms for PIP. A few specifications for PIP exist
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  (in English) and also a few high-level descriptions of
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  implementations (e.g.~in the textbook \cite[Section
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  5.6.5]{Vahalia96}), but they help little with actual
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  implementations. That this is a problem in practise is proved by an
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  email by Baker, who wrote on 13 July 2009 on the Linux Kernel
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  mailing list:
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  \begin{quote}
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  \it{}``I observed in the kernel code (to my disgust), the Linux PIP
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  implementation is a nightmare: extremely heavy weight, involving
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  maintenance of a full wait-for graph, and requiring updates for a
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  range of events, including priority changes and interruptions of
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  wait operations.''
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  \end{quote}
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  \noindent
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  The criticism by Yodaiken, Baker and others suggests to us to look
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  again at PIP from a more abstract level (but still concrete enough
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  to inform an implementation) and makes PIP an ideal candidate for a
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  formal verification. One reason, of course, is that the original
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  presentation of PIP \cite{Sha90}, despite being
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  informally ``proved'' correct, is actually \emph{flawed}. Yodaiken
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  \cite{Yodaiken02} points to a subtlety that had been overlooked by
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  Sha et al. They write in \cite{Sha90}
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  But this is too
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  simplistic. Consider
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  Priority Inversion problem has been known since 1980
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  \cite{Lampson80}, but Sha et al.~give the first
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  thorough analysis and present an informal correctness proof for PIP
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  .\footnote{Sha et al.~call it the
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  \emph{Basic Priority Inheritance Protocol}.}
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   POSIX.4: programming for the real world (Google eBook)
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  However, there are further subtleties: just lowering the priority 
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  of the process $L$ to its low priority, as proposed in ???, is 
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  incorrect.\bigskip
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  very little on implementations, not to mention implementations informed by 
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  formal correctness proofs.
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  The priority inversion phenomenon was first published in \cite{Lampson80}. 
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  The two protocols widely used to eliminate priority inversion, namely 
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  PI (Priority Inheritance) and PCE (Priority Ceiling Emulation), were proposed 
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  in \cite{Sha90}. PCE is less convenient to use because it requires 
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  static analysis of programs. Therefore, PI is more commonly used in 
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  practice\cite{locke-july02}. However, as pointed out in the literature, 
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  the analysis of priority inheritance protocol is quite subtle\cite{yodaiken-july02}. 
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  A formal analysis will certainly be helpful for us to understand and correctly 
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  implement PI. All existing formal analysis of PI
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  \cite{conf/fase/JahierHR09,WellingsBSB07,Faria08} are based on the model checking 
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  technology. Because of the state explosion problem, model check 
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  is much like an exhaustive testing of finite models with limited size. 
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  The results obtained can not be safely generalized to models with arbitrarily 
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  large size. Worse still, since model checking is fully automatic, it give little 
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  insight on why the formal model is correct. It is therefore 
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  definitely desirable to analyze PI using theorem proving, which gives 
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  more general results as well as deeper insight. And this is the purpose 
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  of this paper which gives a formal analysis of PI in the interactive 
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  theorem prover Isabelle using Higher Order Logic (HOL). The formalization 
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  focuses on on two issues:
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  \begin{enumerate}
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  \item The correctness of the protocol model itself. A series of desirable properties is 
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    derived until we are fully convinced that the formal model of PI does 
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    eliminate priority inversion. And a better understanding of PI is so obtained 
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    in due course. For example, we find through formalization that the choice of 
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    next thread to take hold when a 
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    resource is released is irrelevant for the very basic property of PI to hold. 
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    A point never mentioned in literature. 
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  \item The correctness of the implementation. A series of properties is derived the meaning 
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    of which can be used as guidelines on how PI can be implemented efficiently and correctly. 
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  \end{enumerate} 
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  The rest of the paper is organized as follows: Section \ref{overview} gives an overview 
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  of PI. Section \ref{model} introduces the formal model of PI. Section \ref{general} 
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  discusses a series of basic properties of PI. Section \ref{extension} shows formally 
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  how priority inversion is controlled by PI. Section \ref{implement} gives properties 
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  which can be used for guidelines of implementation. Section \ref{related} discusses 
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  related works. Section \ref{conclusion} concludes the whole paper.
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  The basic priority inheritance protocol has two problems:
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  It does not prevent a deadlock from happening in a program with circular lock dependencies.
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  A chain of blocking may be formed; blocking duration can be substantial, though bounded.
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  Contributions
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  Despite the wide use of Priority Inheritance Protocol in real time operating
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  system, it's correctness has never been formally proved and mechanically checked. 
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  All existing verification are based on model checking technology. Full automatic
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  verification gives little help to understand why the protocol is correct. 
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  And results such obtained only apply to models of limited size. 
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  This paper presents a formal verification based on theorem proving. 
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  Machine checked formal proof does help to get deeper understanding. We found 
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  the fact which is not mentioned in the literature, that the choice of next 
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  thread to take over when an critical resource is release does not affect the correctness
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  of the protocol. The paper also shows how formal proof can help to construct 
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  correct and efficient implementation.\bigskip 
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262
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*}
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section {* An overview of priority inversion and priority inheritance \label{overview} *}
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text {*
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  Priority inversion refers to the phenomenon when a thread with high priority is blocked 
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  by a thread with low priority. Priority happens when the high priority thread requests 
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  for some critical resource already taken by the low priority thread. Since the high 
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  priority thread has to wait for the low priority thread to complete, it is said to be 
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  blocked by the low priority thread. Priority inversion might prevent high priority 
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  thread from fulfill its task in time if the duration of priority inversion is indefinite 
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  and unpredictable. Indefinite priority inversion happens when indefinite number 
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  of threads with medium priorities is activated during the period when the high 
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  priority thread is blocked by the low priority thread. Although these medium 
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  priority threads can not preempt the high priority thread directly, they are able 
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  to preempt the low priority threads and cause it to stay in critical section for 
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  an indefinite long duration. In this way, the high priority thread may be blocked indefinitely. 
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  Priority inheritance is one protocol proposed to avoid indefinite priority inversion. 
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  The basic idea is to let the high priority thread donate its priority to the low priority 
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  thread holding the critical resource, so that it will not be preempted by medium priority 
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  threads. The thread with highest priority will not be blocked unless it is requesting 
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  some critical resource already taken by other threads. Viewed from a different angle, 
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  any thread which is able to block the highest priority threads must already hold some 
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  critical resource. Further more, it must have hold some critical resource at the 
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  moment the highest priority is created, otherwise, it may never get change to run and 
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  get hold. Since the number of such resource holding lower priority threads is finite, 
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  if every one of them finishes with its own critical section in a definite duration, 
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  the duration the highest priority thread is blocked is definite as well. The key to 
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  guarantee lower priority threads to finish in definite is to donate them the highest 
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  priority. In such cases, the lower priority threads is said to have inherited the 
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  highest priority. And this explains the name of the protocol: 
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  {\em Priority Inheritance} and how Priority Inheritance prevents indefinite delay.
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  The objectives of this paper are:
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  \begin{enumerate}
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  \item Build the above mentioned idea into formal model and prove a series of properties 
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    until we are convinced that the formal model does fulfill the original idea. 
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  \item Show how formally derived properties can be used as guidelines for correct 
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    and efficient implementation.
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  \end{enumerate}
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  The proof is totally formal in the sense that every detail is reduced to the 
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  very first principles of Higher Order Logic. The nature of interactive theorem 
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  proving is for the human user to persuade computer program to accept its arguments. 
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  A clear and simple understanding of the problem at hand is both a prerequisite and a 
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  byproduct of such an effort, because everything has finally be reduced to the very 
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  first principle to be checked mechanically. The former intuitive explanation of 
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  Priority Inheritance is just such a byproduct. 
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  *}
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section {* Formal model of Priority Inheritance \label{model} *}
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text {*
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  \input{../../generated/PrioGDef}
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*}
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section {* General properties of Priority Inheritance \label{general} *}
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text {*
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  The following are several very basic prioprites:
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  \begin{enumerate}
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  \item All runing threads must be ready (@{text "runing_ready"}):
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          @{thm[display] "runing_ready"}  
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parents: 262
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  \item All ready threads must be living (@{text "readys_threads"}):
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          @{thm[display] "readys_threads"} 
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  \item There are finite many living threads at any moment (@{text "finite_threads"}):
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parents: 262
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          @{thm[display] "finite_threads"} 
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zhang
parents: 262
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  \item Every waiting queue does not contain duplcated elements (@{text "wq_distinct"}): 
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          @{thm[display] "wq_distinct"} 
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  \item All threads in waiting queues are living threads (@{text "wq_threads"}): 
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parents: 262
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          @{thm[display] "wq_threads"} 
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  \item The event which can get a thread into waiting queue must be @{term "P"}-events
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parents: 262
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         (@{text "block_pre"}): 
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          @{thm[display] "block_pre"}   
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  \item A thread may never wait for two different critical resources
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         (@{text "waiting_unique"}): 
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          @{thm[display] waiting_unique[of _ _ "cs\<^isub>1" "cs\<^isub>2"]}
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  \item Every resource can only be held by one thread
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         (@{text "held_unique"}): 
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          @{thm[display] held_unique[of _ "th\<^isub>1" _ "th\<^isub>2"]}
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  \item Every living thread has an unique precedence
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         (@{text "preced_unique"}): 
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          @{thm[display] preced_unique[of "th\<^isub>1" _ "th\<^isub>2"]}
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  \end{enumerate}
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*}
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text {* \noindent
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  The following lemmas show how RAG is changed with the execution of events:
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  \begin{enumerate}
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  \item Execution of @{term "Set"} does not change RAG (@{text "depend_set_unchanged"}):
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    @{thm[display] depend_set_unchanged}
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  \item Execution of @{term "Create"} does not change RAG (@{text "depend_create_unchanged"}):
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    @{thm[display] depend_create_unchanged}
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  \item Execution of @{term "Exit"} does not change RAG (@{text "depend_exit_unchanged"}):
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    @{thm[display] depend_exit_unchanged}
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parents: 262
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  \item Execution of @{term "P"} (@{text "step_depend_p"}):
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    @{thm[display] step_depend_p}
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  \item Execution of @{term "V"} (@{text "step_depend_v"}):
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    @{thm[display] step_depend_v}
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  \end{enumerate}
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  *}
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   293
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text {* \noindent
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  These properties are used to derive the following important results about RAG:
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  \begin{enumerate}
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  \item RAG is loop free (@{text "acyclic_depend"}):
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  @{thm [display] acyclic_depend}
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  \item RAGs are finite (@{text "finite_depend"}):
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  @{thm [display] finite_depend}
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zhang
parents: 262
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  \item Reverse paths in RAG are well founded (@{text "wf_dep_converse"}):
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  @{thm [display] wf_dep_converse}
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zhang
parents: 262
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  \item The dependence relation represented by RAG has a tree structure (@{text "unique_depend"}):
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zhang
parents: 262
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   304
  @{thm [display] unique_depend[of _ _ "n\<^isub>1" "n\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
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   305
  \item All threads in RAG are living threads 
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   306
    (@{text "dm_depend_threads"} and @{text "range_in"}):
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zhang
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   307
    @{thm [display] dm_depend_threads range_in}
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zhang
parents: 262
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   308
  \end{enumerate}
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parents: 262
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   309
  *}
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   310
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text {* \noindent
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  The following lemmas show how every node in RAG can be chased to ready threads:
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   313
  \begin{enumerate}
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  \item Every node in RAG can be chased to a ready thread (@{text "chain_building"}):
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    @{thm [display] chain_building[rule_format]}
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zhang
parents: 262
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  \item The ready thread chased to is unique (@{text "dchain_unique"}):
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zhang
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   317
    @{thm [display] dchain_unique[of _ _ "th\<^isub>1" "th\<^isub>2"]}
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   318
  \end{enumerate}
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zhang
parents: 262
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   319
  *}
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zhang
parents: 262
diff changeset
   320
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zhang
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   321
text {* \noindent
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zhang
parents: 262
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   322
  Properties about @{term "next_th"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   323
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   324
  \item The thread taking over is different from the thread which is releasing
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   325
  (@{text "next_th_neq"}):
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zhang
parents: 262
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   326
  @{thm [display] next_th_neq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   327
  \item The thread taking over is unique
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   328
  (@{text "next_th_unique"}):
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zhang
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diff changeset
   329
  @{thm [display] next_th_unique[of _ _ _ "th\<^isub>1" "th\<^isub>2"]}  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   330
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   331
  *}
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zhang
parents: 262
diff changeset
   332
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zhang
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   333
text {* \noindent
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zhang
parents: 262
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   334
  Some deeper results about the system:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   335
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   336
  \item There can only be one running thread (@{text "runing_unique"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   337
  @{thm [display] runing_unique[of _ "th\<^isub>1" "th\<^isub>2"]}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   338
  \item The maximum of @{term "cp"} and @{term "preced"} are equal (@{text "max_cp_eq"}):
24199eb2c423 Newer version.
zhang
parents: 262
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   339
  @{thm [display] max_cp_eq}
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zhang
parents: 262
diff changeset
   340
  \item There must be one ready thread having the max @{term "cp"}-value 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   341
  (@{text "max_cp_readys_threads"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   342
  @{thm [display] max_cp_readys_threads}
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zhang
parents: 262
diff changeset
   343
  \end{enumerate}
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zhang
parents: 262
diff changeset
   344
  *}
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zhang
parents: 262
diff changeset
   345
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parents: 262
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   346
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   347
  The relationship between the count of @{text "P"} and @{text "V"} and the number of 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   348
  critical resources held by a thread is given as follows:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   349
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   350
  \item The @{term "V"}-operation decreases the number of critical resources 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   351
    one thread holds (@{text "cntCS_v_dec"})
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   352
     @{thm [display]  cntCS_v_dec}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   353
  \item The number of @{text "V"} never exceeds the number of @{text "P"} 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   354
    (@{text "cnp_cnv_cncs"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   355
    @{thm [display]  cnp_cnv_cncs}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   356
  \item The number of @{text "V"} equals the number of @{text "P"} when 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   357
    the relevant thread is not living:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   358
    (@{text "cnp_cnv_eq"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   359
    @{thm [display]  cnp_cnv_eq}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   360
  \item When a thread is not living, it does not hold any critical resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   361
    (@{text "not_thread_holdents"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   362
    @{thm [display] not_thread_holdents}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   363
  \item When the number of @{text "P"} equals the number of @{text "V"}, the relevant 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   364
    thread does not hold any critical resource, therefore no thread can depend on it
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   365
    (@{text "count_eq_dependents"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   366
    @{thm [display] count_eq_dependents}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   367
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   368
  *}
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   369
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   370
section {* Key properties \label{extension} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   371
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   372
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   373
context extend_highest_gen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   374
begin
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   375
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   376
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   377
text {*
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   378
  The essential of {\em Priority Inheritance} is to avoid indefinite priority inversion. For this 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   379
  purpose, we need to investigate what happens after one thread takes the highest precedence. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   380
  A locale is used to describe such a situation, which assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   381
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   382
  \item @{term "s"} is a valid state (@{text "vt_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   383
    @{thm  vt_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   384
  \item @{term "th"} is a living thread in @{term "s"} (@{text "threads_s"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   385
    @{thm threads_s}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   386
  \item @{term "th"} has the highest precedence in @{term "s"} (@{text "highest"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   387
    @{thm highest}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   388
  \item The precedence of @{term "th"} is @{term "Prc prio tm"} (@{text "preced_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   389
    @{thm preced_th}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   390
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   391
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   392
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   393
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   394
  Under these assumptions, some basic priority can be derived for @{term "th"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   395
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   396
  \item The current precedence of @{term "th"} equals its own precedence (@{text "eq_cp_s_th"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   397
    @{thm [display] eq_cp_s_th}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   398
  \item The current precedence of @{term "th"} is the highest precedence in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   399
    the system (@{text "highest_cp_preced"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   400
    @{thm [display] highest_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   401
  \item The precedence of @{term "th"} is the highest precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   402
    in the system (@{text "highest_preced_thread"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   403
    @{thm [display] highest_preced_thread}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   404
  \item The current precedence of @{term "th"} is the highest current precedence 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   405
    in the system (@{text "highest'"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   406
    @{thm [display] highest'}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   407
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   408
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   409
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   410
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   411
  To analysis what happens after state @{term "s"} a sub-locale is defined, which 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   412
  assumes:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   413
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   414
  \item @{term "t"} is a valid extension of @{term "s"} (@{text "vt_t"}): @{thm vt_t}.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   415
  \item Any thread created in @{term "t"} has priority no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   416
    its precedence can not be higher than @{term "th"},  therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   417
    @{term "th"} remain to be the one with the highest precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   418
    (@{text "create_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   419
    @{thm [display] create_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   420
  \item Any adjustment of priority in 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   421
    @{term "t"} does not happen to @{term "th"} and 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   422
    the priority set is no higher than @{term "prio"}, therefore
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   423
    @{term "th"} remain to be the one with the highest precedence (@{text "set_diff_low"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   424
    @{thm [display] set_diff_low}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   425
  \item Since we are investigating what happens to @{term "th"}, it is assumed 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   426
    @{term "th"} does not exit during @{term "t"} (@{text "exit_diff"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   427
    @{thm [display] exit_diff}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   428
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   429
*}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   430
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   431
text {* \noindent
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   432
  All these assumptions are put into a predicate @{term "extend_highest_gen"}. 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   433
  It can be proved that @{term "extend_highest_gen"} holds 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   434
  for any moment @{text "i"} in it @{term "t"} (@{text "red_moment"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   435
  @{thm [display] red_moment}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   436
  
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   437
  From this, an induction principle can be derived for @{text "t"}, so that 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   438
  properties already derived for @{term "t"} can be applied to any prefix 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   439
  of @{text "t"} in the proof of new properties 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   440
  about @{term "t"} (@{text "ind"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   441
  \begin{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   442
  @{thm[display] ind}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   443
  \end{center}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   444
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   445
  The following properties can be proved about @{term "th"} in @{term "t"}:
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   446
  \begin{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   447
  \item In @{term "t"}, thread @{term "th"} is kept live and its 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   448
    precedence is preserved as well
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   449
    (@{text "th_kept"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   450
    @{thm [display] th_kept}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   451
  \item In @{term "t"}, thread @{term "th"}'s precedence is always the maximum among 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   452
    all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   453
    (@{text "max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   454
    @{thm [display] max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   455
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum precedence
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   456
    among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   457
    (@{text "th_cp_max_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   458
    @{thm [display] th_cp_max_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   459
  \item In @{term "t"}, thread @{term "th"}'s current precedence is always the maximum current 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   460
    precedence among all living threads
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   461
    (@{text "th_cp_max"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   462
    @{thm [display] th_cp_max}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   463
  \item In @{term "t"}, thread @{term "th"}'s current precedence equals its precedence at moment 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   464
    @{term "s"}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   465
    (@{text "th_cp_preced"}): 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   466
    @{thm [display] th_cp_preced}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   467
  \end{enumerate}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   468
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   469
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   470
text {* \noindent
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   471
  The main theorem of this part is to characterizing the running thread during @{term "t"} 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   472
  (@{text "runing_inversion_2"}):
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   473
  @{thm [display] runing_inversion_2}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   474
  According to this, if a thread is running, it is either @{term "th"} or was
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   475
  already live and held some resource 
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   476
  at moment @{text "s"} (expressed by: @{text "cntV s th' < cntP s th'"}).
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   477
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   478
  Since there are only finite many threads live and holding some resource at any moment,
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   479
  if every such thread can release all its resources in finite duration, then after finite
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   480
  duration, none of them may block @{term "th"} anymore. So, no priority inversion may happen
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   481
  then.
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   482
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   483
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   484
(*<*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   485
end
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   486
(*>*)
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   487
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   488
section {* Properties to guide implementation \label{implement} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   489
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   490
text {*
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   491
  The properties (especially @{text "runing_inversion_2"}) convinced us that the model defined 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   492
  in Section \ref{model} does prevent indefinite priority inversion and therefore fulfills 
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   493
  the fundamental requirement of Priority Inheritance protocol. Another purpose of this paper 
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   494
  is to show how this model can be used to guide a concrete implementation. As discussed in
276
a821434474c9 more on intro
urbanc
parents: 275
diff changeset
   495
  Section 5.6.5 of \cite{Vahalia96}, the implementation of Priority Inheritance in Solaris 
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   496
  uses sophisticated linking data structure. Except discussing two scenarios to show how
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   497
  the data structure should be manipulated, a lot of details of the implementation are missing. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   498
  In \cite{Faria08,conf/fase/JahierHR09,WellingsBSB07} the protocol is described formally 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   499
  using different notations, but little information is given on how this protocol can be 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   500
  implemented efficiently, especially there is no information on how these data structure 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   501
  should be manipulated. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   502
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   503
  Because the scheduling of threads is based on current precedence, 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   504
  the central issue in implementation of Priority Inheritance is how to compute the precedence
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   505
  correctly and efficiently. As long as the precedence is correct, it is very easy to 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   506
  modify the scheduling algorithm to select the correct thread to execute. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   507
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   508
  First, it can be proved that the computation of current precedence @{term "cp"} of a threads
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   509
  only involves its children (@{text "cp_rec"}):
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   510
  @{thm [display] cp_rec} 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   511
  where @{term "children s th"} represents the set of children of @{term "th"} in the current
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   512
  RAG: 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   513
  \[
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   514
  @{thm (lhs) children_def} @{text "\<equiv>"} @{thm (rhs) children_def}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   515
  \]
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   516
  where the definition of @{term "child"} is: 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   517
  \[ @{thm (lhs) child_def} @{text "\<equiv>"}  @{thm (rhs) child_def}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   518
  \]
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   519
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   520
  The aim of this section is to fill the missing details of how current precedence should
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   521
  be changed with the happening of events, with each event type treated by one subsection,
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   522
  where the computation of @{term "cp"} uses lemma @{text "cp_rec"}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   523
  *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   524
 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   525
subsection {* Event @{text "Set th prio"} *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   526
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   527
(*<*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   528
context step_set_cps
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   529
begin
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   530
(*>*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   531
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   532
text {*
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   533
  The context under which event @{text "Set th prio"} happens is formalized as follows:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   534
  \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   535
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   536
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   537
      event @{text "Set th prio"} is eligible to happen under state @{term "s'"} and
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   538
      state @{term "s'"} is a valid state.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   539
  \end{enumerate}
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   540
  *}
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   541
266
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   542
text {* \noindent
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   543
  Under such a context, we investigated how the current precedence @{term "cp"} of 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   544
  threads change from state @{term "s'"} to @{term "s"} and obtained the following
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   545
  conclusions:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   546
  \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   547
  %% \item The RAG does not change (@{text "eq_dep"}): @{thm "eq_dep"}.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   548
  \item All threads with no dependence relation with thread @{term "th"} have their
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   549
    @{term "cp"}-value unchanged (@{text "eq_cp"}):
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   550
    @{thm [display] eq_cp}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   551
    This lemma implies the @{term "cp"}-value of @{term "th"}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   552
    and those threads which have a dependence relation with @{term "th"} might need
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   553
    to be recomputed. The way to do this is to start from @{term "th"} 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   554
    and follow the @{term "depend"}-chain to recompute the @{term "cp"}-value of every 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   555
    encountered thread using lemma @{text "cp_rec"}. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   556
    Since the @{term "depend"}-relation is loop free, this procedure 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   557
    can always stop. The the following lemma shows this procedure actually could stop earlier.
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   558
  \item The following two lemma shows, if a thread the re-computation of which
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   559
    gives an unchanged @{term "cp"}-value, the procedure described above can stop. 
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   560
    \begin{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   561
      \item Lemma @{text "eq_up_self"} shows if the re-computation of
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   562
        @{term "th"}'s @{term "cp"} gives the same result, the procedure can stop:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   563
        @{thm [display] eq_up_self}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   564
      \item Lemma @{text "eq_up"}) shows if the re-computation at intermediate threads
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   565
        gives unchanged result, the procedure can stop:
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   566
        @{thm [display] eq_up}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   567
  \end{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   568
  \end{enumerate}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   569
  *}
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   570
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   571
(*<*)
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   572
end
800b0e3b4204 More explanations added by XY.
zhang
parents: 265
diff changeset
   573
(*>*)
264
24199eb2c423 Newer version.
zhang
parents: 262
diff changeset
   574
272
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   575
subsection {* Event @{text "V th cs"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   576
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   577
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   578
context step_v_cps_nt
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   579
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   580
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   581
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   582
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   583
  The context under which event @{text "V th cs"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   584
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   585
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   586
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   587
      event @{text "V th cs"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   588
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   589
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   590
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   591
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   592
text {* \noindent
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   593
  Under such a context, we investigated how the current precedence @{term "cp"} of 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   594
  threads change from state @{term "s'"} to @{term "s"}. 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   595
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   596
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   597
  Two subcases are considerted, 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   598
  where the first is that there exits @{term "th'"} 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   599
  such that 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   600
  @{thm [display] nt} 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   601
  holds, which means there exists a thread @{term "th'"} to take over
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   602
  the resource release by thread @{term "th"}. 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   603
  In this sub-case, the following results are obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   604
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   605
  \item The change of RAG is given by lemma @{text "depend_s"}: 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   606
  @{thm [display] "depend_s"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   607
  which shows two edges are removed while one is added. These changes imply how
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   608
  the current precedences should be re-computed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   609
  \item First all threads different from @{term "th"} and @{term "th'"} have their
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   610
  @{term "cp"}-value kept, therefore do not need a re-computation
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   611
  (@{text "cp_kept"}): @{thm [display] cp_kept}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   612
  This lemma also implies, only the @{term "cp"}-values of @{term "th"} and @{term "th'"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   613
  need to be recomputed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   614
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   615
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   616
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   617
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   618
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   619
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   620
context step_v_cps_nnt
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   621
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   622
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   623
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   624
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   625
  The other sub-case is when for all @{text "th'"}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   626
  @{thm [display] nnt}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   627
  holds, no such thread exists. The following results can be obtained for this 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   628
  sub-case:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   629
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   630
  \item The change of RAG is given by lemma @{text "depend_s"}:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   631
  @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   632
  which means only one edge is removed.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   633
  \item In this case, no re-computation is needed (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   634
  @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   635
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   636
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   637
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   638
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   639
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   640
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   641
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   642
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   643
subsection {* Event @{text "P th cs"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   644
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   645
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   646
context step_P_cps_e
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   647
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   648
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   649
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   650
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   651
  The context under which event @{text "P th cs"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   652
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   653
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   654
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   655
      event @{text "P th cs"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   656
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   657
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   658
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   659
  This case is further divided into two sub-cases. The first is when @{thm ee} holds.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   660
  The following results can be obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   661
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   662
  \item One edge is added to the RAG (@{text "depend_s"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   663
    @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   664
  \item No re-computation is needed (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   665
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   666
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   667
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   668
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   669
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   670
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   671
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   672
context step_P_cps_ne
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   673
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   674
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   675
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   676
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   677
  The second is when @{thm ne} holds.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   678
  The following results can be obtained:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   679
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   680
  \item One edge is added to the RAG (@{text "depend_s"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   681
    @{thm [display] depend_s}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   682
  \item Threads with no dependence relation with @{term "th"} do not need a re-computation
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   683
    of their @{term "cp"}-values (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   684
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   685
    This lemma implies all threads with a dependence relation with @{term "th"} may need 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   686
    re-computation.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   687
  \item Similar to the case of @{term "Set"}, the computation procedure could stop earlier
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   688
    (@{text "eq_up"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   689
    @{thm [display] eq_up}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   690
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   691
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   692
  *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   693
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   694
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   695
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   696
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   697
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   698
subsection {* Event @{text "Create th prio"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   699
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   700
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   701
context step_create_cps
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   702
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   703
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   704
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   705
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   706
  The context under which event @{text "Create th prio"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   707
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   708
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   709
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   710
      event @{text "Create th prio"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   711
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   712
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   713
  The following results can be obtained under this context:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   714
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   715
  \item The RAG does not change (@{text "eq_dep"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   716
    @{thm [display] eq_dep}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   717
  \item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   718
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   719
  \item The @{term "cp"}-value of @{term "th"} equals its precedence 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   720
    (@{text "eq_cp_th"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   721
    @{thm [display] eq_cp_th}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   722
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   723
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   724
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   725
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   726
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   727
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   728
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   729
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   730
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   731
subsection {* Event @{text "Exit th"} *}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   732
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   733
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   734
context step_exit_cps
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   735
begin
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   736
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   737
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   738
text {*
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   739
  The context under which event @{text "Exit th"} happens is formalized as follows:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   740
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   741
    \item The formation of @{term "s"} (@{text "s_def"}): @{thm s_def}.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   742
    \item State @{term "s"} is a valid state (@{text "vt_s"}): @{thm vt_s}. This implies 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   743
      event @{text "Exit th"} is eligible to happen under state @{term "s'"} and
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   744
      state @{term "s'"} is a valid state.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   745
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   746
  The following results can be obtained under this context:
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   747
  \begin{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   748
  \item The RAG does not change (@{text "eq_dep"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   749
    @{thm [display] eq_dep}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   750
  \item All threads other than @{term "th"} do not need re-computation (@{text "eq_cp"}):
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   751
    @{thm [display] eq_cp}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   752
  \end{enumerate}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   753
  Since @{term th} does not live in state @{term "s"}, there is no need to compute 
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   754
  its @{term cp}-value.
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   755
*}
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   756
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   757
(*<*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   758
end
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   759
(*>*)
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   760
ee4611c1e13c All comments added.
zhang
parents: 271
diff changeset
   761
262
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   762
section {* Related works \label{related} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   763
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   764
text {*
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   765
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   766
  \item {\em Integrating Priority Inheritance Algorithms in the Real-Time Specification for Java}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   767
    \cite{WellingsBSB07} models and verifies the combination of Priority Inheritance (PI) and 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   768
    Priority Ceiling Emulation (PCE) protocols in the setting of Java virtual machine 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   769
    using extended Timed Automata(TA) formalism of the UPPAAL tool. Although a detailed 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   770
    formal model of combined PI and PCE is given, the number of properties is quite 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   771
    small and the focus is put on the harmonious working of PI and PCE. Most key features of PI 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   772
    (as well as PCE) are not shown. Because of the limitation of the model checking technique
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   773
    used there, properties are shown only for a small number of scenarios. Therefore, 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   774
    the verification does not show the correctness of the formal model itself in a 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   775
    convincing way.  
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   776
  \item {\em Formal Development of Solutions for Real-Time Operating Systems with TLA+/TLC}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   777
    \cite{Faria08}. A formal model of PI is given in TLA+. Only 3 properties are shown 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   778
    for PI using model checking. The limitation of model checking is intrinsic to the work.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   779
  \item {\em Synchronous modeling and validation of priority inheritance schedulers}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   780
    \cite{conf/fase/JahierHR09}. Gives a formal model
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   781
    of PI and PCE in AADL (Architecture Analysis \& Design Language) and checked 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   782
    several properties using model checking. The number of properties shown there is 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   783
    less than here and the scale is also limited by the model checking technique. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   784
  \item {\em The Priority Ceiling Protocol: Formalization and Analysis Using PVS}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   785
    \cite{dutertre99b}. Formalized another protocol for Priority Inversion in the 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   786
    interactive theorem proving system PVS.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   787
\end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   788
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   789
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   790
  There are several works on inversion avoidance:
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   791
  \begin{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   792
  \item {\em Solving the group priority inversion problem in a timed asynchronous system}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   793
    \cite{Wang:2002:SGP}. The notion of Group Priority Inversion is introduced. The main 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   794
    strategy is still inversion avoidance. The method is by reordering requests 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   795
    in the setting of Client-Server.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   796
  \item {\em A Formalization of Priority Inversion} \cite{journals/rts/BabaogluMS93}. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   797
    Formalized the notion of Priority 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   798
    Inversion and proposes methods to avoid it. 
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   799
  \end{enumerate}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   800
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   801
  {\em Examples of inaccurate specification of the protocol ???}.
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   802
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   803
*}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   804
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   805
section {* Conclusions \label{conclusion} *}
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   806
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   807
(*<*)
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   808
end
4190df6f4488 initial version of the PIP formalisation
urbanc
parents:
diff changeset
   809
(*>*)