thys2/zre7.sc
changeset 391 549257d0b8b2
parent 390 d7f0153f5770
child 393 3954579ebdaf
equal deleted inserted replaced
390:d7f0153f5770 391:549257d0b8b2
    67 //          p       q
    67 //          p       q
    68 //          r
    68 //          r
    69 
    69 
    70 //parse r[p...q] --> v
    70 //parse r[p...q] --> v
    71 
    71 
    72 
    72 //(a+aa)*
       
    73 //aaa
       
    74 //[R(Sequ(a, a)), vs]
       
    75 //[L(a), L(a), vs]
    73 def check_before_down(c: Ctx, r: Rexp, d: Int = 0) : List[Zipper] = {
    76 def check_before_down(c: Ctx, r: Rexp, d: Int = 0) : List[Zipper] = {
    74     mems.get((pos, r)) match {
    77     mems.get((pos, r)) match {
    75         case Some(m) => 
    78         case Some(m) => 
    76             m.parents = c::Nil//c::m.parents
    79             //m.parents = c::m.parents
    77             m.result.find(tup2 => tup2._1 == pos) match {
    80             m.result.find(tup2 => tup2._1 == pos) match {
    78                 // case Some((i, v)) => 
    81                 // case Some((i, v)) => 
    79                 //   original_up(v, c, d)
    82                 //   original_up(v, c, d)
    80                 case None => 
    83                 case None => 
    81                   List()
    84                   List()
    85             mems = mems + ((pos, r) -> m)
    88             mems = mems + ((pos, r) -> m)
    86             original_down(r, m, d)
    89             original_down(r, m, d)
    87     }
    90     }
    88 }
    91 }
    89 
    92 
       
    93 //mems  pstart r  --> m parents [(pend, vres), ...]
       
    94 //aaa
       
    95 //012
       
    96 //seq a a 
       
    97 //0 a~a --> m ... [(2, Sequ a a)]
    90 
    98 
    91 
    99 
    92 def mem_up(vres: Val, m: Mem, rec_depth : Int = 0) : List[Zipper] = {
   100 def mem_up(vres: Val, m: Mem, rec_depth : Int = 0) : List[Zipper] = {
    93     m.result += (pos -> vres)
   101     m.result += (pos -> vres)
    94     m.parents.flatMap((c: Ctx) =>
   102     m.parents.flatMap((c: Ctx) =>
   339 
   347 
   340 //def crystalizeZipper
   348 //def crystalizeZipper
   341 
   349 
   342 mems.clear()
   350 mems.clear()
   343 val re1 = ("a" | "aa").%
   351 val re1 = ("a" | "aa").%
   344 val re1ss = lex(re1, "aa")
   352 val re1ss = lex(re1, "aaaaa")
   345 
   353 
   346 // drawZippers(re1ss)
   354 //drawZippers(re1ss)
   347 // println(actualZipperSize(re1ss))
   355 println(actualZipperSize(re1ss))
   348 // println(re1ss)
   356 //println(re1ss)
   349 //val re1S = zipperSimp(re1ss)
   357 val re1S = zipperSimp(re1ss)
   350 //println(actualZipperSize(re1S))
   358 //println(actualZipperSize(re1S))
   351 
   359 
   352 
   360 
   353 val re2 = SEQ(ONE, "a")
   361 // val re2 = SEQ(ONE, "a")
   354 val re2res = lex(re2, "a")
   362 // val re2res = lex(re2, "a")
   355 //lex(1~a, "a") --> lexRecurse((1v, m  (SeqC(m (RootC, Nil) ))))
   363 // //lex(1~a, "a") --> lexRecurse((1v, m  (SeqC(m (RootC, Nil), Nil, [1~a] ) )))
   356 
   364 
   357 
   365 
   358 println(re2res)
   366 // println(re2res)
   359 
   367 
   360 val re2resPlugged = plug_all(re2res)
   368 // val re2resPlugged = plug_all(re2res)
   361 re2resPlugged.foreach(v => {
   369 // re2resPlugged.foreach(v => {
   362         val Sequ(Empty, vp) = v
   370 //         val Sequ(Empty, vp) = v
   363         println(vp)
   371 //         println(vp)
   364 }
   372 // }
   365 )
   373 // )
   366 
   374 
   367 // println("remaining regex")
   375 // println("remaining regex")
   368 // println(re1ss.flatMap(z => zipBackMem(z._2)))
   376 // println(re1ss.flatMap(z => zipBackMem(z._2)))
   369 
   377 
   370 
   378