ExtGG.ty
author Christian Urban <christian dot urban at kcl dot ac dot uk>
Fri, 29 Jan 2016 17:06:02 +0000
changeset 97 c7ba70dc49bd
parent 87 33cb65e00ac0
permissions -rw-r--r--
merged
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
87
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
     1
theory ExtGG
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
     2
imports PrioG CpsG
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
     3
begin
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
     4
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
     5
text {* 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
     6
  The following two auxiliary lemmas are used to reason about @{term Max}.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
     7
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
     8
lemma image_Max_eqI: 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
     9
  assumes "finite B"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    10
  and "b \<in> B"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    11
  and "\<forall> x \<in> B. f x \<le> f b"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    12
  shows "Max (f ` B) = f b"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    13
  using assms
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    14
  using Max_eqI by blast 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    15
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    16
lemma image_Max_subset:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    17
  assumes "finite A"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    18
  and "B \<subseteq> A"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    19
  and "a \<in> B"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    20
  and "Max (f ` A) = f a"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    21
  shows "Max (f ` B) = f a"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    22
proof(rule image_Max_eqI)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    23
  show "finite B"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    24
    using assms(1) assms(2) finite_subset by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    25
next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    26
  show "a \<in> B" using assms by simp
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    27
next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    28
  show "\<forall>x\<in>B. f x \<le> f a"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    29
    by (metis Max_ge assms(1) assms(2) assms(4) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    30
            finite_imageI image_eqI subsetCE) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    31
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    32
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    33
text {*
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    34
  The following locale @{text "highest_gen"} sets the basic context for our
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    35
  investigation: supposing thread @{text th} holds the highest @{term cp}-value
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    36
  in state @{text s}, which means the task for @{text th} is the 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    37
  most urgent. We want to show that  
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    38
  @{text th} is treated correctly by PIP, which means
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    39
  @{text th} will not be blocked unreasonably by other less urgent
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    40
  threads. 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    41
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    42
locale highest_gen =
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    43
  fixes s th prio tm
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    44
  assumes vt_s: "vt s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    45
  and threads_s: "th \<in> threads s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    46
  and highest: "preced th s = Max ((cp s)`threads s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    47
  -- {* The internal structure of @{term th}'s precedence is exposed:*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    48
  and preced_th: "preced th s = Prc prio tm" 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    49
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    50
-- {* @{term s} is a valid trace, so it will inherit all results derived for
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    51
      a valid trace: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    52
sublocale highest_gen < vat_s: valid_trace "s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    53
  by (unfold_locales, insert vt_s, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    54
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    55
context highest_gen
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    56
begin
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    57
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    58
text {*
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    59
  @{term tm} is the time when the precedence of @{term th} is set, so 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    60
  @{term tm} must be a valid moment index into @{term s}.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    61
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    62
lemma lt_tm: "tm < length s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    63
  by (insert preced_tm_lt[OF threads_s preced_th], simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    64
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    65
text {*
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    66
  Since @{term th} holds the highest precedence and @{text "cp"}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    67
  is the highest precedence of all threads in the sub-tree of 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    68
  @{text "th"} and @{text th} is among these threads, 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    69
  its @{term cp} must equal to its precedence:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    70
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    71
lemma eq_cp_s_th: "cp s th = preced th s" (is "?L = ?R")
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    72
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    73
  have "?L \<le> ?R"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    74
  by (unfold highest, rule Max_ge, 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    75
        auto simp:threads_s finite_threads)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    76
  moreover have "?R \<le> ?L"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    77
    by (unfold vat_s.cp_rec, rule Max_ge, 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    78
        auto simp:the_preced_def vat_s.fsbttRAGs.finite_children)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    79
  ultimately show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    80
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    81
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    82
(* ccc *)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    83
lemma highest_cp_preced: "cp s th = Max ((\<lambda> th'. preced th' s) ` threads s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    84
  by (fold max_cp_eq, unfold eq_cp_s_th, insert highest, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    85
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    86
lemma highest_preced_thread: "preced th s = Max ((\<lambda> th'. preced th' s) ` threads s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    87
  by (fold eq_cp_s_th, unfold highest_cp_preced, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    88
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    89
lemma highest': "cp s th = Max (cp s ` threads s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    90
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    91
  from highest_cp_preced max_cp_eq[symmetric]
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    92
  show ?thesis by simp
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    93
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    94
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    95
end
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    96
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    97
locale extend_highest_gen = highest_gen + 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    98
  fixes t 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
    99
  assumes vt_t: "vt (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   100
  and create_low: "Create th' prio' \<in> set t \<Longrightarrow> prio' \<le> prio"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   101
  and set_diff_low: "Set th' prio' \<in> set t \<Longrightarrow> th' \<noteq> th \<and> prio' \<le> prio"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   102
  and exit_diff: "Exit th' \<in> set t \<Longrightarrow> th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   103
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   104
sublocale extend_highest_gen < vat_t: valid_trace "t@s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   105
  by (unfold_locales, insert vt_t, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   106
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   107
lemma step_back_vt_app: 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   108
  assumes vt_ts: "vt (t@s)" 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   109
  shows "vt s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   110
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   111
  from vt_ts show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   112
  proof(induct t)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   113
    case Nil
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   114
    from Nil show ?case by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   115
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   116
    case (Cons e t)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   117
    assume ih: " vt (t @ s) \<Longrightarrow> vt s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   118
      and vt_et: "vt ((e # t) @ s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   119
    show ?case
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   120
    proof(rule ih)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   121
      show "vt (t @ s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   122
      proof(rule step_back_vt)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   123
        from vt_et show "vt (e # t @ s)" by simp
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   124
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   125
    qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   126
  qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   127
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   128
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   129
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   130
locale red_extend_highest_gen = extend_highest_gen +
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   131
   fixes i::nat
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   132
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   133
sublocale red_extend_highest_gen <   red_moment: extend_highest_gen "s" "th" "prio" "tm" "(moment i t)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   134
  apply (insert extend_highest_gen_axioms, subst (asm) (1) moment_restm_s [of i t, symmetric])
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   135
  apply (unfold extend_highest_gen_def extend_highest_gen_axioms_def, clarsimp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   136
  by (unfold highest_gen_def, auto dest:step_back_vt_app)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   137
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   138
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   139
context extend_highest_gen
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   140
begin
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   141
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   142
 lemma ind [consumes 0, case_names Nil Cons, induct type]:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   143
  assumes 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   144
    h0: "R []"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   145
  and h2: "\<And> e t. \<lbrakk>vt (t@s); step (t@s) e; 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   146
                    extend_highest_gen s th prio tm t; 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   147
                    extend_highest_gen s th prio tm (e#t); R t\<rbrakk> \<Longrightarrow> R (e#t)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   148
  shows "R t"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   149
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   150
  from vt_t extend_highest_gen_axioms show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   151
  proof(induct t)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   152
    from h0 show "R []" .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   153
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   154
    case (Cons e t')
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   155
    assume ih: "\<lbrakk>vt (t' @ s); extend_highest_gen s th prio tm t'\<rbrakk> \<Longrightarrow> R t'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   156
      and vt_e: "vt ((e # t') @ s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   157
      and et: "extend_highest_gen s th prio tm (e # t')"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   158
    from vt_e and step_back_step have stp: "step (t'@s) e" by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   159
    from vt_e and step_back_vt have vt_ts: "vt (t'@s)" by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   160
    show ?case
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   161
    proof(rule h2 [OF vt_ts stp _ _ _ ])
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   162
      show "R t'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   163
      proof(rule ih)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   164
        from et show ext': "extend_highest_gen s th prio tm t'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   165
          by (unfold extend_highest_gen_def extend_highest_gen_axioms_def, auto dest:step_back_vt)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   166
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   167
        from vt_ts show "vt (t' @ s)" .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   168
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   169
    next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   170
      from et show "extend_highest_gen s th prio tm (e # t')" .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   171
    next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   172
      from et show ext': "extend_highest_gen s th prio tm t'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   173
          by (unfold extend_highest_gen_def extend_highest_gen_axioms_def, auto dest:step_back_vt)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   174
    qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   175
  qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   176
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   177
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   178
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   179
lemma th_kept: "th \<in> threads (t @ s) \<and> 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   180
                 preced th (t@s) = preced th s" (is "?Q t") 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   181
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   182
  show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   183
  proof(induct rule:ind)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   184
    case Nil
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   185
    from threads_s
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   186
    show ?case
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   187
      by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   188
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   189
    case (Cons e t)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   190
    interpret h_e: extend_highest_gen _ _ _ _ "(e # t)" using Cons by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   191
    interpret h_t: extend_highest_gen _ _ _ _ t using Cons by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   192
    show ?case
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   193
    proof(cases e)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   194
      case (Create thread prio)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   195
      show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   196
      proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   197
        from Cons and Create have "step (t@s) (Create thread prio)" by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   198
        hence "th \<noteq> thread"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   199
        proof(cases)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   200
          case thread_create
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   201
          with Cons show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   202
        qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   203
        hence "preced th ((e # t) @ s)  = preced th (t @ s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   204
          by (unfold Create, auto simp:preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   205
        moreover note Cons
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   206
        ultimately show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   207
          by (auto simp:Create)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   208
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   209
    next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   210
      case (Exit thread)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   211
      from h_e.exit_diff and Exit
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   212
      have neq_th: "thread \<noteq> th" by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   213
      with Cons
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   214
      show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   215
        by (unfold Exit, auto simp:preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   216
    next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   217
      case (P thread cs)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   218
      with Cons
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   219
      show ?thesis 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   220
        by (auto simp:P preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   221
    next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   222
      case (V thread cs)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   223
      with Cons
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   224
      show ?thesis 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   225
        by (auto simp:V preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   226
    next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   227
      case (Set thread prio')
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   228
      show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   229
      proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   230
        from h_e.set_diff_low and Set
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   231
        have "th \<noteq> thread" by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   232
        hence "preced th ((e # t) @ s)  = preced th (t @ s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   233
          by (unfold Set, auto simp:preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   234
        moreover note Cons
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   235
        ultimately show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   236
          by (auto simp:Set)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   237
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   238
    qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   239
  qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   240
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   241
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   242
text {*
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   243
  According to @{thm th_kept}, thread @{text "th"} has its living status
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   244
  and precedence kept along the way of @{text "t"}. The following lemma
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   245
  shows that this preserved precedence of @{text "th"} remains as the highest
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   246
  along the way of @{text "t"}.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   247
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   248
  The proof goes by induction over @{text "t"} using the specialized
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   249
  induction rule @{thm ind}, followed by case analysis of each possible 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   250
  operations of PIP. All cases follow the same pattern rendered by the 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   251
  generalized introduction rule @{thm "image_Max_eqI"}. 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   252
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   253
  The very essence is to show that precedences, no matter whether they are newly introduced 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   254
  or modified, are always lower than the one held by @{term "th"},
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   255
  which by @{thm th_kept} is preserved along the way.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   256
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   257
lemma max_kept: "Max (the_preced (t @ s) ` (threads (t@s))) = preced th s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   258
proof(induct rule:ind)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   259
  case Nil
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   260
  from highest_preced_thread
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   261
  show ?case
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   262
    by (unfold the_preced_def, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   263
next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   264
  case (Cons e t)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   265
    interpret h_e: extend_highest_gen _ _ _ _ "(e # t)" using Cons by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   266
    interpret h_t: extend_highest_gen _ _ _ _ t using Cons by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   267
  show ?case
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   268
  proof(cases e)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   269
    case (Create thread prio')
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   270
    show ?thesis (is "Max (?f ` ?A) = ?t")
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   271
    proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   272
      -- {* The following is the common pattern of each branch of the case analysis. *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   273
      -- {* The major part is to show that @{text "th"} holds the highest precedence: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   274
      have "Max (?f ` ?A) = ?f th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   275
      proof(rule image_Max_eqI)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   276
        show "finite ?A" using h_e.finite_threads by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   277
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   278
        show "th \<in> ?A" using h_e.th_kept by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   279
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   280
        show "\<forall>x\<in>?A. ?f x \<le> ?f th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   281
        proof 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   282
          fix x
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   283
          assume "x \<in> ?A"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   284
          hence "x = thread \<or> x \<in> threads (t@s)" by (auto simp:Create)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   285
          thus "?f x \<le> ?f th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   286
          proof
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   287
            assume "x = thread"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   288
            thus ?thesis 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   289
              apply (simp add:Create the_preced_def preced_def, fold preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   290
              using Create h_e.create_low h_t.th_kept lt_tm preced_leI2 preced_th by force
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   291
          next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   292
            assume h: "x \<in> threads (t @ s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   293
            from Cons(2)[unfolded Create] 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   294
            have "x \<noteq> thread" using h by (cases, auto)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   295
            hence "?f x = the_preced (t@s) x" 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   296
              by (simp add:Create the_preced_def preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   297
            hence "?f x \<le> Max (the_preced (t@s) ` threads (t@s))"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   298
              by (simp add: h_t.finite_threads h)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   299
            also have "... = ?f th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   300
              by (metis Cons.hyps(5) h_e.th_kept the_preced_def) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   301
            finally show ?thesis .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   302
          qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   303
        qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   304
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   305
     -- {* The minor part is to show that the precedence of @{text "th"} 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   306
           equals to preserved one, given by the foregoing lemma @{thm th_kept} *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   307
      also have "... = ?t" using h_e.th_kept the_preced_def by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   308
      -- {* Then it follows trivially that the precedence preserved
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   309
            for @{term "th"} remains the maximum of all living threads along the way. *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   310
      finally show ?thesis .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   311
    qed 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   312
  next 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   313
    case (Exit thread)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   314
    show ?thesis (is "Max (?f ` ?A) = ?t")
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   315
    proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   316
      have "Max (?f ` ?A) = ?f th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   317
      proof(rule image_Max_eqI)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   318
        show "finite ?A" using h_e.finite_threads by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   319
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   320
        show "th \<in> ?A" using h_e.th_kept by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   321
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   322
        show "\<forall>x\<in>?A. ?f x \<le> ?f th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   323
        proof 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   324
          fix x
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   325
          assume "x \<in> ?A"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   326
          hence "x \<in> threads (t@s)" by (simp add: Exit) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   327
          hence "?f x \<le> Max (?f ` threads (t@s))" 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   328
            by (simp add: h_t.finite_threads) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   329
          also have "... \<le> ?f th" 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   330
            apply (simp add:Exit the_preced_def preced_def, fold preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   331
            using Cons.hyps(5) h_t.th_kept the_preced_def by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   332
          finally show "?f x \<le> ?f th" .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   333
        qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   334
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   335
      also have "... = ?t" using h_e.th_kept the_preced_def by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   336
      finally show ?thesis .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   337
    qed 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   338
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   339
    case (P thread cs)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   340
    with Cons
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   341
    show ?thesis by (auto simp:preced_def the_preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   342
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   343
    case (V thread cs)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   344
    with Cons
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   345
    show ?thesis by (auto simp:preced_def the_preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   346
  next 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   347
    case (Set thread prio')
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   348
    show ?thesis (is "Max (?f ` ?A) = ?t")
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   349
    proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   350
      have "Max (?f ` ?A) = ?f th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   351
      proof(rule image_Max_eqI)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   352
        show "finite ?A" using h_e.finite_threads by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   353
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   354
        show "th \<in> ?A" using h_e.th_kept by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   355
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   356
        show "\<forall>x\<in>?A. ?f x \<le> ?f th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   357
        proof 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   358
          fix x
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   359
          assume h: "x \<in> ?A"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   360
          show "?f x \<le> ?f th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   361
          proof(cases "x = thread")
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   362
            case True
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   363
            moreover have "the_preced (Set thread prio' # t @ s) thread \<le> the_preced (t @ s) th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   364
            proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   365
              have "the_preced (t @ s) th = Prc prio tm"  
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   366
                using h_t.th_kept preced_th by (simp add:the_preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   367
              moreover have "prio' \<le> prio" using Set h_e.set_diff_low by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   368
              ultimately show ?thesis by (insert lt_tm, auto simp:the_preced_def preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   369
            qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   370
            ultimately show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   371
              by (unfold Set, simp add:the_preced_def preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   372
          next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   373
            case False
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   374
            then have "?f x  = the_preced (t@s) x"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   375
              by (simp add:the_preced_def preced_def Set)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   376
            also have "... \<le> Max (the_preced (t@s) ` threads (t@s))"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   377
              using Set h h_t.finite_threads by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   378
            also have "... = ?f th" by (metis Cons.hyps(5) h_e.th_kept the_preced_def) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   379
            finally show ?thesis .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   380
          qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   381
        qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   382
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   383
      also have "... = ?t" using h_e.th_kept the_preced_def by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   384
      finally show ?thesis .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   385
    qed 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   386
  qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   387
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   388
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   389
lemma max_preced: "preced th (t@s) = Max (the_preced (t@s) ` (threads (t@s)))"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   390
  by (insert th_kept max_kept, auto)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   391
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   392
text {*
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   393
  The reason behind the following lemma is that:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   394
  Since @{term "cp"} is defined as the maximum precedence 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   395
  of those threads contained in the sub-tree of node @{term "Th th"} 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   396
  in @{term "RAG (t@s)"}, and all these threads are living threads, and 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   397
  @{term "th"} is also among them, the maximum precedence of 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   398
  them all must be the one for @{text "th"}.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   399
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   400
lemma th_cp_max_preced: 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   401
  "cp (t@s) th = Max (the_preced (t@s) ` (threads (t@s)))" (is "?L = ?R") 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   402
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   403
  let ?f = "the_preced (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   404
  have "?L = ?f th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   405
  proof(unfold cp_alt_def, rule image_Max_eqI)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   406
    show "finite {th'. Th th' \<in> subtree (RAG (t @ s)) (Th th)}"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   407
    proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   408
      have "{th'. Th th' \<in> subtree (RAG (t @ s)) (Th th)} = 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   409
            the_thread ` {n . n \<in> subtree (RAG (t @ s)) (Th th) \<and>
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   410
                            (\<exists> th'. n = Th th')}"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   411
      by (smt Collect_cong Setcompr_eq_image mem_Collect_eq the_thread.simps)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   412
      moreover have "finite ..." by (simp add: vat_t.fsbtRAGs.finite_subtree) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   413
      ultimately show ?thesis by simp
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   414
    qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   415
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   416
    show "th \<in> {th'. Th th' \<in> subtree (RAG (t @ s)) (Th th)}"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   417
      by (auto simp:subtree_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   418
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   419
    show "\<forall>x\<in>{th'. Th th' \<in> subtree (RAG (t @ s)) (Th th)}.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   420
               the_preced (t @ s) x \<le> the_preced (t @ s) th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   421
    proof
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   422
      fix th'
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   423
      assume "th' \<in> {th'. Th th' \<in> subtree (RAG (t @ s)) (Th th)}"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   424
      hence "Th th' \<in> subtree (RAG (t @ s)) (Th th)" by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   425
      moreover have "... \<subseteq> Field (RAG (t @ s)) \<union> {Th th}"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   426
        by (meson subtree_Field)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   427
      ultimately have "Th th' \<in> ..." by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   428
      hence "th' \<in> threads (t@s)" 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   429
      proof
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   430
        assume "Th th' \<in> {Th th}"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   431
        thus ?thesis using th_kept by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   432
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   433
        assume "Th th' \<in> Field (RAG (t @ s))"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   434
        thus ?thesis using vat_t.not_in_thread_isolated by blast 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   435
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   436
      thus "the_preced (t @ s) th' \<le> the_preced (t @ s) th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   437
        by (metis Max_ge finite_imageI finite_threads image_eqI 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   438
               max_kept th_kept the_preced_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   439
    qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   440
  qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   441
  also have "... = ?R" by (simp add: max_preced the_preced_def) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   442
  finally show ?thesis .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   443
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   444
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   445
lemma th_cp_max: "cp (t@s) th = Max (cp (t@s) ` threads (t@s))"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   446
  using max_cp_eq th_cp_max_preced the_preced_def vt_t by presburger
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   447
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   448
lemma th_cp_preced: "cp (t@s) th = preced th s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   449
  by (fold max_kept, unfold th_cp_max_preced, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   450
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   451
lemma preced_less:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   452
  assumes th'_in: "th' \<in> threads s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   453
  and neq_th': "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   454
  shows "preced th' s < preced th s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   455
  using assms
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   456
by (metis Max.coboundedI finite_imageI highest not_le order.trans 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   457
    preced_linorder rev_image_eqI threads_s vat_s.finite_threads 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   458
    vat_s.le_cp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   459
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   460
text {*
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   461
  Counting of the number of @{term "P"} and @{term "V"} operations 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   462
  is the cornerstone of a large number of the following proofs. 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   463
  The reason is that this counting is quite easy to calculate and 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   464
  convenient to use in the reasoning. 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   465
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   466
  The following lemma shows that the counting controls whether 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   467
  a thread is running or not.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   468
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   469
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   470
lemma pv_blocked_pre:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   471
  assumes th'_in: "th' \<in> threads (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   472
  and neq_th': "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   473
  and eq_pv: "cntP (t@s) th' = cntV (t@s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   474
  shows "th' \<notin> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   475
proof
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   476
  assume otherwise: "th' \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   477
  show False
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   478
  proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   479
    have "th' = th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   480
    proof(rule preced_unique)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   481
      show "preced th' (t @ s) = preced th (t @ s)" (is "?L = ?R")
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   482
      proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   483
        have "?L = cp (t@s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   484
          by (unfold cp_eq_cpreced cpreced_def count_eq_dependants[OF eq_pv], simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   485
        also have "... = cp (t @ s) th" using otherwise 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   486
          by (metis (mono_tags, lifting) mem_Collect_eq 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   487
                    runing_def th_cp_max vat_t.max_cp_readys_threads)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   488
        also have "... = ?R" by (metis th_cp_preced th_kept) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   489
        finally show ?thesis .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   490
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   491
    qed (auto simp: th'_in th_kept)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   492
    moreover have "th' \<noteq> th" using neq_th' .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   493
    ultimately show ?thesis by simp
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   494
 qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   495
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   496
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   497
lemmas pv_blocked = pv_blocked_pre[folded detached_eq]
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   498
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   499
lemma runing_precond_pre:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   500
  fixes th'
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   501
  assumes th'_in: "th' \<in> threads s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   502
  and eq_pv: "cntP s th' = cntV s th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   503
  and neq_th': "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   504
  shows "th' \<in> threads (t@s) \<and>
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   505
         cntP (t@s) th' = cntV (t@s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   506
proof(induct rule:ind)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   507
  case (Cons e t)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   508
    interpret vat_t: extend_highest_gen s th prio tm t using Cons by simp
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   509
    interpret vat_e: extend_highest_gen s th prio tm "(e # t)" using Cons by simp
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   510
    show ?case
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   511
    proof(cases e)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   512
      case (P thread cs)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   513
      show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   514
      proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   515
        have "cntP ((e # t) @ s) th' = cntV ((e # t) @ s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   516
        proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   517
          have "thread \<noteq> th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   518
          proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   519
            have "step (t@s) (P thread cs)" using Cons P by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   520
            thus ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   521
            proof(cases)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   522
              assume "thread \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   523
              moreover have "th' \<notin> runing (t@s)" using Cons(5)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   524
                by (metis neq_th' vat_t.pv_blocked_pre) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   525
              ultimately show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   526
            qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   527
          qed with Cons show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   528
            by (unfold P, simp add:cntP_def cntV_def count_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   529
        qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   530
        moreover have "th' \<in> threads ((e # t) @ s)" using Cons by (unfold P, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   531
        ultimately show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   532
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   533
    next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   534
      case (V thread cs)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   535
      show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   536
      proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   537
        have "cntP ((e # t) @ s) th' = cntV ((e # t) @ s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   538
        proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   539
          have "thread \<noteq> th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   540
          proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   541
            have "step (t@s) (V thread cs)" using Cons V by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   542
            thus ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   543
            proof(cases)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   544
              assume "thread \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   545
              moreover have "th' \<notin> runing (t@s)" using Cons(5)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   546
                by (metis neq_th' vat_t.pv_blocked_pre) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   547
              ultimately show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   548
            qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   549
          qed with Cons show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   550
            by (unfold V, simp add:cntP_def cntV_def count_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   551
        qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   552
        moreover have "th' \<in> threads ((e # t) @ s)" using Cons by (unfold V, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   553
        ultimately show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   554
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   555
    next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   556
      case (Create thread prio')
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   557
      show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   558
      proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   559
        have "cntP ((e # t) @ s) th' = cntV ((e # t) @ s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   560
        proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   561
          have "thread \<noteq> th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   562
          proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   563
            have "step (t@s) (Create thread prio')" using Cons Create by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   564
            thus ?thesis using Cons(5) by (cases, auto)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   565
          qed with Cons show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   566
            by (unfold Create, simp add:cntP_def cntV_def count_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   567
        qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   568
        moreover have "th' \<in> threads ((e # t) @ s)" using Cons by (unfold Create, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   569
        ultimately show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   570
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   571
    next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   572
      case (Exit thread)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   573
      show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   574
      proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   575
        have neq_thread: "thread \<noteq> th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   576
        proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   577
          have "step (t@s) (Exit thread)" using Cons Exit by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   578
          thus ?thesis apply (cases) using Cons(5)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   579
                by (metis neq_th' vat_t.pv_blocked_pre) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   580
        qed 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   581
        hence "cntP ((e # t) @ s) th' = cntV ((e # t) @ s) th'" using Cons
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   582
            by (unfold Exit, simp add:cntP_def cntV_def count_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   583
        moreover have "th' \<in> threads ((e # t) @ s)" using Cons neq_thread 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   584
          by (unfold Exit, simp) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   585
        ultimately show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   586
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   587
    next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   588
      case (Set thread prio')
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   589
      with Cons
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   590
      show ?thesis 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   591
        by (auto simp:cntP_def cntV_def count_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   592
    qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   593
next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   594
  case Nil
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   595
  with assms
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   596
  show ?case by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   597
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   598
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   599
text {* Changing counting balance to detachedness *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   600
lemmas runing_precond_pre_dtc = runing_precond_pre
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   601
         [folded vat_t.detached_eq vat_s.detached_eq]
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   602
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   603
lemma runing_precond:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   604
  fixes th'
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   605
  assumes th'_in: "th' \<in> threads s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   606
  and neq_th': "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   607
  and is_runing: "th' \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   608
  shows "cntP s th' > cntV s th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   609
  using assms
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   610
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   611
  have "cntP s th' \<noteq> cntV s th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   612
    by (metis is_runing neq_th' pv_blocked_pre runing_precond_pre th'_in)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   613
  moreover have "cntV s th' \<le> cntP s th'" using vat_s.cnp_cnv_cncs by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   614
  ultimately show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   615
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   616
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   617
lemma moment_blocked_pre:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   618
  assumes neq_th': "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   619
  and th'_in: "th' \<in> threads ((moment i t)@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   620
  and eq_pv: "cntP ((moment i t)@s) th' = cntV ((moment i t)@s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   621
  shows "cntP ((moment (i+j) t)@s) th' = cntV ((moment (i+j) t)@s) th' \<and>
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   622
         th' \<in> threads ((moment (i+j) t)@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   623
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   624
  interpret h_i: red_extend_highest_gen _ _ _ _ _ i
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   625
      by (unfold_locales)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   626
  interpret h_j: red_extend_highest_gen _ _ _ _ _ "i+j"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   627
      by (unfold_locales)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   628
  interpret h:  extend_highest_gen "((moment i t)@s)" th prio tm "moment j (restm i t)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   629
  proof(unfold_locales)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   630
    show "vt (moment i t @ s)" by (metis h_i.vt_t) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   631
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   632
    show "th \<in> threads (moment i t @ s)" by (metis h_i.th_kept)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   633
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   634
    show "preced th (moment i t @ s) = 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   635
            Max (cp (moment i t @ s) ` threads (moment i t @ s))"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   636
              by (metis h_i.th_cp_max h_i.th_cp_preced h_i.th_kept)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   637
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   638
    show "preced th (moment i t @ s) = Prc prio tm" by (metis h_i.th_kept preced_th) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   639
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   640
    show "vt (moment j (restm i t) @ moment i t @ s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   641
      using moment_plus_split by (metis add.commute append_assoc h_j.vt_t)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   642
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   643
    fix th' prio'
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   644
    assume "Create th' prio' \<in> set (moment j (restm i t))"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   645
    thus "prio' \<le> prio" using assms
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   646
       by (metis Un_iff add.commute h_j.create_low moment_plus_split set_append)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   647
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   648
    fix th' prio'
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   649
    assume "Set th' prio' \<in> set (moment j (restm i t))"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   650
    thus "th' \<noteq> th \<and> prio' \<le> prio"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   651
    by (metis Un_iff add.commute h_j.set_diff_low moment_plus_split set_append)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   652
  next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   653
    fix th'
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   654
    assume "Exit th' \<in> set (moment j (restm i t))"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   655
    thus "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   656
      by (metis Un_iff add.commute h_j.exit_diff moment_plus_split set_append)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   657
  qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   658
  show ?thesis 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   659
    by (metis add.commute append_assoc eq_pv h.runing_precond_pre
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   660
          moment_plus_split neq_th' th'_in)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   661
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   662
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   663
lemma moment_blocked_eqpv:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   664
  assumes neq_th': "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   665
  and th'_in: "th' \<in> threads ((moment i t)@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   666
  and eq_pv: "cntP ((moment i t)@s) th' = cntV ((moment i t)@s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   667
  and le_ij: "i \<le> j"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   668
  shows "cntP ((moment j t)@s) th' = cntV ((moment j t)@s) th' \<and>
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   669
         th' \<in> threads ((moment j t)@s) \<and>
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   670
         th' \<notin> runing ((moment j t)@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   671
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   672
  from moment_blocked_pre [OF neq_th' th'_in eq_pv, of "j-i"] and le_ij
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   673
  have h1: "cntP ((moment j t)@s) th' = cntV ((moment j t)@s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   674
   and h2: "th' \<in> threads ((moment j t)@s)" by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   675
  moreover have "th' \<notin> runing ((moment j t)@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   676
  proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   677
    interpret h: red_extend_highest_gen _ _ _ _ _ j by (unfold_locales)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   678
    show ?thesis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   679
      using h.pv_blocked_pre h1 h2 neq_th' by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   680
  qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   681
  ultimately show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   682
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   683
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   684
(* The foregoing two lemmas are preparation for this one, but
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   685
   in long run can be combined. Maybe I am wrong.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   686
*)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   687
lemma moment_blocked:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   688
  assumes neq_th': "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   689
  and th'_in: "th' \<in> threads ((moment i t)@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   690
  and dtc: "detached (moment i t @ s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   691
  and le_ij: "i \<le> j"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   692
  shows "detached (moment j t @ s) th' \<and>
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   693
         th' \<in> threads ((moment j t)@s) \<and>
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   694
         th' \<notin> runing ((moment j t)@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   695
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   696
  interpret h_i: red_extend_highest_gen _ _ _ _ _ i by (unfold_locales)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   697
  interpret h_j: red_extend_highest_gen _ _ _ _ _ j by (unfold_locales) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   698
  have cnt_i: "cntP (moment i t @ s) th' = cntV (moment i t @ s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   699
                by (metis dtc h_i.detached_elim)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   700
  from moment_blocked_eqpv[OF neq_th' th'_in cnt_i le_ij]
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   701
  show ?thesis by (metis h_j.detached_intro) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   702
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   703
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   704
lemma runing_preced_inversion:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   705
  assumes runing': "th' \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   706
  shows "cp (t@s) th' = preced th s" (is "?L = ?R")
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   707
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   708
  have "?L = Max (cp (t @ s) ` readys (t @ s))" using assms
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   709
      by (unfold runing_def, auto)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   710
  also have "\<dots> = ?R"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   711
      by (metis th_cp_max th_cp_preced vat_t.max_cp_readys_threads) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   712
  finally show ?thesis .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   713
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   714
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   715
text {*
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   716
  The situation when @{term "th"} is blocked is analyzed by the following lemmas.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   717
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   718
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   719
text {*
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   720
  The following lemmas shows the running thread @{text "th'"}, if it is different from
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   721
  @{term th}, must be live at the very beginning. By the term {\em the very beginning},
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   722
  we mean the moment where the formal investigation starts, i.e. the moment (or state)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   723
  @{term s}. 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   724
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   725
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   726
lemma runing_inversion_0:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   727
  assumes neq_th': "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   728
  and runing': "th' \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   729
  shows "th' \<in> threads s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   730
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   731
    -- {* The proof is by contradiction: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   732
    { assume otherwise: "\<not> ?thesis"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   733
      have "th' \<notin> runing (t @ s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   734
      proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   735
        -- {* Since @{term "th'"} is running at time @{term "t@s"}, so it exists that time. *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   736
        have th'_in: "th' \<in> threads (t@s)" using runing' by (simp add:runing_def readys_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   737
        -- {* However, @{text "th'"} does not exist at very beginning. *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   738
        have th'_notin: "th' \<notin> threads (moment 0 t @ s)" using otherwise
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   739
          by (metis append.simps(1) moment_zero)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   740
        -- {* Therefore, there must be a moment during @{text "t"}, when 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   741
              @{text "th'"} came into being. *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   742
        -- {* Let us suppose the moment being @{text "i"}: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   743
        from p_split_gen[OF th'_in th'_notin]
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   744
        obtain i where lt_its: "i < length t"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   745
                 and le_i: "0 \<le> i"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   746
                 and pre: " th' \<notin> threads (moment i t @ s)" (is "th' \<notin> threads ?pre")
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   747
                 and post: "(\<forall>i'>i. th' \<in> threads (moment i' t @ s))" by (auto)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   748
        interpret h_i: red_extend_highest_gen _ _ _ _ _ i by (unfold_locales)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   749
        interpret h_i': red_extend_highest_gen _ _ _ _ _ "(Suc i)" by (unfold_locales)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   750
        from lt_its have "Suc i \<le> length t" by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   751
        -- {* Let us also suppose the event which makes this change is @{text e}: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   752
        from moment_head[OF this] obtain e where 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   753
          eq_me: "moment (Suc i) t = e # moment i t" by blast
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   754
        hence "vt (e # (moment i t @ s))" by (metis append_Cons h_i'.vt_t) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   755
        hence "PIP (moment i t @ s) e" by (cases, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   756
        -- {* It can be derived that this event @{text "e"}, which 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   757
              gives birth to @{term "th'"} must be a @{term "Create"}: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   758
        from create_pre[OF this, of th']
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   759
        obtain prio where eq_e: "e = Create th' prio"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   760
            by (metis append_Cons eq_me lessI post pre) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   761
        have h1: "th' \<in> threads (moment (Suc i) t @ s)" using post by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   762
        have h2: "cntP (moment (Suc i) t @ s) th' = cntV (moment (Suc i) t@ s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   763
        proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   764
          have "cntP (moment i t@s) th' = cntV (moment i t@s) th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   765
            by (metis h_i.cnp_cnv_eq pre)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   766
          thus ?thesis by (simp add:eq_me eq_e cntP_def cntV_def count_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   767
        qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   768
        show ?thesis 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   769
          using moment_blocked_eqpv [OF neq_th' h1 h2, of "length t"] lt_its moment_ge
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   770
            by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   771
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   772
      with `th' \<in> runing (t@s)`
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   773
      have False by simp
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   774
    } thus ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   775
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   776
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   777
text {* 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   778
  The second lemma says, if the running thread @{text th'} is different from 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   779
  @{term th}, then this @{text th'} must in the possession of some resources
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   780
  at the very beginning. 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   781
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   782
  To ease the reasoning of resource possession of one particular thread, 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   783
  we used two auxiliary functions @{term cntV} and @{term cntP}, 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   784
  which are the counters of @{term P}-operations and 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   785
  @{term V}-operations respectively. 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   786
  If the number of @{term V}-operation is less than the number of 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   787
  @{term "P"}-operations, the thread must have some unreleased resource. 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   788
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   789
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   790
lemma runing_inversion_1: (* ddd *)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   791
  assumes neq_th': "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   792
  and runing': "th' \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   793
  -- {* thread @{term "th'"} is a live on in state @{term "s"} and 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   794
        it has some unreleased resource. *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   795
  shows "th' \<in> threads s \<and> cntV s th' < cntP s th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   796
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   797
  -- {* The proof is a simple composition of @{thm runing_inversion_0} and 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   798
        @{thm runing_precond}: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   799
  -- {* By applying @{thm runing_inversion_0} to assumptions,
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   800
        it can be shown that @{term th'} is live in state @{term s}: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   801
  have "th' \<in> threads s"  using runing_inversion_0[OF assms(1,2)] .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   802
  -- {* Then the thesis is derived easily by applying @{thm runing_precond}: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   803
  with runing_precond [OF this neq_th' runing'] show ?thesis by simp
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   804
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   805
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   806
text {* 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   807
  The following lemma is just a rephrasing of @{thm runing_inversion_1}:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   808
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   809
lemma runing_inversion_2:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   810
  assumes runing': "th' \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   811
  shows "th' = th \<or> (th' \<noteq> th \<and> th' \<in> threads s \<and> cntV s th' < cntP s th')"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   812
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   813
  from runing_inversion_1[OF _ runing']
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   814
  show ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   815
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   816
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   817
lemma runing_inversion_3:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   818
  assumes runing': "th' \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   819
  and neq_th: "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   820
  shows "th' \<in> threads s \<and> (cntV s th' < cntP s th' \<and> cp (t@s) th' = preced th s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   821
  by (metis neq_th runing' runing_inversion_2 runing_preced_inversion)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   822
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   823
lemma runing_inversion_4:
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   824
  assumes runing': "th' \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   825
  and neq_th: "th' \<noteq> th"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   826
  shows "th' \<in> threads s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   827
  and    "\<not>detached s th'"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   828
  and    "cp (t@s) th' = preced th s"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   829
  apply (metis neq_th runing' runing_inversion_2)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   830
  apply (metis neq_th pv_blocked runing' runing_inversion_2 runing_precond_pre_dtc)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   831
  by (metis neq_th runing' runing_inversion_3)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   832
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   833
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   834
text {* 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   835
  Suppose @{term th} is not running, it is first shown that
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   836
  there is a path in RAG leading from node @{term th} to another thread @{text "th'"} 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   837
  in the @{term readys}-set (So @{text "th'"} is an ancestor of @{term th}}).
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   838
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   839
  Now, since @{term readys}-set is non-empty, there must be
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   840
  one in it which holds the highest @{term cp}-value, which, by definition, 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   841
  is the @{term runing}-thread. However, we are going to show more: this running thread
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   842
  is exactly @{term "th'"}.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   843
     *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   844
lemma th_blockedE: (* ddd *)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   845
  assumes "th \<notin> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   846
  obtains th' where "Th th' \<in> ancestors (RAG (t @ s)) (Th th)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   847
                    "th' \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   848
proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   849
  -- {* According to @{thm vat_t.th_chain_to_ready}, either 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   850
        @{term "th"} is in @{term "readys"} or there is path leading from it to 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   851
        one thread in @{term "readys"}. *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   852
  have "th \<in> readys (t @ s) \<or> (\<exists>th'. th' \<in> readys (t @ s) \<and> (Th th, Th th') \<in> (RAG (t @ s))\<^sup>+)" 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   853
    using th_kept vat_t.th_chain_to_ready by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   854
  -- {* However, @{term th} can not be in @{term readys}, because otherwise, since 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   855
       @{term th} holds the highest @{term cp}-value, it must be @{term "runing"}. *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   856
  moreover have "th \<notin> readys (t@s)" 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   857
    using assms runing_def th_cp_max vat_t.max_cp_readys_threads by auto 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   858
  -- {* So, there must be a path from @{term th} to another thread @{text "th'"} in 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   859
        term @{term readys}: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   860
  ultimately obtain th' where th'_in: "th' \<in> readys (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   861
                          and dp: "(Th th, Th th') \<in> (RAG (t @ s))\<^sup>+" by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   862
  -- {* We are going to show that this @{term th'} is running. *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   863
  have "th' \<in> runing (t@s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   864
  proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   865
    -- {* We only need to show that this @{term th'} holds the highest @{term cp}-value: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   866
    have "cp (t@s) th' = Max (cp (t@s) ` readys (t@s))" (is "?L = ?R")
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   867
    proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   868
      have "?L =  Max ((the_preced (t @ s) \<circ> the_thread) ` subtree (tRAG (t @ s)) (Th th'))"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   869
        by (unfold cp_alt_def1, simp)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   870
      also have "... = (the_preced (t @ s) \<circ> the_thread) (Th th)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   871
      proof(rule image_Max_subset)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   872
        show "finite (Th ` (threads (t@s)))" by (simp add: vat_t.finite_threads)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   873
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   874
        show "subtree (tRAG (t @ s)) (Th th') \<subseteq> Th ` threads (t @ s)"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   875
          by (metis Range.intros dp trancl_range vat_t.range_in vat_t.subtree_tRAG_thread) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   876
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   877
        show "Th th \<in> subtree (tRAG (t @ s)) (Th th')" using dp
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   878
                    by (unfold tRAG_subtree_eq, auto simp:subtree_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   879
      next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   880
        show "Max ((the_preced (t @ s) \<circ> the_thread) ` Th ` threads (t @ s)) =
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   881
                      (the_preced (t @ s) \<circ> the_thread) (Th th)" (is "Max ?L = _")
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   882
        proof -
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   883
          have "?L = the_preced (t @ s) `  threads (t @ s)" 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   884
                     by (unfold image_comp, rule image_cong, auto)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   885
          thus ?thesis using max_preced the_preced_def by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   886
        qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   887
      qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   888
      also have "... = ?R"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   889
        using th_cp_max th_cp_preced th_kept 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   890
              the_preced_def vat_t.max_cp_readys_threads by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   891
      finally show ?thesis .
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   892
    qed 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   893
    -- {* Now, since @{term th'} holds the highest @{term cp} 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   894
          and we have already show it is in @{term readys},
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   895
          it is @{term runing} by definition. *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   896
    with `th' \<in> readys (t@s)` show ?thesis by (simp add: runing_def) 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   897
  qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   898
  -- {* It is easy to show @{term th'} is an ancestor of @{term th}: *}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   899
  moreover have "Th th' \<in> ancestors (RAG (t @ s)) (Th th)" 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   900
    using `(Th th, Th th') \<in> (RAG (t @ s))\<^sup>+` by (auto simp:ancestors_def)
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   901
  ultimately show ?thesis using that by metis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   902
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   903
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   904
text {*
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   905
  Now it is easy to see there is always a thread to run by case analysis
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   906
  on whether thread @{term th} is running: if the answer is Yes, the 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   907
  the running thread is obviously @{term th} itself; otherwise, the running
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   908
  thread is the @{text th'} given by lemma @{thm th_blockedE}.
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   909
*}
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   910
lemma live: "runing (t@s) \<noteq> {}"
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   911
proof(cases "th \<in> runing (t@s)") 
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   912
  case True thus ?thesis by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   913
next
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   914
  case False
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   915
  thus ?thesis using th_blockedE by auto
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   916
qed
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   917
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   918
end
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   919
end
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   920
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   921
33cb65e00ac0 Tracking ExtGG.thy etc., so that a update to 83 is possible.
zhangx
parents:
diff changeset
   922