thys/Spec.thy
changeset 286 804fbb227568
parent 279 f754a10875c7
child 287 95b3880d428f
equal deleted inserted replaced
285:acc027964d10 286:804fbb227568
   563 using assms unfolding LV_def
   563 using assms unfolding LV_def
   564 apply(induct rule: Posix.induct)
   564 apply(induct rule: Posix.induct)
   565 apply(auto simp add: intro!: Prf.intros elim!: Prf_elims)
   565 apply(auto simp add: intro!: Prf.intros elim!: Prf_elims)
   566 done
   566 done
   567 
   567 
       
   568 
   568 end
   569 end