thys3/src/BlexerSimp2.thy
author Chengsong
Fri, 24 Jun 2022 21:49:23 +0100
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theory BlexerSimp2
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  imports Blexer2 
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begin
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fun distinctWith :: "'a list \<Rightarrow> ('a \<Rightarrow> 'a \<Rightarrow> bool) \<Rightarrow> 'a set \<Rightarrow> 'a list"
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  where
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  "distinctWith [] eq acc = []"
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| "distinctWith (x # xs) eq acc = 
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     (if (\<exists> y \<in> acc. eq x y) then distinctWith xs eq acc 
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      else x # (distinctWith xs eq ({x} \<union> acc)))"
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fun eq1 ("_ ~1 _" [80, 80] 80) where  
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  "AZERO ~1 AZERO = True"
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| "(AONE bs1) ~1 (AONE bs2) = True"
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| "(ACHAR bs1 c) ~1 (ACHAR bs2 d) = (if c = d then True else False)"
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| "(ASEQs bs1 []) ~1 (ASEQs bs2 []) = True"
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| "(ASEQs bs1 (r1#rs1)) ~1 (ASEQs bs2 (r2#rs2)) = (r1 ~1 r2 \<and> ASEQs [] rs1 ~1 ASEQs [] rs2)"
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| "(AALTs bs1 []) ~1 (AALTs bs2 []) = True"
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| "(AALTs bs1 (r1 # rs1)) ~1 (AALTs bs2 (r2 # rs2)) = (r1 ~1 r2 \<and> (AALTs bs1 rs1) ~1 (AALTs bs2 rs2))"
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| "(ASTAR bs1 r1) ~1 (ASTAR bs2 r2) = r1 ~1 r2"
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| "_ ~1 _ = False"
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lemma eq1_L:
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  assumes "x ~1 y"
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  shows "L (erase x) = L (erase y)"
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  using assms
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  apply(induct rule: eq1.induct)
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  apply(auto elim: eq1.elims)
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    apply presburger
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   apply(case_tac rs1)
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    apply(simp)
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  apply (metis eq1.simps(28) erase.simps(8) neq_Nil_conv)
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   apply(simp)
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  apply (smt (verit, del_insts) L.simps(4) eq1.simps(22) erase.simps(9) erase_ASEQs list.exhaust)
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     apply(case_tac rs2)
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   apply(simp)
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  apply (metis eq1.simps(61) erase.simps(8) neq_Nil_conv)
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  apply(simp)
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  by (metis L.simps(4) eq1.simps(28) erase.simps(9) erase_ASEQs list.exhaust)
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fun flts :: "arexp list \<Rightarrow> arexp list"
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  where 
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  "flts [] = []"
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| "flts (AZERO # rs) = flts rs"
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| "flts ((AALTs bs  rs1) # rs) = (map (fuse bs) rs1) @ flts rs"
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| "flts (r1 # rs) = r1 # flts rs"
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fun fuses1 :: "bit list \<Rightarrow> arexp list \<Rightarrow> arexp list"
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  where
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  "fuses1 _ [] = []"
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| "fuses1 bs (r#rs) = (fuse bs r) # rs" 
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lemma fuses_length:
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  shows "length (fuses1 bs rs) < Suc (length rs)"
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  apply(induct bs rs rule:fuses1.induct)
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  apply(auto)
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  done
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function (sequential) del :: "arexp list \<Rightarrow> arexp list \<Rightarrow> arexp list"
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  where
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  "del [] acc = acc"
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| "del (AZERO#rs) acc = [AZERO]"
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| "del ((AONE bs)#rs) acc = del (fuses1 bs rs) acc"
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| "del ((ASEQs bs rs1)#rs2) acc = del rs2  (acc @ fuses1 bs rs1)" 
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| "del (r#rs) acc = del rs (acc @ [r])"
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by pat_completeness auto
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termination "del"  
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  apply(relation "inv_image (measure(%cs. size cs) <*lex*> measure(%s. size s)) (%(ds,r). (ds, r))") 
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  apply(auto simp add: fuses_length)
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  done
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fun bsimp_ASEQs :: "bit list \<Rightarrow> arexp list \<Rightarrow> arexp"
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  where
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  "bsimp_ASEQs _ [AZERO]  = AZERO"
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| "bsimp_ASEQs bs [] = AONE bs"
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| "bsimp_ASEQs bs [r] = fuse bs r"
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| "bsimp_ASEQs bs rs = ASEQs  bs rs"
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fun bsimp_AALTs :: "bit list \<Rightarrow> arexp list \<Rightarrow> arexp"
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  where
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  "bsimp_AALTs _ [] = AZERO"
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| "bsimp_AALTs bs1 [r] = fuse bs1 r"
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| "bsimp_AALTs bs1 rs = AALTs bs1 rs"
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fun bsimp :: "arexp \<Rightarrow> arexp" 
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  where
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  "bsimp (ASEQs bs1 rs) = bsimp_ASEQs bs1 (del (map bsimp rs) [])"
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| "bsimp (AALTs bs1 rs) = bsimp_AALTs bs1 (distinctWith (flts (map bsimp rs)) eq1 {}) "
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| "bsimp r = r"
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fun 
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  bders_simp :: "arexp \<Rightarrow> string \<Rightarrow> arexp"
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where
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  "bders_simp r [] = r"
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| "bders_simp r (c # s) = bders_simp (bsimp (bder c r)) s"
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definition blexer_simp where
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 "blexer_simp r s \<equiv> if bnullable (bders_simp (intern r) s) then 
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                    decode (bmkeps (bders_simp (intern r) s)) r else None"
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lemma bders_simp_append:
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  shows "bders_simp r (s1 @ s2) = bders_simp (bders_simp r s1) s2"
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  apply(induct s1 arbitrary: r s2)
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  apply(simp_all)
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  done
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lemma bmkeps_fuse:
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  assumes "bnullable r"
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  shows "bmkeps (fuse bs r) = bs @ bmkeps r"
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  using assms
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  by (induct r rule: bnullable.induct) (auto)
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lemma bmkepss_fuse: 
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  assumes "bnullables rs"
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  shows "bmkepss (map (fuse bs) rs) = bs @ bmkepss rs"
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  using assms
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  apply(induct rs arbitrary: bs)
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  apply(auto simp add: bmkeps_fuse bnullable_fuse)
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  done
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lemma bder_fuse:
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  shows "bder c (fuse bs a) = fuse bs  (bder c a)"
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  apply(induct c a arbitrary: bs  rule: bder.induct)
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         apply(simp_all)[6]
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  using fuse_append apply presburger
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  apply (metis bder.simps(7) fuse.simps(4) fuse.simps(5))
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  by simp
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inductive 
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  rrewrite:: "arexp \<Rightarrow> arexp \<Rightarrow> bool" ("_ \<leadsto> _" [99, 99] 99)
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and 
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  srewrite:: "arexp list \<Rightarrow> arexp list \<Rightarrow> bool" (" _ s\<leadsto> _" [100, 100] 100)
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where
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  bs1: "(\<exists>r \<in> set rs. r = AZERO) \<Longrightarrow> ASEQs bs rs \<leadsto> AZERO"
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| bs3: "ASEQs bs1 (rs1 @ [AONE bs2] @ rs2) \<leadsto> ASEQs bs1 (rs1 @ fuses1 bs2 rs2)"
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| bs4: "rs1 s\<leadsto> rs2 \<Longrightarrow> ASEQs bs rs1 \<leadsto> ASEQs bs rs2"
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| bs5: "r3 \<leadsto> r4 \<Longrightarrow> ASEQ bs r1 r3 \<leadsto> ASEQ bs r1 r4"
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| bs6: "AALTs bs [] \<leadsto> AZERO"
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| bs7: "AALTs bs [r] \<leadsto> fuse bs r"
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| bs10: "rs1 s\<leadsto> rs2 \<Longrightarrow> AALTs bs rs1 \<leadsto> AALTs bs rs2"
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| ss1:  "[] s\<leadsto> []"
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| ss2:  "rs1 s\<leadsto> rs2 \<Longrightarrow> (r # rs1) s\<leadsto> (r # rs2)"
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| ss3:  "r1 \<leadsto> r2 \<Longrightarrow> (r1 # rs) s\<leadsto> (r2 # rs)"
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| ss4:  "(AZERO # rs) s\<leadsto> rs"
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| ss5:  "(AALTs bs1 rs1 # rsb) s\<leadsto> ((map (fuse bs1) rs1) @ rsb)"
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| ss6:  "L (erase a2) \<subseteq> L (erase a1) \<Longrightarrow> (rsa@[a1]@rsb@[a2]@rsc) s\<leadsto> (rsa@[a1]@rsb@rsc)"
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inductive 
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  rrewrites:: "arexp \<Rightarrow> arexp \<Rightarrow> bool" ("_ \<leadsto>* _" [100, 100] 100)
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where 
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  rs1[intro, simp]:"r \<leadsto>* r"
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| rs2[intro]: "\<lbrakk>r1 \<leadsto>* r2; r2 \<leadsto> r3\<rbrakk> \<Longrightarrow> r1 \<leadsto>* r3"
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inductive 
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  srewrites:: "arexp list \<Rightarrow> arexp list \<Rightarrow> bool" ("_ s\<leadsto>* _" [100, 100] 100)
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where 
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  sss1[intro, simp]:"rs s\<leadsto>* rs"
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| sss2[intro]: "\<lbrakk>rs1 s\<leadsto> rs2; rs2 s\<leadsto>* rs3\<rbrakk> \<Longrightarrow> rs1 s\<leadsto>* rs3"
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lemma r_in_rstar : "r1 \<leadsto> r2 \<Longrightarrow> r1 \<leadsto>* r2"
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  using rrewrites.intros(1) rrewrites.intros(2) by blast
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lemma rs_in_rstar: 
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  shows "r1 s\<leadsto> r2 \<Longrightarrow> r1 s\<leadsto>* r2"
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  using rrewrites.intros(1) rrewrites.intros(2) by blast
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   184
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   185
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lemma rrewrites_trans[trans]: 
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  assumes a1: "r1 \<leadsto>* r2"  and a2: "r2 \<leadsto>* r3"
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  shows "r1 \<leadsto>* r3"
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   189
  using a2 a1
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  apply(induct r2 r3 arbitrary: r1 rule: rrewrites.induct) 
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  apply(auto)
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  done
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lemma srewrites_trans[trans]: 
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  assumes a1: "r1 s\<leadsto>* r2"  and a2: "r2 s\<leadsto>* r3"
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  shows "r1 s\<leadsto>* r3"
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   197
  using a1 a2
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  apply(induct r1 r2 arbitrary: r3 rule: srewrites.induct) 
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   apply(auto)
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   200
  done
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   201
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   202
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   203
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lemma contextrewrites0: 
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  "rs1 s\<leadsto>* rs2 \<Longrightarrow> AALTs bs rs1 \<leadsto>* AALTs bs rs2"
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  apply(induct rs1 rs2 rule: srewrites.inducts)
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   207
   apply simp
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  using bs10 r_in_rstar rrewrites_trans by blast
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   209
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lemma contextrewrites1: 
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  "r \<leadsto>* r' \<Longrightarrow> AALTs bs (r # rs) \<leadsto>* AALTs bs (r' # rs)"
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  apply(induct r r' rule: rrewrites.induct)
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   apply simp
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  using bs10 ss3 by blast
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   215
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lemma srewrite1: 
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  shows "rs1 s\<leadsto> rs2 \<Longrightarrow> (rs @ rs1) s\<leadsto> (rs @ rs2)"
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  apply(induct rs)
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   apply(auto)
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   220
  using ss2 by auto
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   221
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lemma srewrites1: 
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  shows "rs1 s\<leadsto>* rs2 \<Longrightarrow> (rs @ rs1) s\<leadsto>* (rs @ rs2)"
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   224
  apply(induct rs1 rs2 rule: srewrites.induct)
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   225
   apply(auto)
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   226
  using srewrite1 by blast
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   227
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   228
lemma srewrite2: 
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  shows  "r1 \<leadsto> r2 \<Longrightarrow> True"
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   230
  and "rs1 s\<leadsto> rs2 \<Longrightarrow> (rs1 @ rs) s\<leadsto>* (rs2 @ rs)"
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   231
  apply(induct rule: rrewrite_srewrite.inducts)
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   232
  apply(auto)
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   233
  apply (metis append_Cons append_Nil srewrites1)
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   234
  apply(meson srewrites.simps ss3)
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   235
  apply (meson srewrites.simps ss4)
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   236
  apply (meson srewrites.simps ss5)
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   237
  by (metis append_Cons append_Nil srewrites.simps ss6)
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diff changeset
   238
  
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   239
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   240
lemma srewrites3: 
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   241
  shows "rs1 s\<leadsto>* rs2 \<Longrightarrow> (rs1 @ rs) s\<leadsto>* (rs2 @ rs)"
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   242
  apply(induct rs1 rs2 arbitrary: rs rule: srewrites.induct)
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   243
   apply(auto)
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   244
  by (meson srewrite2(2) srewrites_trans)
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diff changeset
   245
a4b86ced5c32 rewrite rules modified slightly
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   246
(*
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   247
lemma srewrites4:
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  assumes "rs3 s\<leadsto>* rs4" "rs1 s\<leadsto>* rs2" 
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   249
  shows "(rs1 @ rs3) s\<leadsto>* (rs2 @ rs4)"
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   250
  using assms
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   251
  apply(induct rs3 rs4 arbitrary: rs1 rs2 rule: srewrites.induct)
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   252
  apply (simp add: srewrites3)
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diff changeset
   253
  using srewrite1 by blast
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parents:
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   254
*)
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   255
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   256
lemma srewrites6:
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   257
  assumes "r1 \<leadsto>* r2" 
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   258
  shows "[r1] s\<leadsto>* [r2]"
a4b86ced5c32 rewrite rules modified slightly
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parents:
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   259
  using assms
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diff changeset
   260
  apply(induct r1 r2 rule: rrewrites.induct)
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parents:
diff changeset
   261
   apply(auto)
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   262
  by (meson srewrites.simps srewrites_trans ss3)
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parents:
diff changeset
   263
a4b86ced5c32 rewrite rules modified slightly
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   264
lemma srewrites7:
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   265
  assumes "rs3 s\<leadsto>* rs4" "r1 \<leadsto>* r2" 
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parents:
diff changeset
   266
  shows "(r1 # rs3) s\<leadsto>* (r2 # rs4)"
a4b86ced5c32 rewrite rules modified slightly
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diff changeset
   267
  using assms
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diff changeset
   268
  by (smt (verit, best) append_Cons append_Nil srewrites1 srewrites3 srewrites6 srewrites_trans)
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diff changeset
   269
a4b86ced5c32 rewrite rules modified slightly
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diff changeset
   270
lemma ss6_stronger_aux:
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   271
  shows "(rs1 @ rs2) s\<leadsto>* (rs1 @ distinctWith rs2 eq1 (set rs1))"
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parents:
diff changeset
   272
  apply(induct rs2 arbitrary: rs1)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   273
  apply(auto)
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   274
  prefer 2
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   275
  apply(drule_tac x="rs1 @ [a]" in meta_spec)
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parents:
diff changeset
   276
  apply(simp)
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parents:
diff changeset
   277
  apply(drule_tac x="rs1" in meta_spec)
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parents:
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   278
  apply(subgoal_tac "(rs1 @ a # rs2) s\<leadsto>* (rs1 @ rs2)")
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parents:
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   279
  using srewrites_trans apply blast
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diff changeset
   280
  apply(subgoal_tac "\<exists>rs1a rs1b. rs1 = rs1a @ [x] @ rs1b")
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parents:
diff changeset
   281
  prefer 2
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   282
  apply (simp add: split_list)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   283
  apply(erule exE)+
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   284
  apply(simp)
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parents:
diff changeset
   285
  using eq1_L rs_in_rstar ss6 by force
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parents:
diff changeset
   286
a4b86ced5c32 rewrite rules modified slightly
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diff changeset
   287
lemma ss6_stronger:
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   288
  shows "rs1 s\<leadsto>* distinctWith rs1 eq1 {}"
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parents:
diff changeset
   289
  by (metis append_Nil list.set(1) ss6_stronger_aux)
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parents:
diff changeset
   290
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   291
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   292
lemma rewrite_preserves_fuse: 
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   293
  shows "r2 \<leadsto> r3 \<Longrightarrow> fuse bs r2 \<leadsto> fuse bs r3"
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   294
  and   "rs2 s\<leadsto> rs3 \<Longrightarrow> map (fuse bs) rs2 s\<leadsto>* map (fuse bs) rs3"
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parents:
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   295
proof(induct rule: rrewrite_srewrite.inducts)
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parents:
diff changeset
   296
  case (bs3 bs1 bs2 r)
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   297
  then show ?case
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parents:
diff changeset
   298
    by (metis fuse.simps(5) fuse_append rrewrite_srewrite.bs3) 
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   299
next
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parents:
diff changeset
   300
  case (bs7 bs r)
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diff changeset
   301
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   302
    by (metis fuse.simps(4) fuse_append rrewrite_srewrite.bs7) 
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   303
next
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   304
  case (ss2 rs1 rs2 r)
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parents:
diff changeset
   305
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   306
    using srewrites7 by force 
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   307
next
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   308
  case (ss3 r1 r2 rs)
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parents:
diff changeset
   309
  then show ?case by (simp add: r_in_rstar srewrites7)
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parents:
diff changeset
   310
next
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   311
  case (ss5 bs1 rs1 rsb)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   312
  then show ?case 
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   313
    apply(simp)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   314
    by (metis (mono_tags, lifting) comp_def fuse_append map_eq_conv rrewrite_srewrite.ss5 srewrites.simps)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   315
next
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   316
  case (ss6 a1 a2 rsa rsb rsc)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   317
  then show ?case 
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   318
    apply(simp only: map_append)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   319
    by (smt (verit, best) erase_fuse list.simps(8) list.simps(9) rrewrite_srewrite.ss6 srewrites.simps)
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parents:
diff changeset
   320
qed (auto intro: rrewrite_srewrite.intros)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   321
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   322
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   323
lemma rewrites_fuse:  
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   324
  assumes "r1 \<leadsto>* r2"
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   325
  shows "fuse bs r1 \<leadsto>* fuse bs r2"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   326
using assms
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   327
apply(induction r1 r2 arbitrary: bs rule: rrewrites.induct)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   328
apply(auto intro: rewrite_preserves_fuse rrewrites_trans)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   329
done
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   330
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   331
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   332
lemma star_seqs:  
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   333
  assumes "rs1 s\<leadsto>* rs2"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   334
  shows "ASEQs bs rs1 \<leadsto>* ASEQs bs rs2"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   335
using assms
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   336
apply(induct rs1 rs2 arbitrary: rule: rrewrites.induct)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   337
apply(auto intro: rrewrite_srewrite.intros)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   338
done
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   339
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   340
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   341
lemma star_seq:  
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   342
  assumes "r1 \<leadsto>* r2"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   343
  shows "ASEQ bs r1 r3 \<leadsto>* ASEQ bs r2 r3"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   344
using assms
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   345
apply(induct r1 r2 arbitrary: r3 rule: rrewrites.induct)
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   346
apply(auto intro: rrewrite_srewrite.intros)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   347
done
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   348
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   349
lemma star_seq2:  
a4b86ced5c32 rewrite rules modified slightly
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parents:
diff changeset
   350
  assumes "r3 \<leadsto>* r4"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   351
  shows "ASEQ bs r1 r3 \<leadsto>* ASEQ bs r1 r4"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   352
  using assms
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   353
apply(induct r3 r4 arbitrary: r1 rule: rrewrites.induct)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   354
apply(auto intro: rrewrite_srewrite.intros)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   355
done
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   356
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   357
lemma continuous_rewrite: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   358
  assumes "r1 \<leadsto>* AZERO"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   359
  shows "ASEQ bs1 r1 r2 \<leadsto>* AZERO"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   360
using assms bs1 star_seq by blast
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   361
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   362
(*
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   363
lemma continuous_rewrite2: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   364
  assumes "r1 \<leadsto>* AONE bs"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   365
  shows "ASEQ bs1 r1 r2 \<leadsto>* (fuse (bs1 @ bs) r2)"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   366
  using assms  by (meson bs3 rrewrites.simps star_seq)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   367
*)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   368
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   369
lemma bsimp_aalts_simpcases: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   370
  shows "AONE bs \<leadsto>* bsimp (AONE bs)"  
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   371
  and   "AZERO \<leadsto>* bsimp AZERO" 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   372
  and   "ACHAR bs c \<leadsto>* bsimp (ACHAR bs c)"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   373
  by (simp_all)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   374
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   375
lemma bsimp_ASEQs_rewrites: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   376
  shows "ASEQs bs1 rs \<leadsto>* bsimp_ASEQs bs1 rs"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   377
  
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   378
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   379
lemma bsimp_AALTs_rewrites: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   380
  shows "AALTs bs1 rs \<leadsto>* bsimp_AALTs bs1 rs"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   381
  by (smt (verit) bs6 bs7 bsimp_AALTs.elims rrewrites.simps)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   382
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   383
lemma trivialbsimp_srewrites: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   384
  "\<lbrakk>\<And>x. x \<in> set rs \<Longrightarrow> x \<leadsto>* f x \<rbrakk> \<Longrightarrow> rs s\<leadsto>* (map f rs)"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   385
  apply(induction rs)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   386
   apply simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   387
  apply(simp)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   388
  using srewrites7 by auto
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   389
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   390
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   391
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   392
lemma fltsfrewrites: "rs s\<leadsto>* flts rs"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   393
  apply(induction rs rule: flts.induct)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   394
  apply(auto intro: rrewrite_srewrite.intros)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   395
  apply (meson srewrites.simps srewrites1 ss5)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   396
  using rs1 srewrites7 apply presburger
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   397
  using srewrites7 apply force
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   398
  apply (simp add: srewrites7)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   399
  by (simp add: srewrites7)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   400
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   401
lemma bnullable0:
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   402
shows "r1 \<leadsto> r2 \<Longrightarrow> bnullable r1 = bnullable r2" 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   403
  and "rs1 s\<leadsto> rs2 \<Longrightarrow> bnullables rs1 = bnullables rs2" 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   404
  apply(induct rule: rrewrite_srewrite.inducts)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   405
  apply(auto simp add:  bnullable_fuse)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   406
   apply (meson UnCI bnullable_fuse imageI)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   407
  using bnullable_correctness nullable_correctness by blast 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   408
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   409
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   410
lemma rewritesnullable: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   411
  assumes "r1 \<leadsto>* r2" 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   412
  shows "bnullable r1 = bnullable r2"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   413
using assms 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   414
  apply(induction r1 r2 rule: rrewrites.induct)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   415
  apply simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   416
  using bnullable0(1) by auto
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   417
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   418
lemma rewrite_bmkeps_aux: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   419
  shows "r1 \<leadsto> r2 \<Longrightarrow> (bnullable r1 \<and> bnullable r2 \<Longrightarrow> bmkeps r1 = bmkeps r2)"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   420
  and   "rs1 s\<leadsto> rs2 \<Longrightarrow> (bnullables rs1 \<and> bnullables rs2 \<Longrightarrow> bmkepss rs1 = bmkepss rs2)" 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   421
proof (induct rule: rrewrite_srewrite.inducts)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   422
  case (bs3 bs1 bs2 r)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   423
  then show ?case by (simp add: bmkeps_fuse) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   424
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   425
  case (bs7 bs r)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   426
  then show ?case by (simp add: bmkeps_fuse) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   427
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   428
  case (ss3 r1 r2 rs)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   429
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   430
    using bmkepss.simps bnullable0(1) by presburger
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   431
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   432
  case (ss5 bs1 rs1 rsb)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   433
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   434
    by (simp add: bmkepss1 bmkepss2 bmkepss_fuse bnullable_fuse)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   435
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   436
  case (ss6 a1 a2 rsa rsb rsc)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   437
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   438
    by (smt (verit, best) Nil_is_append_conv bmkepss1 bmkepss2 bnullable_correctness in_set_conv_decomp list.distinct(1) list.set_intros(1) nullable_correctness set_ConsD subsetD)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   439
qed (auto)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   440
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   441
lemma rewrites_bmkeps: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   442
  assumes "r1 \<leadsto>* r2" "bnullable r1" 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   443
  shows "bmkeps r1 = bmkeps r2"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   444
  using assms
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   445
proof(induction r1 r2 rule: rrewrites.induct)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   446
  case (rs1 r)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   447
  then show "bmkeps r = bmkeps r" by simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   448
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   449
  case (rs2 r1 r2 r3)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   450
  then have IH: "bmkeps r1 = bmkeps r2" by simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   451
  have a1: "bnullable r1" by fact
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   452
  have a2: "r1 \<leadsto>* r2" by fact
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   453
  have a3: "r2 \<leadsto> r3" by fact
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   454
  have a4: "bnullable r2" using a1 a2 by (simp add: rewritesnullable) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   455
  then have "bmkeps r2 = bmkeps r3"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   456
    using a3 bnullable0(1) rewrite_bmkeps_aux(1) by blast 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   457
  then show "bmkeps r1 = bmkeps r3" using IH by simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   458
qed
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   459
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   460
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   461
lemma rewrites_to_bsimp: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   462
  shows "r \<leadsto>* bsimp r"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   463
proof (induction r rule: bsimp.induct)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   464
  case (1 bs1 rs)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   465
  (*
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   466
  have IH1: "r1 \<leadsto>* bsimp r1" by fact
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   467
  have IH2: "r2 \<leadsto>* bsimp r2" by fact
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   468
  { assume as: "bsimp r1 = AZERO \<or> bsimp r2 = AZERO"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   469
    with IH1 IH2 have "r1 \<leadsto>* AZERO \<or> r2 \<leadsto>* AZERO" by auto
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   470
    then have "ASEQ bs1 r1 r2 \<leadsto>* AZERO"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   471
      by (metis bs2 continuous_rewrite rrewrites.simps star_seq2)  
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   472
    then have "ASEQ bs1 r1 r2 \<leadsto>* bsimp (ASEQ bs1 r1 r2)" using as by auto
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   473
  }
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   474
  moreover
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   475
  { assume "\<exists>bs. bsimp r1 = AONE bs"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   476
    then obtain bs where as: "bsimp r1 = AONE bs" by blast
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   477
    with IH1 have "r1 \<leadsto>* AONE bs" by simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   478
    then have "ASEQ bs1 r1 r2 \<leadsto>* fuse (bs1 @ bs) r2" using bs3 star_seq by blast
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   479
    with IH2 have "ASEQ bs1 r1 r2 \<leadsto>* fuse (bs1 @ bs) (bsimp r2)"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   480
      using rewrites_fuse by (meson rrewrites_trans) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   481
    then have "ASEQ bs1 r1 r2 \<leadsto>* bsimp (ASEQ bs1 (AONE bs) r2)" by simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   482
    then have "ASEQ bs1 r1 r2 \<leadsto>* bsimp (ASEQ bs1 r1 r2)" by (simp add: as) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   483
  } 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   484
  moreover
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   485
  { assume as1: "bsimp r1 \<noteq> AZERO" "bsimp r2 \<noteq> AZERO" and as2: "(\<nexists>bs. bsimp r1 = AONE bs)" 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   486
    then have "bsimp_ASEQ bs1 (bsimp r1) (bsimp r2) = ASEQ bs1 (bsimp r1) (bsimp r2)" 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   487
      by (simp add: bsimp_ASEQ1) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   488
    then have "ASEQ bs1 r1 r2 \<leadsto>* bsimp_ASEQ bs1 (bsimp r1) (bsimp r2)" using as1 as2 IH1 IH2
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   489
      by (metis rrewrites_trans star_seq star_seq2) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   490
    then have "ASEQ bs1 r1 r2 \<leadsto>* bsimp (ASEQ bs1 r1 r2)" by simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   491
  } 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   492
  ultimately show "ASEQ bs1 r1 r2 \<leadsto>* bsimp (ASEQ bs1 r1 r2)" by blast
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   493
  *)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   494
  show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   495
    apply(simp)  
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   496
    sorry
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   497
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   498
  case (2 bs1 rs)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   499
  have IH: "\<And>x. x \<in> set rs \<Longrightarrow> x \<leadsto>* bsimp x" by fact
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   500
  then have "rs s\<leadsto>* (map bsimp rs)" by (simp add: trivialbsimp_srewrites)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   501
  also have "... s\<leadsto>* flts (map bsimp rs)" by (simp add: fltsfrewrites) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   502
  also have "... s\<leadsto>* distinctWith (flts (map bsimp rs)) eq1 {}" by (simp add: ss6_stronger)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   503
  finally have "AALTs bs1 rs \<leadsto>* AALTs bs1 (distinctWith (flts (map bsimp rs)) eq1 {})"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   504
    using contextrewrites0 by auto
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   505
  also have "... \<leadsto>* bsimp_AALTs  bs1 (distinctWith (flts (map bsimp rs)) eq1 {})"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   506
    by (simp add: bsimp_AALTs_rewrites)     
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   507
  finally show "AALTs bs1 rs \<leadsto>* bsimp (AALTs bs1 rs)" by simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   508
qed (simp_all)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   509
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   510
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   511
lemma to_zero_in_alt: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   512
  shows "AALT bs (ASEQ [] AZERO r) r2 \<leadsto> AALT bs AZERO r2"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   513
  by (simp add: bs1 bs10 ss3)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   514
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   515
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   516
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   517
lemma  bder_fuse_list: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   518
  shows "map (bder c \<circ> fuse bs1) rs1 = map (fuse bs1 \<circ> bder c) rs1"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   519
  apply(induction rs1)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   520
  apply(simp_all add: bder_fuse)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   521
  done
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   522
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   523
lemma map1:
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   524
  shows "(map f [a]) = [f a]"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   525
  by (simp)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   526
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   527
lemma rewrite_preserves_bder: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   528
  shows "r1 \<leadsto> r2 \<Longrightarrow> (bder c r1) \<leadsto>* (bder c r2)"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   529
  and   "rs1 s\<leadsto> rs2 \<Longrightarrow> map (bder c) rs1 s\<leadsto>* map (bder c) rs2"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   530
proof(induction rule: rrewrite_srewrite.inducts)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   531
  case (bs1 bs r2)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   532
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   533
    by (simp add: continuous_rewrite) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   534
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   535
  case (bs2 bs r1)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   536
  then show ?case 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   537
    apply(auto)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   538
    apply (meson bs6 contextrewrites0 rrewrite_srewrite.bs2 rs2 ss3 ss4 sss1 sss2)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   539
    by (simp add: r_in_rstar rrewrite_srewrite.bs2)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   540
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   541
  case (bs3 bs1 bs2 r)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   542
  then show ?case 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   543
    apply(simp)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   544
    sorry
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   545
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   546
  case (bs4 r1 r2 bs r3)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   547
  have as: "r1 \<leadsto> r2" by fact
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   548
  have IH: "bder c r1 \<leadsto>* bder c r2" by fact
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   549
  from as IH show "bder c (ASEQ bs r1 r3) \<leadsto>* bder c (ASEQ bs r2 r3)"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   550
    sorry
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   551
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   552
  case (bs5 r3 r4 bs r1)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   553
  have as: "r3 \<leadsto> r4" by fact 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   554
  have IH: "bder c r3 \<leadsto>* bder c r4" by fact 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   555
  from as IH show "bder c (ASEQ bs r1 r3) \<leadsto>* bder c (ASEQ bs r1 r4)"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   556
    apply(simp)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   557
    apply(auto)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   558
    using contextrewrites0 r_in_rstar rewrites_fuse srewrites6 srewrites7 star_seq2 apply presburger
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   559
    using star_seq2 by blast
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   560
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   561
  case (bs6 bs)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   562
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   563
    using rrewrite_srewrite.bs6 by force 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   564
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   565
  case (bs7 bs r)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   566
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   567
    by (simp add: bder_fuse r_in_rstar rrewrite_srewrite.bs7) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   568
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   569
  case (bs10 rs1 rs2 bs)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   570
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   571
    using contextrewrites0 by force    
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   572
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   573
  case ss1
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   574
  then show ?case by simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   575
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   576
  case (ss2 rs1 rs2 r)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   577
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   578
    by (simp add: srewrites7) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   579
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   580
  case (ss3 r1 r2 rs)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   581
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   582
    by (simp add: srewrites7) 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   583
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   584
  case (ss4 rs)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   585
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   586
    using rrewrite_srewrite.ss4 by fastforce 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   587
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   588
  case (ss5 bs1 rs1 rsb)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   589
  then show ?case 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   590
    apply(simp)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   591
    using bder_fuse_list map_map rrewrite_srewrite.ss5 srewrites.simps by blast
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   592
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   593
  case (ss6 a1 a2 bs rsa rsb)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   594
  then show ?case
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   595
    apply(simp only: map_append map1)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   596
    apply(rule srewrites_trans)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   597
    apply(rule rs_in_rstar)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   598
    apply(rule_tac rrewrite_srewrite.ss6)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   599
    using Der_def der_correctness apply auto[1]
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   600
    by blast
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   601
qed
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   602
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   603
lemma rewrites_preserves_bder: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   604
  assumes "r1 \<leadsto>* r2"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   605
  shows "bder c r1 \<leadsto>* bder c r2"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   606
using assms  
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   607
apply(induction r1 r2 rule: rrewrites.induct)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   608
apply(simp_all add: rewrite_preserves_bder rrewrites_trans)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   609
done
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   610
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   611
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   612
lemma central:  
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   613
  shows "bders r s \<leadsto>* bders_simp r s"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   614
proof(induct s arbitrary: r rule: rev_induct)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   615
  case Nil
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   616
  then show "bders r [] \<leadsto>* bders_simp r []" by simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   617
next
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   618
  case (snoc x xs)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   619
  have IH: "\<And>r. bders r xs \<leadsto>* bders_simp r xs" by fact
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   620
  have "bders r (xs @ [x]) = bders (bders r xs) [x]" by (simp add: bders_append)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   621
  also have "... \<leadsto>* bders (bders_simp r xs) [x]" using IH
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   622
    by (simp add: rewrites_preserves_bder)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   623
  also have "... \<leadsto>* bders_simp (bders_simp r xs) [x]" using IH
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   624
    by (simp add: rewrites_to_bsimp)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   625
  finally show "bders r (xs @ [x]) \<leadsto>* bders_simp r (xs @ [x])" 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   626
    by (simp add: bders_simp_append)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   627
qed
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   628
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   629
lemma main_aux: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   630
  assumes "bnullable (bders r s)"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   631
  shows "bmkeps (bders r s) = bmkeps (bders_simp r s)"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   632
proof -
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   633
  have "bders r s \<leadsto>* bders_simp r s" by (rule central)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   634
  then 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   635
  show "bmkeps (bders r s) = bmkeps (bders_simp r s)" using assms
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   636
    by (rule rewrites_bmkeps)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   637
qed  
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   638
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   639
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   640
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   641
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   642
theorem main_blexer_simp: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   643
  shows "blexer r s = blexer_simp r s"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   644
  unfolding blexer_def blexer_simp_def
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   645
  by (metis central main_aux rewritesnullable)
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   646
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   647
theorem blexersimp_correctness: 
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   648
  shows "lexer r s = blexer_simp r s"
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   649
  using blexer_correctness main_blexer_simp by simp
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   650
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   651
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   652
unused_thms
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   653
a4b86ced5c32 rewrite rules modified slightly
Chengsong
parents:
diff changeset
   654
end