lex_blex_Frankensteined.scala
author Chengsong
Wed, 27 May 2020 22:23:52 +0100
changeset 151 73f990bc6843
parent 150 b51d34113d47
permissions -rw-r--r--
clean
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
151
Chengsong
parents: 150
diff changeset
     1
Chengsong
parents: 150
diff changeset
     2
import Element.elem
0
Chengsong
parents:
diff changeset
     3
import scala.language.implicitConversions    
Chengsong
parents:
diff changeset
     4
import scala.language.reflectiveCalls
Chengsong
parents:
diff changeset
     5
import scala.annotation.tailrec   
Chengsong
parents:
diff changeset
     6
import scala.util.Try
Chengsong
parents:
diff changeset
     7
151
Chengsong
parents: 150
diff changeset
     8
Chengsong
parents: 150
diff changeset
     9
package RexpRelated
Chengsong
parents: 150
diff changeset
    10
{
0
Chengsong
parents:
diff changeset
    11
abstract class Bit
Chengsong
parents:
diff changeset
    12
case object Z extends Bit
Chengsong
parents:
diff changeset
    13
case object S extends Bit
12
768b833d6230 removed C(c) The retrieve and code in the previous version is still not correct and will crash. no prob now.
Chengsong
parents: 11
diff changeset
    14
//case class C(c: Char) extends Bit
0
Chengsong
parents:
diff changeset
    15
Chengsong
parents:
diff changeset
    16
Chengsong
parents:
diff changeset
    17
abstract class Rexp 
Chengsong
parents:
diff changeset
    18
case object ZERO extends Rexp
Chengsong
parents:
diff changeset
    19
case object ONE extends Rexp
Chengsong
parents:
diff changeset
    20
case class CHAR(c: Char) extends Rexp
Chengsong
parents:
diff changeset
    21
case class ALTS(rs: List[Rexp]) extends Rexp 
Chengsong
parents:
diff changeset
    22
case class SEQ(r1: Rexp, r2: Rexp) extends Rexp 
Chengsong
parents:
diff changeset
    23
case class STAR(r: Rexp) extends Rexp 
Chengsong
parents:
diff changeset
    24
case class RECD(x: String, r: Rexp) extends Rexp
Chengsong
parents:
diff changeset
    25
Chengsong
parents:
diff changeset
    26
Chengsong
parents:
diff changeset
    27
Chengsong
parents:
diff changeset
    28
object Rexp{
Chengsong
parents:
diff changeset
    29
  type Bits = List[Bit]
Chengsong
parents:
diff changeset
    30
  // abbreviations
Chengsong
parents:
diff changeset
    31
  type Mon = (Char, Rexp)
Chengsong
parents:
diff changeset
    32
  type Lin = Set[Mon]
Chengsong
parents:
diff changeset
    33
  def ALT(r1: Rexp, r2: Rexp) = ALTS(List(r1, r2))
Chengsong
parents:
diff changeset
    34
  def PLUS(r: Rexp) = SEQ(r, STAR(r))
Chengsong
parents:
diff changeset
    35
  def AALT(bs: Bits, r1: ARexp, r2: ARexp) = AALTS(bs, List(r1, r2))
Chengsong
parents:
diff changeset
    36
Chengsong
parents:
diff changeset
    37
151
Chengsong
parents: 150
diff changeset
    38
Chengsong
parents: 150
diff changeset
    39
Chengsong
parents: 150
diff changeset
    40
Chengsong
parents: 150
diff changeset
    41
0
Chengsong
parents:
diff changeset
    42
  def distinctBy[B, C](xs: List[B], f: B => C, acc: List[C] = Nil): List[B] = xs match {
Chengsong
parents:
diff changeset
    43
    case Nil => Nil
Chengsong
parents:
diff changeset
    44
    case (x::xs) => {
Chengsong
parents:
diff changeset
    45
      val res = f(x)
Chengsong
parents:
diff changeset
    46
      if (acc.contains(res)) distinctBy(xs, f, acc)  
Chengsong
parents:
diff changeset
    47
      else x::distinctBy(xs, f, res::acc)
Chengsong
parents:
diff changeset
    48
    }
Chengsong
parents:
diff changeset
    49
  } 
Chengsong
parents:
diff changeset
    50
  // some convenience for typing in regular expressions
Chengsong
parents:
diff changeset
    51
  def charlist2rexp(s : List[Char]): Rexp = s match {
Chengsong
parents:
diff changeset
    52
    case Nil => ONE
Chengsong
parents:
diff changeset
    53
    case c::Nil => CHAR(c)
Chengsong
parents:
diff changeset
    54
    case c::s => SEQ(CHAR(c), charlist2rexp(s))
Chengsong
parents:
diff changeset
    55
  }
Chengsong
parents:
diff changeset
    56
  implicit def string2rexp(s : String) : Rexp = charlist2rexp(s.toList)
Chengsong
parents:
diff changeset
    57
Chengsong
parents:
diff changeset
    58
  implicit def RexpOps(r: Rexp) = new {
Chengsong
parents:
diff changeset
    59
    def | (s: Rexp) = ALT(r, s)
Chengsong
parents:
diff changeset
    60
    def % = STAR(r)
Chengsong
parents:
diff changeset
    61
    def ~ (s: Rexp) = SEQ(r, s)
Chengsong
parents:
diff changeset
    62
  }
Chengsong
parents:
diff changeset
    63
Chengsong
parents:
diff changeset
    64
  implicit def stringOps(s: String) = new {
Chengsong
parents:
diff changeset
    65
    def | (r: Rexp) = ALT(s, r)
Chengsong
parents:
diff changeset
    66
    def | (r: String) = ALT(s, r)
Chengsong
parents:
diff changeset
    67
    def % = STAR(s)
Chengsong
parents:
diff changeset
    68
    def ~ (r: Rexp) = SEQ(s, r)
Chengsong
parents:
diff changeset
    69
    def ~ (r: String) = SEQ(s, r)
Chengsong
parents:
diff changeset
    70
    def $ (r: Rexp) = RECD(s, r)
Chengsong
parents:
diff changeset
    71
  }
Chengsong
parents:
diff changeset
    72
Chengsong
parents:
diff changeset
    73
  // translation into ARexps
Chengsong
parents:
diff changeset
    74
  def fuse(bs: Bits, r: ARexp) : ARexp = r match {
Chengsong
parents:
diff changeset
    75
    case AZERO => AZERO
Chengsong
parents:
diff changeset
    76
    case AONE(cs) => AONE(bs ++ cs)
Chengsong
parents:
diff changeset
    77
    case ACHAR(cs, f) => ACHAR(bs ++ cs, f)
Chengsong
parents:
diff changeset
    78
    case AALTS(cs, rs) => AALTS(bs ++ cs, rs)
Chengsong
parents:
diff changeset
    79
    case ASEQ(cs, r1, r2) => ASEQ(bs ++ cs, r1, r2)
Chengsong
parents:
diff changeset
    80
    case ASTAR(cs, r) => ASTAR(bs ++ cs, r)
Chengsong
parents:
diff changeset
    81
  }
Chengsong
parents:
diff changeset
    82
Chengsong
parents:
diff changeset
    83
  def internalise(r: Rexp) : ARexp = r match {
Chengsong
parents:
diff changeset
    84
    case ZERO => AZERO
Chengsong
parents:
diff changeset
    85
    case ONE => AONE(Nil)
Chengsong
parents:
diff changeset
    86
    case CHAR(c) => ACHAR(Nil, c)
Chengsong
parents:
diff changeset
    87
    case ALTS(List(r1, r2)) => 
Chengsong
parents:
diff changeset
    88
      AALTS(Nil, List(fuse(List(Z), internalise(r1)), fuse(List(S), internalise(r2))))
Chengsong
parents:
diff changeset
    89
    case ALTS(r1::rs) => {
Chengsong
parents:
diff changeset
    90
      val AALTS(Nil, rs2) = internalise(ALTS(rs))
Chengsong
parents:
diff changeset
    91
      AALTS(Nil, fuse(List(Z), internalise(r1)) :: rs2.map(fuse(List(S), _)))
Chengsong
parents:
diff changeset
    92
    }
Chengsong
parents:
diff changeset
    93
    case SEQ(r1, r2) => ASEQ(Nil, internalise(r1), internalise(r2))
Chengsong
parents:
diff changeset
    94
    case STAR(r) => ASTAR(Nil, internalise(r))
Chengsong
parents:
diff changeset
    95
    case RECD(x, r) => internalise(r)
Chengsong
parents:
diff changeset
    96
  }
Chengsong
parents:
diff changeset
    97
Chengsong
parents:
diff changeset
    98
  internalise(("a" | "ab") ~ ("b" | ""))
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
    99
0
Chengsong
parents:
diff changeset
   100
  def decode_aux(r: Rexp, bs: Bits) : (Val, Bits) = (r, bs) match {
Chengsong
parents:
diff changeset
   101
    case (ONE, bs) => (Empty, bs)
12
768b833d6230 removed C(c) The retrieve and code in the previous version is still not correct and will crash. no prob now.
Chengsong
parents: 11
diff changeset
   102
    case (CHAR(f), bs) => (Chr(f), bs)
768b833d6230 removed C(c) The retrieve and code in the previous version is still not correct and will crash. no prob now.
Chengsong
parents: 11
diff changeset
   103
    case (ALTS(r::Nil), bs) => decode_aux(r, bs)//this case seems only used when we simp a regex before derivatives and it contains things like alt("a")
0
Chengsong
parents:
diff changeset
   104
    case (ALTS(rs), bs) => bs match {
Chengsong
parents:
diff changeset
   105
      case Z::bs1 => {
Chengsong
parents:
diff changeset
   106
        val (v, bs2) = decode_aux(rs.head, bs1)
Chengsong
parents:
diff changeset
   107
        (Left(v), bs2)
Chengsong
parents:
diff changeset
   108
      }
Chengsong
parents:
diff changeset
   109
      case S::bs1 => {
Chengsong
parents:
diff changeset
   110
        val (v, bs2) = decode_aux(ALTS(rs.tail), bs1)
Chengsong
parents:
diff changeset
   111
        (Right(v), bs2)			
Chengsong
parents:
diff changeset
   112
      }
Chengsong
parents:
diff changeset
   113
    }
Chengsong
parents:
diff changeset
   114
    case (SEQ(r1, r2), bs) => {
Chengsong
parents:
diff changeset
   115
      val (v1, bs1) = decode_aux(r1, bs)
Chengsong
parents:
diff changeset
   116
      val (v2, bs2) = decode_aux(r2, bs1)
Chengsong
parents:
diff changeset
   117
      (Sequ(v1, v2), bs2)
Chengsong
parents:
diff changeset
   118
    }
Chengsong
parents:
diff changeset
   119
    case (STAR(r1), S::bs) => {
Chengsong
parents:
diff changeset
   120
      val (v, bs1) = decode_aux(r1, bs)
Chengsong
parents:
diff changeset
   121
      //println(v)
Chengsong
parents:
diff changeset
   122
      val (Stars(vs), bs2) = decode_aux(STAR(r1), bs1)
Chengsong
parents:
diff changeset
   123
      (Stars(v::vs), bs2)
Chengsong
parents:
diff changeset
   124
    }
Chengsong
parents:
diff changeset
   125
    case (STAR(_), Z::bs) => (Stars(Nil), bs)
Chengsong
parents:
diff changeset
   126
    case (RECD(x, r1), bs) => {
Chengsong
parents:
diff changeset
   127
      val (v, bs1) = decode_aux(r1, bs)
Chengsong
parents:
diff changeset
   128
      (Rec(x, v), bs1)
Chengsong
parents:
diff changeset
   129
    }
109
Chengsong
parents: 107
diff changeset
   130
    case (r, Nil) => (Stars(Nil), Nil)
0
Chengsong
parents:
diff changeset
   131
  }
Chengsong
parents:
diff changeset
   132
Chengsong
parents:
diff changeset
   133
  def decode(r: Rexp, bs: Bits) = decode_aux(r, bs) match {
Chengsong
parents:
diff changeset
   134
    case (v, Nil) => v
Chengsong
parents:
diff changeset
   135
    case _ => throw new Exception("Not decodable")
Chengsong
parents:
diff changeset
   136
  }
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   137
11
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   138
  def code(v: Val): Bits = v match {
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   139
    case Empty => Nil
12
768b833d6230 removed C(c) The retrieve and code in the previous version is still not correct and will crash. no prob now.
Chengsong
parents: 11
diff changeset
   140
    case Chr(a) => Nil
11
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   141
    case Left(v) => Z :: code(v)
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   142
    case Right(v) => S :: code(v)
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   143
    case Sequ(v1, v2) => code(v1) ::: code(v2)
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   144
    case Stars(Nil) => Z::Nil
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   145
    case Stars(v::vs) => S::code(v) ::: code(Stars(vs))
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   146
  }
0
Chengsong
parents:
diff changeset
   147
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   148
  //note that left and right are not recorded
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   149
  //although they guide the retrival
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   150
  //in contrast with stars 
11
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   151
  def retrieve(r: ARexp, v: Val): Bits = (r,v) match {
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   152
    case (AONE(bs), Empty) => bs
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   153
    case (ACHAR(bs, c), Chr(d)) => bs
14
610f14009c0b the property
Chengsong
parents: 12
diff changeset
   154
    case (AALTS(bs, a::Nil), v) => bs ++ retrieve(a, v)
11
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   155
    case (AALTS(bs, as), Left(v)) => bs ++ retrieve(as.head,v)
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   156
    case (AALTS(bs, as), Right(v)) => bs ++ retrieve(AALTS(Nil,as.tail),v)
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   157
    case (ASEQ(bs, a1, a2), Sequ(v1, v2)) => bs ++ retrieve(a1, v1) ++ retrieve(a2, v2)
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   158
    case (ASTAR(bs, a), Stars(Nil)) => bs ++ List(Z) 
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   159
    case (ASTAR(bs, a), Stars(v::vs)) => bs ++ List(S) ++ retrieve(a, v) ++ retrieve(ASTAR(Nil, a), Stars(vs))
59
8ff7b7508824 changes1
Chengsong
parents: 17
diff changeset
   160
  }//bug here last clause should not add list(S)
0
Chengsong
parents:
diff changeset
   161
  //erase function: extracts the regx from Aregex
Chengsong
parents:
diff changeset
   162
  def erase(r:ARexp): Rexp = r match{
Chengsong
parents:
diff changeset
   163
    case AZERO => ZERO
Chengsong
parents:
diff changeset
   164
    case AONE(_) => ONE
Chengsong
parents:
diff changeset
   165
    case ACHAR(bs, f) => CHAR(f)
Chengsong
parents:
diff changeset
   166
    case AALTS(bs, rs) => ALTS(rs.map(erase(_)))
Chengsong
parents:
diff changeset
   167
    case ASEQ(bs, r1, r2) => SEQ (erase(r1), erase(r2))
Chengsong
parents:
diff changeset
   168
    case ASTAR(cs, r)=> STAR(erase(r))
Chengsong
parents:
diff changeset
   169
  }
Chengsong
parents:
diff changeset
   170
Chengsong
parents:
diff changeset
   171
  //--------------------------------------------------------------------------------------------------------START OF NON-BITCODE PART
Chengsong
parents:
diff changeset
   172
  // nullable function: tests whether the regular 
Chengsong
parents:
diff changeset
   173
  // expression can recognise the empty string
Chengsong
parents:
diff changeset
   174
  def nullable (r: Rexp) : Boolean = r match {
Chengsong
parents:
diff changeset
   175
    case ZERO => false
Chengsong
parents:
diff changeset
   176
    case ONE => true
Chengsong
parents:
diff changeset
   177
    case CHAR(_) => false
Chengsong
parents:
diff changeset
   178
    case ALTS(rs) => rs.exists(nullable)
Chengsong
parents:
diff changeset
   179
    case SEQ(r1, r2) => nullable(r1) && nullable(r2)
Chengsong
parents:
diff changeset
   180
    case STAR(_) => true
Chengsong
parents:
diff changeset
   181
    case RECD(_, r) => nullable(r)
Chengsong
parents:
diff changeset
   182
    //case PLUS(r) => nullable(r)
Chengsong
parents:
diff changeset
   183
  }
Chengsong
parents:
diff changeset
   184
Chengsong
parents:
diff changeset
   185
  // derivative of a regular expression w.r.t. a character
Chengsong
parents:
diff changeset
   186
  def der (c: Char, r: Rexp) : Rexp = r match {
Chengsong
parents:
diff changeset
   187
    case ZERO => ZERO
Chengsong
parents:
diff changeset
   188
    case ONE => ZERO
Chengsong
parents:
diff changeset
   189
    case CHAR(f) => if (c == f) ONE else ZERO
Chengsong
parents:
diff changeset
   190
    case ALTS(List(r1, r2)) => ALTS(List(der(c, r1), der(c, r2)))
Chengsong
parents:
diff changeset
   191
    case SEQ(r1, r2) => 
Chengsong
parents:
diff changeset
   192
      if (nullable(r1)) ALTS(List(SEQ(der(c, r1), r2), der(c, r2)))
Chengsong
parents:
diff changeset
   193
      else SEQ(der(c, r1), r2)
Chengsong
parents:
diff changeset
   194
    case STAR(r) => SEQ(der(c, r), STAR(r))
Chengsong
parents:
diff changeset
   195
    case RECD(_, r1) => der(c, r1)
Chengsong
parents:
diff changeset
   196
    //case PLUS(r) => SEQ(der(c, r), STAR(r))
Chengsong
parents:
diff changeset
   197
  }
Chengsong
parents:
diff changeset
   198
92
Chengsong
parents: 59
diff changeset
   199
  def ders (s: List[Char], r: Rexp) : Rexp = s match {
Chengsong
parents: 59
diff changeset
   200
    case Nil => r
Chengsong
parents: 59
diff changeset
   201
    case c::s => ders(s, der(c, r))
Chengsong
parents: 59
diff changeset
   202
  }
Chengsong
parents: 59
diff changeset
   203
Chengsong
parents: 59
diff changeset
   204
def der_seqo(r:Rexp, s: List[Char],acc: List[Rexp]) : List[Rexp] = s match{
Chengsong
parents: 59
diff changeset
   205
    case Nil => acc ::: List(r)
Chengsong
parents: 59
diff changeset
   206
    case c::cs => der_seqo(der(c, r), cs, acc ::: List(r))
Chengsong
parents: 59
diff changeset
   207
  }
Chengsong
parents: 59
diff changeset
   208
  def der_seq_revo(r:Rexp, s: List[Char], acc: List[Rexp]): List[Rexp] = s match{
Chengsong
parents: 59
diff changeset
   209
    case Nil => r::acc
Chengsong
parents: 59
diff changeset
   210
    case c::cs =>der_seq_revo(r, cs, ders(s, r) :: acc  )
Chengsong
parents: 59
diff changeset
   211
  }
Chengsong
parents: 59
diff changeset
   212
  def re_closeo(l1: List[Rexp], l2: List[Rexp], re_init: Rexp): Rexp = l1 match {
Chengsong
parents: 59
diff changeset
   213
    case Nil => re_init
Chengsong
parents: 59
diff changeset
   214
    case c::cs => if(nullable(c)) re_closeo(cs, l2.tail, ALT(re_init,  l2.head)  ) 
Chengsong
parents: 59
diff changeset
   215
    else re_closeo(cs, l2.tail, re_init)
Chengsong
parents: 59
diff changeset
   216
  }
93
Chengsong
parents: 92
diff changeset
   217
92
Chengsong
parents: 59
diff changeset
   218
  //HERE
Chengsong
parents: 59
diff changeset
   219
  def closed_string_dero(r1: Rexp, r2: Rexp, s: List[Char]): Rexp = {
Chengsong
parents: 59
diff changeset
   220
    val l1 = der_seqo(r1, s, Nil)
Chengsong
parents: 59
diff changeset
   221
    val l2 = der_seq_revo(r2, s, Nil)
Chengsong
parents: 59
diff changeset
   222
    val Re = re_closeo((l1.reverse).tail, l2.tail, SEQ(l1.last, l2.head))
Chengsong
parents: 59
diff changeset
   223
    Re
Chengsong
parents: 59
diff changeset
   224
  }
Chengsong
parents: 59
diff changeset
   225
  //derivative w.r.t string
Chengsong
parents: 59
diff changeset
   226
def ders2(s: List[Char], r: Rexp) : Rexp = (s, r) match {
Chengsong
parents: 59
diff changeset
   227
  case (Nil, r) => r
Chengsong
parents: 59
diff changeset
   228
  case (s, ZERO) => ZERO
Chengsong
parents: 59
diff changeset
   229
  case (s, ONE) => if (s == Nil) ONE else ZERO
Chengsong
parents: 59
diff changeset
   230
  case (s, CHAR(c)) => if (s == List(c)) ONE else 
Chengsong
parents: 59
diff changeset
   231
                       if (s == Nil) CHAR(c) else ZERO
Chengsong
parents: 59
diff changeset
   232
  case (s, ALTS(List(r1, r2))) => ALT(ders2(s, r1), ders2(s, r2))
Chengsong
parents: 59
diff changeset
   233
  case (s, SEQ(r1, r2)) => closed_string_dero(r1, r2, s)
Chengsong
parents: 59
diff changeset
   234
  case (c::cs, STAR(r)) => closed_string_dero(der(c, r), STAR(r), cs)
Chengsong
parents: 59
diff changeset
   235
}
Chengsong
parents: 59
diff changeset
   236
0
Chengsong
parents:
diff changeset
   237
  def flatten(v: Val) : String = v match {
Chengsong
parents:
diff changeset
   238
    case Empty => ""
Chengsong
parents:
diff changeset
   239
    case Chr(c) => c.toString
Chengsong
parents:
diff changeset
   240
    case Left(v) => flatten(v)
Chengsong
parents:
diff changeset
   241
    case Right(v) => flatten(v)
Chengsong
parents:
diff changeset
   242
    case Sequ(v1, v2) => flatten(v1) + flatten(v2)
Chengsong
parents:
diff changeset
   243
    case Stars(vs) => vs.map(flatten).mkString
Chengsong
parents:
diff changeset
   244
    case Rec(_, v) => flatten(v)
Chengsong
parents:
diff changeset
   245
  }
Chengsong
parents:
diff changeset
   246
Chengsong
parents:
diff changeset
   247
  // extracts an environment from a value
Chengsong
parents:
diff changeset
   248
  def env(v: Val) : List[(String, String)] = v match {
Chengsong
parents:
diff changeset
   249
    case Empty => Nil
Chengsong
parents:
diff changeset
   250
    case Chr(c) => Nil
Chengsong
parents:
diff changeset
   251
    case Left(v) => env(v)
Chengsong
parents:
diff changeset
   252
    case Right(v) => env(v)
Chengsong
parents:
diff changeset
   253
    case Sequ(v1, v2) => env(v1) ::: env(v2)
Chengsong
parents:
diff changeset
   254
    case Stars(vs) => vs.flatMap(env)
Chengsong
parents:
diff changeset
   255
    case Rec(x, v) => (x, flatten(v))::env(v)
Chengsong
parents:
diff changeset
   256
  }
Chengsong
parents:
diff changeset
   257
Chengsong
parents:
diff changeset
   258
Chengsong
parents:
diff changeset
   259
  // injection part
Chengsong
parents:
diff changeset
   260
  def mkeps(r: Rexp) : Val = r match {
Chengsong
parents:
diff changeset
   261
    case ONE => Empty
Chengsong
parents:
diff changeset
   262
    case ALTS(List(r1, r2)) => 
Chengsong
parents:
diff changeset
   263
      if (nullable(r1)) Left(mkeps(r1)) else Right(mkeps(r2))
Chengsong
parents:
diff changeset
   264
    case SEQ(r1, r2) => Sequ(mkeps(r1), mkeps(r2))
Chengsong
parents:
diff changeset
   265
    case STAR(r) => Stars(Nil)
Chengsong
parents:
diff changeset
   266
    case RECD(x, r) => Rec(x, mkeps(r))
Chengsong
parents:
diff changeset
   267
    //case PLUS(r) => Stars(List(mkeps(r)))
Chengsong
parents:
diff changeset
   268
  }
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   269
  def haschr(r: Rexp) : Boolean = r match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   270
    case CHAR(c) => true
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   271
    case STAR(r0) => haschr(r0)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   272
    case SEQ(r1, r2) => haschr(r1) && nullable(r2) || haschr(r2) && nullable(r1)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   273
    case ALTS(List(r1, r2)) => haschr(r1) || haschr(r2)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   274
    case ONE => false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   275
    case ZERO => false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   276
  }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   277
  def haschar(r: Rexp, c: Char) : Boolean = r match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   278
    case CHAR(d) => if(c == d) true else false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   279
    case SEQ(r1, r2) => if(haschar(r1, c) && nullable(r2)) true else if(haschar(r2, c) && nullable(r1) ) true else false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   280
    case STAR(r) => if(haschar(r, c)) true else false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   281
    case ALTS(List(r1, r2)) => if(haschar(r1, c) || haschar(r2, c)) true else false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   282
    case ONE => false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   283
    case ZERO => false 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   284
  }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   285
  def mkchr(r: Rexp) : Val = r match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   286
    case SEQ(r1, r2) => 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   287
      if(haschr(r1) && nullable(r2)) Sequ(mkchr(r1), mkeps(r2)) 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   288
      else if(nullable(r1) && haschr(r2)) Sequ(mkeps(r1), mkchr(r2))
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   289
      else throw new Exception(r.toString)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   290
    case ALTS(List(r1, r2)) => if (haschr(r1)) Left(mkchr(r1)) else Right(mkchr(r2))
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   291
    case STAR(r0) => Stars(List(mkchr(r0)))
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   292
    case CHAR(c) => Chr(c)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   293
    case _ => throw new Exception("the regex you gave me can't make a char")
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   294
  }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   295
  def mkchar(r: Rexp, c: Char) : Val = r match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   296
    case CHAR(d) => Chr(c)//if(c == d)  Chr(c) else error
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   297
    case ALTS(List(r1, r2)) =>
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   298
      if (haschar(r1, c)) Left(mkchar(r1, c)) else Right(mkchar(r2, c))
0
Chengsong
parents:
diff changeset
   299
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   300
    case SEQ(r1, r2) => {if(haschar(r1, c)) Sequ(mkchar(r1, c), mkeps(r2)) else Sequ(mkeps(r1), mkchar(r2, c))}
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   301
    case STAR(r) =>Stars(List(mkchar(r, c)))
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   302
  }
0
Chengsong
parents:
diff changeset
   303
  def inj(r: Rexp, c: Char, v: Val) : Val = (r, v) match {
Chengsong
parents:
diff changeset
   304
    case (STAR(r), Sequ(v1, Stars(vs))) => Stars(inj(r, c, v1)::vs)
Chengsong
parents:
diff changeset
   305
    case (SEQ(r1, r2), Sequ(v1, v2)) => Sequ(inj(r1, c, v1), v2)
Chengsong
parents:
diff changeset
   306
    case (SEQ(r1, r2), Left(Sequ(v1, v2))) => Sequ(inj(r1, c, v1), v2)
Chengsong
parents:
diff changeset
   307
    case (SEQ(r1, r2), Right(v2)) => Sequ(mkeps(r1), inj(r2, c, v2))
Chengsong
parents:
diff changeset
   308
    case (ALTS(List(r1, r2)), Left(v1)) => Left(inj(r1, c, v1))
Chengsong
parents:
diff changeset
   309
    case (ALTS(List(r1, r2)), Right(v2)) => Right(inj(r2, c, v2))
Chengsong
parents:
diff changeset
   310
    case (CHAR(_), Empty) => Chr(c) 
Chengsong
parents:
diff changeset
   311
    case (RECD(x, r1), _) => Rec(x, inj(r1, c, v))
Chengsong
parents:
diff changeset
   312
    //case (PLUS(r), Sequ(v1, Stars(vs))) => Stars(inj(r, c, v1)::vs)
Chengsong
parents:
diff changeset
   313
  }
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   314
  def fuzzy_inj(r: ARexp, c: Char, v: Val) : Val = v match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   315
    case Stars(vs) => r match {//vs
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   316
      case ASTAR(bs, r0) => inj(     erase(r), c, Sequ(mkeps(erase(bder(c, r0))), v)     )
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   317
      case ASEQ(bs, r1, r2) => inj(erase(r), c, Sequ(mkeps(erase(bder(c, r1))), v) )
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   318
    }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   319
    case Sequ(v1, v2) => r match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   320
      case ASTAR(bs, r0) => inj(erase(r), c, Sequ(mkchar(erase(bder(c, r0)), c), v2))
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   321
      case _ => v
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   322
    }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   323
    case _ => v
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   324
  }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   325
  /*def gen_rect(r: Rexp) : Val => Val = {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   326
    //lingqi
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   327
    //buyao sanle 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   328
    val r1 = bsimp(r)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   329
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   330
  }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   331
  def fuzzy_inj(r: ARexp, c: Char, v: Val) : Val = {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   332
    val f = gen_rect(r)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   333
    val vo = f(v)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   334
    inj(r, c, vo)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   335
  }*/
0
Chengsong
parents:
diff changeset
   336
  def lex(r: Rexp, s: List[Char]) : Val = s match {
Chengsong
parents:
diff changeset
   337
    case Nil => if (nullable(r)) mkeps(r) else throw new Exception("Not matched")
Chengsong
parents:
diff changeset
   338
    case c::cs => inj(r, c, lex(der(c, r), cs))
Chengsong
parents:
diff changeset
   339
  }
Chengsong
parents:
diff changeset
   340
Chengsong
parents:
diff changeset
   341
  def lexing(r: Rexp, s: String) : Val = lex(r, s.toList)
Chengsong
parents:
diff changeset
   342
Chengsong
parents:
diff changeset
   343
  // some "rectification" functions for simplification
Chengsong
parents:
diff changeset
   344
  def F_ID(v: Val): Val = v
Chengsong
parents:
diff changeset
   345
  def F_RIGHT(f: Val => Val) = (v:Val) => Right(f(v))
Chengsong
parents:
diff changeset
   346
  def F_LEFT(f: Val => Val) = (v:Val) => Left(f(v))
Chengsong
parents:
diff changeset
   347
  def F_ALT(f1: Val => Val, f2: Val => Val) = (v:Val) => v match {
Chengsong
parents:
diff changeset
   348
    case Right(v) => Right(f2(v))
Chengsong
parents:
diff changeset
   349
    case Left(v) => Left(f1(v))
Chengsong
parents:
diff changeset
   350
  }
Chengsong
parents:
diff changeset
   351
  def F_SEQ(f1: Val => Val, f2: Val => Val) = (v:Val) => v match {
Chengsong
parents:
diff changeset
   352
    case Sequ(v1, v2) => Sequ(f1(v1), f2(v2))
Chengsong
parents:
diff changeset
   353
  }
Chengsong
parents:
diff changeset
   354
  def F_SEQ_Empty1(f1: Val => Val, f2: Val => Val) = 
Chengsong
parents:
diff changeset
   355
    (v:Val) => Sequ(f1(Empty), f2(v))
Chengsong
parents:
diff changeset
   356
  def F_SEQ_Empty2(f1: Val => Val, f2: Val => Val) = 
Chengsong
parents:
diff changeset
   357
    (v:Val) => Sequ(f1(v), f2(Empty))
Chengsong
parents:
diff changeset
   358
  def F_RECD(f: Val => Val) = (v:Val) => v match {
Chengsong
parents:
diff changeset
   359
    case Rec(x, v) => Rec(x, f(v))
Chengsong
parents:
diff changeset
   360
  }
Chengsong
parents:
diff changeset
   361
  def F_ERROR(v: Val): Val = throw new Exception("error")
Chengsong
parents:
diff changeset
   362
Chengsong
parents:
diff changeset
   363
  // simplification of regular expressions returning also an
Chengsong
parents:
diff changeset
   364
  // rectification function; no simplification under STAR 
Chengsong
parents:
diff changeset
   365
  def simp(r: Rexp): (Rexp, Val => Val) = r match {
Chengsong
parents:
diff changeset
   366
    case ALTS(List(r1, r2)) => {
Chengsong
parents:
diff changeset
   367
      val (r1s, f1s) = simp(r1)
Chengsong
parents:
diff changeset
   368
      val (r2s, f2s) = simp(r2)
Chengsong
parents:
diff changeset
   369
      (r1s, r2s) match {
Chengsong
parents:
diff changeset
   370
        case (ZERO, _) => (r2s, F_RIGHT(f2s))
Chengsong
parents:
diff changeset
   371
        case (_, ZERO) => (r1s, F_LEFT(f1s))
Chengsong
parents:
diff changeset
   372
        case _ => if (r1s == r2s) (r1s, F_LEFT(f1s))
Chengsong
parents:
diff changeset
   373
                  else (ALTS(List(r1s, r2s)), F_ALT(f1s, f2s)) 
Chengsong
parents:
diff changeset
   374
      }
Chengsong
parents:
diff changeset
   375
    }
Chengsong
parents:
diff changeset
   376
    case SEQ(r1, r2) => {
Chengsong
parents:
diff changeset
   377
      val (r1s, f1s) = simp(r1)
Chengsong
parents:
diff changeset
   378
      val (r2s, f2s) = simp(r2)
Chengsong
parents:
diff changeset
   379
      (r1s, r2s) match {
Chengsong
parents:
diff changeset
   380
        case (ZERO, _) => (ZERO, F_ERROR)
Chengsong
parents:
diff changeset
   381
        case (_, ZERO) => (ZERO, F_ERROR)
Chengsong
parents:
diff changeset
   382
        case (ONE, _) => (r2s, F_SEQ_Empty1(f1s, f2s))
Chengsong
parents:
diff changeset
   383
        case (_, ONE) => (r1s, F_SEQ_Empty2(f1s, f2s))
Chengsong
parents:
diff changeset
   384
        case _ => (SEQ(r1s,r2s), F_SEQ(f1s, f2s))
Chengsong
parents:
diff changeset
   385
      }
Chengsong
parents:
diff changeset
   386
    }
Chengsong
parents:
diff changeset
   387
    case RECD(x, r1) => {
Chengsong
parents:
diff changeset
   388
      val (r1s, f1s) = simp(r1)
Chengsong
parents:
diff changeset
   389
      (RECD(x, r1s), F_RECD(f1s))
Chengsong
parents:
diff changeset
   390
    }
Chengsong
parents:
diff changeset
   391
    case r => (r, F_ID)
Chengsong
parents:
diff changeset
   392
  }
Chengsong
parents:
diff changeset
   393
  /*
Chengsong
parents:
diff changeset
   394
  val each_simp_time = scala.collection.mutable.ArrayBuffer.empty[Long]
Chengsong
parents:
diff changeset
   395
  val each_simp_timeb = scala.collection.mutable.ArrayBuffer.empty[Long]
Chengsong
parents:
diff changeset
   396
  */
Chengsong
parents:
diff changeset
   397
  def lex_simp(r: Rexp, s: List[Char]) : Val = s match {
Chengsong
parents:
diff changeset
   398
    case Nil => {
Chengsong
parents:
diff changeset
   399
      if (nullable(r)) {
Chengsong
parents:
diff changeset
   400
        mkeps(r) 
Chengsong
parents:
diff changeset
   401
      }
Chengsong
parents:
diff changeset
   402
      else throw new Exception("Not matched")
Chengsong
parents:
diff changeset
   403
    }
Chengsong
parents:
diff changeset
   404
    case c::cs => {
Chengsong
parents:
diff changeset
   405
      val (r_simp, f_simp) = simp(der(c, r))
Chengsong
parents:
diff changeset
   406
      inj(r, c, f_simp(lex_simp(r_simp, cs)))
Chengsong
parents:
diff changeset
   407
    }
Chengsong
parents:
diff changeset
   408
  }
Chengsong
parents:
diff changeset
   409
Chengsong
parents:
diff changeset
   410
  def lexing_simp(r: Rexp, s: String) : Val = lex_simp(r, s.toList)
Chengsong
parents:
diff changeset
   411
Chengsong
parents:
diff changeset
   412
  //println(lexing_simp(("a" | "ab") ~ ("b" | ""), "ab"))
Chengsong
parents:
diff changeset
   413
Chengsong
parents:
diff changeset
   414
  // filters out all white spaces
Chengsong
parents:
diff changeset
   415
  def tokenise(r: Rexp, s: String) = 
Chengsong
parents:
diff changeset
   416
    env(lexing_simp(r, s)).filterNot { _._1 == "w"}
Chengsong
parents:
diff changeset
   417
Chengsong
parents:
diff changeset
   418
Chengsong
parents:
diff changeset
   419
  //reads the string from a file 
Chengsong
parents:
diff changeset
   420
  def fromFile(name: String) : String = 
Chengsong
parents:
diff changeset
   421
    io.Source.fromFile(name).mkString
Chengsong
parents:
diff changeset
   422
Chengsong
parents:
diff changeset
   423
  def tokenise_file(r: Rexp, name: String) = 
Chengsong
parents:
diff changeset
   424
    tokenise(r, fromFile(name))
Chengsong
parents:
diff changeset
   425
  
Chengsong
parents:
diff changeset
   426
  //   Testing
Chengsong
parents:
diff changeset
   427
  //============
Chengsong
parents:
diff changeset
   428
Chengsong
parents:
diff changeset
   429
  def time[T](code: => T) = {
Chengsong
parents:
diff changeset
   430
    val start = System.nanoTime()
Chengsong
parents:
diff changeset
   431
    val result = code
Chengsong
parents:
diff changeset
   432
    val end = System.nanoTime()
Chengsong
parents:
diff changeset
   433
    println((end - start)/1.0e9)
Chengsong
parents:
diff changeset
   434
    result
Chengsong
parents:
diff changeset
   435
  }
Chengsong
parents:
diff changeset
   436
Chengsong
parents:
diff changeset
   437
  //--------------------------------------------------------------------------------------------------------END OF NON-BITCODE PART
Chengsong
parents:
diff changeset
   438
Chengsong
parents:
diff changeset
   439
  // bnullable function: tests whether the aregular 
Chengsong
parents:
diff changeset
   440
  // expression can recognise the empty string
Chengsong
parents:
diff changeset
   441
  def bnullable (r: ARexp) : Boolean = r match {
Chengsong
parents:
diff changeset
   442
    case AZERO => false
Chengsong
parents:
diff changeset
   443
    case AONE(_) => true
Chengsong
parents:
diff changeset
   444
    case ACHAR(_,_) => false
Chengsong
parents:
diff changeset
   445
    case AALTS(_, rs) => rs.exists(bnullable)
Chengsong
parents:
diff changeset
   446
    case ASEQ(_, r1, r2) => bnullable(r1) && bnullable(r2)
Chengsong
parents:
diff changeset
   447
    case ASTAR(_, _) => true
Chengsong
parents:
diff changeset
   448
  }
Chengsong
parents:
diff changeset
   449
Chengsong
parents:
diff changeset
   450
  def mkepsBC(r: ARexp) : Bits = r match {
Chengsong
parents:
diff changeset
   451
    case AONE(bs) => bs
Chengsong
parents:
diff changeset
   452
    case AALTS(bs, rs) => {
Chengsong
parents:
diff changeset
   453
      val n = rs.indexWhere(bnullable)
Chengsong
parents:
diff changeset
   454
      bs ++ mkepsBC(rs(n))
Chengsong
parents:
diff changeset
   455
    }
Chengsong
parents:
diff changeset
   456
    case ASEQ(bs, r1, r2) => bs ++ mkepsBC(r1) ++ mkepsBC(r2)
Chengsong
parents:
diff changeset
   457
    case ASTAR(bs, r) => bs ++ List(Z)
Chengsong
parents:
diff changeset
   458
  }
Chengsong
parents:
diff changeset
   459
Chengsong
parents:
diff changeset
   460
  // derivative of a regular expression w.r.t. a character
Chengsong
parents:
diff changeset
   461
  def bder(c: Char, r: ARexp) : ARexp = r match {
Chengsong
parents:
diff changeset
   462
    case AZERO => AZERO
Chengsong
parents:
diff changeset
   463
    case AONE(_) => AZERO
12
768b833d6230 removed C(c) The retrieve and code in the previous version is still not correct and will crash. no prob now.
Chengsong
parents: 11
diff changeset
   464
    case ACHAR(bs, f) => if (c == f) AONE(bs) else AZERO
0
Chengsong
parents:
diff changeset
   465
    case AALTS(bs, rs) => AALTS(bs, rs.map(bder(c, _)))
Chengsong
parents:
diff changeset
   466
    case ASEQ(bs, r1, r2) => 
Chengsong
parents:
diff changeset
   467
      if (bnullable(r1)) AALT(bs, ASEQ(Nil, bder(c, r1), r2), fuse(mkepsBC(r1), bder(c, r2)))
Chengsong
parents:
diff changeset
   468
      else ASEQ(bs, bder(c, r1), r2)
Chengsong
parents:
diff changeset
   469
    case ASTAR(bs, r) => ASEQ(bs, fuse(List(S), bder(c, r)), ASTAR(Nil, r))
Chengsong
parents:
diff changeset
   470
  }
107
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   471
  def bder_rf(c: Char, r: ARexp) : ARexp = r match {
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   472
    case AZERO => AZERO
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   473
    case AONE(_) => AZERO
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   474
    case ACHAR(bs, f) => if (c == f) AONE(bs) else AZERO
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   475
    case AALTS(bs, rs) => AALTS(bs, rs.map(bder_rf(c, _)))
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   476
    case ASEQ(bs, r1, r2) =>
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   477
      if (bnullable(r1)) AALT(bs, ASEQ(Nil, bder_rf(c, r1), r2), fuse(mkepsBC(r1), bder_rf(c, r2)))
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   478
      else ASEQ(bs, bder_rf(c, r1), r2)
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   479
    case ASTAR(bs, r) => ASEQ(bs, fuse(List(S), bder_rf(c, r)), ASTAR(Nil, r))
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   480
  }
0
Chengsong
parents:
diff changeset
   481
  // derivative w.r.t. a string (iterates bder)
Chengsong
parents:
diff changeset
   482
  @tailrec
Chengsong
parents:
diff changeset
   483
  def bders (s: List[Char], r: ARexp) : ARexp = s match {
Chengsong
parents:
diff changeset
   484
    case Nil => r
Chengsong
parents:
diff changeset
   485
    case c::s => bders(s, bder(c, r))
Chengsong
parents:
diff changeset
   486
  }
107
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   487
  
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   488
  def bders_rf(s: List[Char], r: ARexp) : ARexp = s match {
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   489
    case Nil => r
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   490
    case c::s => bders_rf(s, bder_rf(c, r))
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   491
  }
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   492
  def all_zero_except_alt(rs: List[ARexp], a: ARexp): ARexp = rs match{
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   493
    case Nil => a
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   494
    case AZERO :: rs1 => all_zero_except_alt(rs1, a)
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   495
    case AALTS(bs, rs1) :: rs2 => {
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   496
      if (a == AZERO)
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   497
        all_zero_except_alt(rs2, AALTS(bs, rs1))
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   498
      else
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   499
        AZERO
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   500
    }
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   501
    case r1 :: rs2 => AZERO
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   502
  }
0
Chengsong
parents:
diff changeset
   503
  def flats(rs: List[ARexp]): List[ARexp] = rs match {
Chengsong
parents:
diff changeset
   504
      case Nil => Nil
Chengsong
parents:
diff changeset
   505
      case AZERO :: rs1 => flats(rs1)
Chengsong
parents:
diff changeset
   506
      case AALTS(bs, rs1) :: rs2 => rs1.map(fuse(bs, _)) ::: flats(rs2)
Chengsong
parents:
diff changeset
   507
      case r1 :: rs2 => r1 :: flats(rs2)
15
Chengsong
parents: 14
diff changeset
   508
  }
17
Chengsong
parents: 16
diff changeset
   509
  /*
15
Chengsong
parents: 14
diff changeset
   510
  def remove(v: Val): Val = v match{
Chengsong
parents: 14
diff changeset
   511
    case Right(v1) => v1
Chengsong
parents: 14
diff changeset
   512
    case Left(v1) => v1
Chengsong
parents: 14
diff changeset
   513
    case _ => throw new Exception("Not removable")
17
Chengsong
parents: 16
diff changeset
   514
  }*/
15
Chengsong
parents: 14
diff changeset
   515
  def augment(v: Val, i: Int): Val = if(i > 1) augment(Right(v), i - 1) else Right(v)
Chengsong
parents: 14
diff changeset
   516
//an overly complex version
Chengsong
parents: 14
diff changeset
   517
/*
Chengsong
parents: 14
diff changeset
   518
    if(rel_dist >0){//the regex we are dealing with is not what v points at
Chengsong
parents: 14
diff changeset
   519
      rs match{
Chengsong
parents: 14
diff changeset
   520
        case Nil => throw new Exception("Trying to simplify a non-existent value")
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   521
        case AZERO :: rs1 => right_shift(rs1, rel_dist - 1, remove(v))
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   522
        case AALTS(bs, rs1) :: rs2 => right_shift(rs2, rel_dist - 1, augment(v, rs1.length - 1))//rs1 is guaranteed to have a len geq 2
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   523
        case r1 :: rs2 => right_shift(rs2, rel_dist - 1, v)
15
Chengsong
parents: 14
diff changeset
   524
      }
0
Chengsong
parents:
diff changeset
   525
    }
15
Chengsong
parents: 14
diff changeset
   526
    else if(rel_dist == 0){//we are dealing with regex v is pointing to -- "v->r itself"
Chengsong
parents: 14
diff changeset
   527
      rs match{//r1 cannot be zero
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   528
        AALTS(bs, rs1) :: rs2 => right_shift(  )
15
Chengsong
parents: 14
diff changeset
   529
        AZERO::rs2 => throw new Exception("Value corresponds to zero")
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   530
        r1::rs2 => right_shift(rs2, rel_dist - 1, v)
15
Chengsong
parents: 14
diff changeset
   531
      }
Chengsong
parents: 14
diff changeset
   532
Chengsong
parents: 14
diff changeset
   533
    }
Chengsong
parents: 14
diff changeset
   534
    else{
Chengsong
parents: 14
diff changeset
   535
Chengsong
parents: 14
diff changeset
   536
    }
Chengsong
parents: 14
diff changeset
   537
    */
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   538
  //gives how much the regex at i has shifted right after flatten(on a list of simplified regexes)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   539
  def right_shift(rs: List[ARexp], i: Int): Int = (rs, i) match {
15
Chengsong
parents: 14
diff changeset
   540
    case (_, 0) => 0
Chengsong
parents: 14
diff changeset
   541
    case (Nil, _) => 0
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   542
    case (AZERO :: rs1, _) => right_shift(rs1, i - 1) - 1
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   543
    case (AALTS(bs, rs1) :: rs2, _) => rs1.length - 1 + right_shift(rs2, i - 1)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   544
    case (r1 :: rs2, _) => right_shift(rs2, i - 1)
15
Chengsong
parents: 14
diff changeset
   545
  }
0
Chengsong
parents:
diff changeset
   546
  def rflats(rs: List[Rexp]): List[Rexp] = rs match {
Chengsong
parents:
diff changeset
   547
    case Nil => Nil
Chengsong
parents:
diff changeset
   548
    case ZERO :: rs1 => rflats(rs1)
Chengsong
parents:
diff changeset
   549
    case ALTS(rs1) :: rs2 => rs1 ::: rflats(rs2)
Chengsong
parents:
diff changeset
   550
    case r1 :: rs2 => r1 :: rflats(rs2)
Chengsong
parents:
diff changeset
   551
  }
Chengsong
parents:
diff changeset
   552
  var flats_time = 0L
Chengsong
parents:
diff changeset
   553
  var dist_time = 0L
Chengsong
parents:
diff changeset
   554
  
Chengsong
parents:
diff changeset
   555
  def bsimp(r: ARexp): ARexp = r match {
Chengsong
parents:
diff changeset
   556
    case ASEQ(bs1, r1, r2) => (bsimp(r1), bsimp(r2)) match {
Chengsong
parents:
diff changeset
   557
        case (AZERO, _) => AZERO
Chengsong
parents:
diff changeset
   558
        case (_, AZERO) => AZERO
Chengsong
parents:
diff changeset
   559
        case (AONE(bs2), r2s) => fuse(bs1 ++ bs2, r2s)
Chengsong
parents:
diff changeset
   560
        case (r1s, r2s) => ASEQ(bs1, r1s, r2s)
Chengsong
parents:
diff changeset
   561
    }
Chengsong
parents:
diff changeset
   562
    case AALTS(bs1, rs) => {
Chengsong
parents:
diff changeset
   563
      val rs_simp = rs.map(bsimp)
Chengsong
parents:
diff changeset
   564
      val flat_res = flats(rs_simp)
Chengsong
parents:
diff changeset
   565
      val dist_res = distinctBy(flat_res, erase)
Chengsong
parents:
diff changeset
   566
      dist_res match {
Chengsong
parents:
diff changeset
   567
        case Nil => AZERO
93
Chengsong
parents: 92
diff changeset
   568
        case r :: Nil => fuse(bs1, r)
0
Chengsong
parents:
diff changeset
   569
        case rs => AALTS(bs1, rs)  
Chengsong
parents:
diff changeset
   570
      }
Chengsong
parents:
diff changeset
   571
    }
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   572
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
0
Chengsong
parents:
diff changeset
   573
    case r => r
Chengsong
parents:
diff changeset
   574
  }
107
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   575
  //minimise fuse operation if possible
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   576
  def bsimp_rf(r: ARexp):ARexp = r match {
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   577
     case ASEQ(bs1, r1, r2) => (bsimp_rf(r1), bsimp_rf(r2)) match {
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   578
        case (AZERO, _) => AZERO
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   579
        case (_, AZERO) => AZERO
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   580
        case (AONE(bs2), r2s) => fuse(bs1 ++ bs2, r2s)
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   581
        case (r1s, r2s) => ASEQ(bs1, r1s, r2s)
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   582
    }
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   583
    case AALTS(bs1, rs) => {
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   584
      //after map simp, before flats, check if all others simplify to 0s, if yes, do not fuse
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   585
      val rs_simp = rs.map(bsimp_rf)
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   586
      //prevent fuse from happening
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   587
      val fuse_alts = all_zero_except_alt(rs_simp, AZERO)//returns AZERO if not the case, return AALTS if yes
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   588
      if(fuse_alts == AZERO){
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   589
        val flat_res = flats(rs_simp)
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   590
        val dist_res = distinctBy(flat_res, erase)
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   591
        dist_res match {
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   592
          case Nil => AZERO
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   593
          case r :: Nil => fuse(bs1, r)
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   594
          case rs => AALTS(bs1, rs)  
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   595
        }
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   596
      }
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   597
      else{
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   598
        fuse(bs1, fuse_alts)
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   599
      }
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   600
    }
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   601
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   602
    case r => r   
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
   603
  }
93
Chengsong
parents: 92
diff changeset
   604
  //only print at the top level
Chengsong
parents: 92
diff changeset
   605
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   606
  //find_pos returns the index of a certain regex in a list of regex
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   607
  //the leftmost regex is given the index 0 and the regex next to it
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   608
  //is given 1 and so on 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   609
  //it needs the value to point out which regex it wants to get index of
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   610
  //find_pos_aux does essentially the same thing as find_pos, except that
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   611
  //it receives an alts instead of a list of regular expressions
17
Chengsong
parents: 16
diff changeset
   612
  def find_pos(v: Val, rs: List[ARexp]): Int = (v, rs) match{
Chengsong
parents: 16
diff changeset
   613
    case (v, r::Nil) => 0
15
Chengsong
parents: 14
diff changeset
   614
    case (Right(v), r::rs) => find_pos(v, rs) + 1
17
Chengsong
parents: 16
diff changeset
   615
    case (Left(v), r::rs) => 0
Chengsong
parents: 16
diff changeset
   616
    //case (v, _) => 0
Chengsong
parents: 16
diff changeset
   617
  }
Chengsong
parents: 16
diff changeset
   618
  def find_pos_aux(v: Val, r: ARexp): Int = r match {
Chengsong
parents: 16
diff changeset
   619
    case AALTS(bs, rs) => find_pos(v, rs)
Chengsong
parents: 16
diff changeset
   620
    case r => 0
15
Chengsong
parents: 14
diff changeset
   621
  }
17
Chengsong
parents: 16
diff changeset
   622
  def remove(v: Val, rs: List[ARexp]) : Val = (v,rs) match {//remove the outmost layer of ALTS's Left and Right
Chengsong
parents: 16
diff changeset
   623
    //we have to use r to detect the bound of nested L/Rs
Chengsong
parents: 16
diff changeset
   624
    case (v, r::Nil) => v
Chengsong
parents: 16
diff changeset
   625
    case (Right(v), r::rs) => remove(v, rs) 
15
Chengsong
parents: 14
diff changeset
   626
    case (Left(v), r::rs) => v 
17
Chengsong
parents: 16
diff changeset
   627
    //case (v, r::Nil) => v
15
Chengsong
parents: 14
diff changeset
   628
  }
16
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   629
  def simple_end(v: Val): Boolean = v match {
15
Chengsong
parents: 14
diff changeset
   630
    case Left(v) => return false
Chengsong
parents: 14
diff changeset
   631
    case Right(v) => return simple_end(v)
Chengsong
parents: 14
diff changeset
   632
    case v => return true
Chengsong
parents: 14
diff changeset
   633
  }
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   634
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   635
  //tells if rs[i] after flatten is at the right end 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   636
  def isend(v: Val, rs: List[ARexp], i: Int): Boolean = {//TODO: here the slice api i am not familiar with so this call might be incorrect and crash the bsimp2
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   637
    val rsbh = rs.slice(i + 1, rs.length)
15
Chengsong
parents: 14
diff changeset
   638
    val out_end = if(flats(rsbh) == Nil) true else false
Chengsong
parents: 14
diff changeset
   639
    val inner_end = simple_end(v)
Chengsong
parents: 14
diff changeset
   640
    inner_end && out_end
Chengsong
parents: 14
diff changeset
   641
  }
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   642
  //get the coat of v and wears it on vs
16
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   643
  def get_coat(v: Val, rs: List[Rexp], vs: Val): Val = (v, rs) match{//the dual operation of remove(so-called by myself)
15
Chengsong
parents: 14
diff changeset
   644
    case (Right(v), r::Nil) => Right(vs)
Chengsong
parents: 14
diff changeset
   645
    case (Left(v), r::rs) => Left(vs) 
Chengsong
parents: 14
diff changeset
   646
    case (Right(v), r::rs) => Right(get_coat(v, rs, vs))
Chengsong
parents: 14
diff changeset
   647
  }
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   648
  //coat does the job of "coating" a value
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   649
  //given the number of right outside it
15
Chengsong
parents: 14
diff changeset
   650
  def coat(v: Val, i: Int) : Val = i match {
Chengsong
parents: 14
diff changeset
   651
    case 0 => v
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   652
    case i => if(i > 0) coat(Right(v), i - 1) else {println(v,i); throw new Exception("coat minus")}
15
Chengsong
parents: 14
diff changeset
   653
  }
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   654
  def decoat(v:Val, i: Int) : Val = i match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   655
    case 0 => v
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   656
    case i => v match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   657
      case Right(v0) => decoat(v0, i - 1)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   658
      case _ => throw new Exception("bad args decoat")
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   659
    }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   660
  }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   661
  //given a regex, and a value, return the rectification function for how to rebuild the original value from the simplified value
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   662
  
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   663
  def vunsimp(r: ARexp, v: Val) : Val => Val = (r, v) match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   664
    case (ASEQ(bs1, r1, r2), Sequ(v1, v2)) => (bsimp2(r1, v1), bsimp2(r2, v2)) match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   665
        case ((AZERO, _), (_, _) )=> throw new Exception("bad arguments")
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   666
        case ((_, _), (AZERO, _)) => throw new Exception("bad arguments")
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   667
        case ((AONE(bs2), v1s) , (r2s, v2s)) => (vtails => Sequ(v1, vunsimp(r2, v2)(vtails)))  //(fuse(bs1 ++ bs2, r2s), v2s )//v2 tells how to retrieve bits in r2s, which is enough as the bits of the first part of the sequence has already been integrated to the top level of the second regx.
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   668
        case ((r1s, v1s), (r2s, v2s)) => (vsmall => vsmall match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   669
          case Sequ(v1small, v2small) => Sequ(vunsimp(r1, v1)(v1small), vunsimp(r2, v2)(v2small))
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   670
          case _ => {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   671
            println(vsmall) ;
151
Chengsong
parents: 150
diff changeset
   672
            println(aregex_simple_print(r1))
Chengsong
parents: 150
diff changeset
   673
            println(v1)
Chengsong
parents: 150
diff changeset
   674
            println(aregex_simple_print( r2))
Chengsong
parents: 150
diff changeset
   675
            println(v2)
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   676
            throw new Exception("bad arguments sequ")
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   677
          }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   678
          //(ASEQ(bs1, r1s, r2s),  Sequ(v1s, v2s))
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   679
        })
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   680
    }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   681
    case (AALTS(bs1, rs), v) => {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   682
      val init_ind = find_pos(v, rs)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   683
      val rightend1 = if(init_ind + 1 == rs.length) true else false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   684
      val inner_rectfunct = vunsimp(rs(init_ind), remove(v, rs))//remove all the outer layers of left and right in v to  match the regx rs[i]
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   685
      val vpointr = bsimp2(rs(init_ind), remove(v, rs))
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   686
      val target_vs = vpointr._2
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   687
      val target_rs = vpointr._1
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   688
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   689
      val rs_simp = rs.map(bsimp)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   690
      val target_vs_kernel = target_rs match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   691
        case AALTS(bs2, rs2) => remove(target_vs, rs2)//remove the secondary layer of left and right
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   692
        case r => target_vs
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   693
      }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   694
      val target_vs_outerlayers = target_rs match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   695
        case AALTS(bs2, rs2) => find_pos(target_vs, rs2)//remove the secondary layer of left and right
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   696
        case r => 0
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   697
      }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   698
      val rightend2 = target_rs match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   699
        case AALTS(bs2, rs2) => if(find_pos(target_vs, rs2) == rs2.length - 1) true else false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   700
        case r => false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   701
      }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   702
      val isalts = target_rs match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   703
        case AALTS(bs2, rs2) =>  true 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   704
        case r => false
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   705
      }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   706
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   707
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   708
      val flat_res = flats(rs_simp)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   709
      val flats_shit1 = right_shift(rs_simp, init_ind)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   710
      val flats_shift2 = find_pos_aux(target_vs, target_rs)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   711
      val flats_shift =  flats_shit1 + flats_shift2//right_shift used to be called flats_vsimp
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   712
      val new_ind = init_ind + flats_shift
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   713
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   714
      val dist_res = distinctBy(flat_res, erase)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   715
      val front_part = distinctBy(flat_res.slice(0, new_ind + 1), erase)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   716
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   717
      val vdb = if(dist_res.length == front_part.length )//that means the regex we are interested in is at the end of the list
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   718
      {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   719
        coat(target_vs_kernel, front_part.length - 1)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   720
      }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   721
      else{
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   722
        coat(Left(target_vs_kernel), front_part.length - 1)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   723
      }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   724
      if(rightend1){
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   725
        if(rightend2){
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   726
          kernel_coated: Val => 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   727
          decoat(kernel_coated, front_part.length - 1) match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   728
            case Left(vk) => coat(inner_rectfunct(coat(vk, target_vs_outerlayers)), init_ind)//add clause: if rs_simp(init_ind) is an alts
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   729
            case vk => coat(inner_rectfunct(coat(vk, target_vs_outerlayers)), init_ind)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   730
          }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   731
        }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   732
        else{
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   733
          kernel_coated: Val => 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   734
          decoat(kernel_coated, front_part.length - 1) match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   735
            case Left(vk) => if(isalts) coat(inner_rectfunct(coat(Left(vk), target_vs_outerlayers)), init_ind) 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   736
              else coat(inner_rectfunct(coat((vk), target_vs_outerlayers)), init_ind)//add clause: if rs_simp(init_ind) is an alts
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   737
            case vk => if(isalts) coat(inner_rectfunct(coat(Left(vk), target_vs_outerlayers)), init_ind)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   738
              else coat(inner_rectfunct(coat((vk), target_vs_outerlayers)), init_ind)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   739
          }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   740
        }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   741
      }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   742
      else{
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   743
        if(rightend2){
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   744
          kernel_coated: Val => 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   745
          decoat(kernel_coated, front_part.length - 1) match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   746
            case Left(vk) => coat(Left(inner_rectfunct(coat(vk, target_vs_outerlayers))), init_ind)//add clause: if rs_simp(init_ind) is an alts
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   747
            case vk => coat(Left(inner_rectfunct(coat(vk, target_vs_outerlayers))), init_ind)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   748
          } 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   749
        }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   750
        else{
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   751
          kernel_coated: Val => 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   752
          decoat(kernel_coated, front_part.length - 1) match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   753
            case Left(vk) => if(isalts) coat(Left(inner_rectfunct(coat(Left(vk), target_vs_outerlayers))), init_ind)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   754
              else coat(Left(inner_rectfunct(coat(vk, target_vs_outerlayers))), init_ind)//add clause: if rs_simp(init_ind) is an alts
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   755
            case vk => if(isalts) coat(Left(inner_rectfunct(coat(Left(vk), target_vs_outerlayers))), init_ind)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   756
              else coat(Left(inner_rectfunct(coat(vk, target_vs_outerlayers))), init_ind)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   757
          }     
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   758
        }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   759
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   760
      }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   761
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   762
    }
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   763
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   764
    case (r, v) => (v => v)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   765
  }
17
Chengsong
parents: 16
diff changeset
   766
  //This version takes a regex and a value, return a simplified regex and its corresponding simplified value 
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   767
  //def flats2(r: Arexp, v: val): (ARexp, Val) = (r, v) match{
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   768
  //  case (AALTS(bs, rs), Right(v0)) => rs match {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   769
  //    case Nil => (AALTS(bs, Nil), v)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   770
  //    case AZERO::rs0 =>  flats2(AALTS(bs, rs0), v0) 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   771
  //    case 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   772
  //  case (AALTS(bs, rs), Left(v0)) => 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   773
  //}
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   774
  //liangren qixinxieli zuo yixie shiqing 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   775
  //shi xinzhaobuxuan de moqi
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   776
  //ni yao fanzhangben 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   777
  //na wo jiu zhineng peini fanzhangben 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   778
  //ni xianshuo wo weini zuole haoduohaoduo
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   779
  //na wo jiu haohao gen ni fenxifenxi
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   780
  //ni daodi zuole shenme 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   781
  //ni meizuo shenme 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   782
  //zhishi yinwei ni lei 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   783
  //suoyi ni juede ni zuole haoduo 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   784
  //zuofanyeshi 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   785
  //shi weile ni shiwu cai zuo name jingxi
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   786
  //shiwo de hua meitian sancan huadeshijian 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   787
  //buchaoguo liangxiaoshi
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   788
  //ni zuode henduoshihou doushi weile ziji
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   789
  //ni zuoshiqing de shihou ye zongshi bawo jiaolai bangmang
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   790
  //ni de xiaolv hai hendi 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   791
  //zonghe kanlai
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   792
  //ni buhuizhaoguziji meiyoudandang nenglibuzu haizisi
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   793
  //suoyi wo zui taoyan gennishuozhexie 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   794
  //shuoli bianbuguolai 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   795
  //jiu ba ren xiaoshihoude shiqing nachulaishuo, lai exin ren
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   796
  //nibangwo daoyibeishui, wo buleyujieshou, wo bushuoxiexie 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   797
  //nandao woshuo sheiyaonidaole, zoukai? buyaoni geiwo dao? wo ziji dao?
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   798
  //nishuo qiantou doushi ni zaizuo 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   799
  //zheliwoyao buchong
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   800
  //quancheng ni yigerenzuo yidunfan de cishu
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   801
  //dagai you duoshaoci?
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   802
  //kending you jici, dan bushi duoshu
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   803
  //duoshu shi wo huilai yihou 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   804
  //ni rangwo lai chaocai huozhe lai jieguan zuowan shengyude gongzuo 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   805
  //ni zuo de zhexieshihou 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   806
  //yiban jiushi lianggecai 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   807
  //huozhe yicai yitang
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   808
  //wo hui renwei 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   809
  //zhe shi ni shenti keyi shiying de gongzuoliang
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   810
  //moren ni ziji hui zhaoguhao ziji 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   811
  //ruguo ni leile, yehui lai zhaowo bangmang
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   812
  //suoyi wo moren ni zai zhe qijian shi meiyou
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   813
  //guolao, ruguo you, wo renwei 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   814
  //1 ni meiyou zhaoguhao niziji
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   815
  //2 nimeiyou jishi xiangwo xunqiu bangzhu
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   816
  //3 ni jibensangshi laodongnengli le,
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   817
  //yihou huolu doushi wo lai bao le jiu wanle
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   818
  //niziji meinengli jiu buyao dui zuoshi de ren 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   819
  //tiaosanjiansi
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   820
  //ni shibushi taomi xigecai jiu hui lei
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   821
  //na shuoming
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   822
  //yaome ni tili taicha--jibensangshi laodongli
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   823
  //yaome ni fangfabuheshi(xiaolvdi, zishiyouwenti daozhi shentilaosun)--ni yinggai tiaozheng ziji zuoshide fangfa, women yiqilai zhaozhao yuanyin
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   824
  //cuowu de silushi: nikanwo dou zhemelei le,
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   825
  //shuoming wo zuole henduo, ni bu tiliangwo
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   826
  //ni zuo zhexie doushi yinggaide
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   827
  //yinwei wo shi nimama erqie wo leile
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   828
  def pos_i(rs: List[ARexp], v: Val): Int = (rs, v) match {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   829
    case (r::Nil,         v1) => 0
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   830
    case ( r::rs1, Right(v) ) => pos_i(rs1, v) + 1
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   831
    case ( r::rs1, Left(v)  ) => 0
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   832
  }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   833
  def pos_v(rs: List[ARexp], v: Val): Val = (rs, v) match {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   834
    case (r::Nil,         v1) => v1
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   835
    case (r::rs1, Right(v)  ) => pos_v(rs1, v)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   836
    case (r::rs1, Left(v)   ) => v
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   837
  }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   838
  def unify(rs: List[ARexp], v: Val): Val = {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   839
    Position( pos_i(rs, v), pos_v(rs, v) )
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   840
  }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   841
  def deunify(rs_length: Int, v: Val): Val = v match{
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   842
    case Position(i, v0) => {
151
Chengsong
parents: 150
diff changeset
   843
      if(i <0) {throw new Exception("deunify minus")} 
Chengsong
parents: 150
diff changeset
   844
      else if(rs_length == 1) { v0}
Chengsong
parents: 150
diff changeset
   845
      else if(rs_length - 1 == i) {coat(v0, i)} 
Chengsong
parents: 150
diff changeset
   846
      else {coat(Left(v0), i)}
Chengsong
parents: 150
diff changeset
   847
    }
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   848
    case _ => throw new Exception("deunify error")
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   849
  }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   850
  def flats2(front: List[ARexp], i: Int, rs: List[ARexp], v: Val): (List[ARexp], Val) = v match {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   851
    case Position(j, v0) => {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   852
      if (i < 0) (front ::: flats(rs), Position(j, v0) ) 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   853
      else if(i == 0){
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   854
        rs match {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   855
          case AALTS(bs, rs1) :: rs2 => ( (front ::: rs1.map(fuse(bs, _))):::flats(rs2), Position(j + rs1.length - 1, pos_v(rs1, v0)))
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   856
          case r::rs2 => (front ::: List(r) ::: flats(rs2), Position(j, v0))
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   857
          case _ => throw new Exception("flats2 i = 0")
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   858
        }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   859
      }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   860
      else{
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   861
        rs match {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   862
          case AZERO::rs1 => flats2(front, i - 1, rs1, Position(j - 1, v0))
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   863
          case AALTS(bs, rs1) ::rs2 => flats2(front:::rs1.map(fuse(bs, _)), i - 1, rs2, Position(j + rs1.length - 1, v0))
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   864
          case r::rs1 => flats2(front:::List(r), i - 1, rs1, Position(j, v0)) 
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   865
          case _ => throw new Exception("flats2 i>0")
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   866
        }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   867
      }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   868
    }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   869
    case _ => throw new Exception("flats2 error")
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   870
  }
151
Chengsong
parents: 150
diff changeset
   871
  def distinctBy2[B, C](j: Int, v: Val, xs: List[B], f: B => C, acc: List[C] = Nil, res: List[B] = Nil): (List[B], Val) = xs match {
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   872
    case Nil => (res, v)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   873
    case (x::xs) => {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   874
      val re = f(x)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   875
      if (acc.contains(re)) v match { 
151
Chengsong
parents: 150
diff changeset
   876
        case Position(i, v0) => if(j > 0) distinctBy2(j - 1, Position(i - 1, v0), xs, f, acc, res)  
Chengsong
parents: 150
diff changeset
   877
        else if(j < 0)distinctBy2(j - 1, Position(i, v0), xs, f, acc, res) else throw new Exception("Value not POSIX")
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   878
        case _ => throw new Exception("dB2")
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   879
      }
151
Chengsong
parents: 150
diff changeset
   880
      else distinctBy2(j - 1, v, xs, f, re::acc, x::res)
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   881
    }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   882
  }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   883
   def bsimp2(r: ARexp, v: Val): (ARexp, Val) = (r,v) match{
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   884
    case (ASEQ(bs1, r1, r2), Sequ(v1, v2)) => (bsimp2(r1, v1), bsimp2(r2, v2)) match {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   885
        case ((AZERO, _), (_, _) )=> (AZERO, undefined)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   886
        case ((_, _), (AZERO, _)) => (AZERO, undefined)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   887
        case ((AONE(bs2), v1s) , (r2s, v2s)) => (fuse(bs1 ++ bs2, r2s), v2s )//v2 tells how to retrieve bits in r2s, which is enough as the bits of the first part of the sequence has already been integrated to the top level of the second regx.
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   888
        case ((r1s, v1s), (r2s, v2s)) => (ASEQ(bs1, r1s, r2s),  Sequ(v1s, v2s))
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   889
    }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   890
    case (AALTS(bs1, rs), v) => {
151
Chengsong
parents: 150
diff changeset
   891
      println("Entry into AALTS")
Chengsong
parents: 150
diff changeset
   892
      rs.map(println(aregex_simple_print()))
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   893
      val vlist = unify(rs, v)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   894
      vlist match {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   895
        case Position(i, v0) => {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   896
          val v_simp = bsimp2(rs(i), v0)._2
151
Chengsong
parents: 150
diff changeset
   897
          println("map on bsimp")
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   898
          val rs_simp = rs.map(bsimp)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   899
          val flat_res = flats2( Nil, i, rs_simp, Position(i, v_simp) )
151
Chengsong
parents: 150
diff changeset
   900
          println("list after flats2")
Chengsong
parents: 150
diff changeset
   901
          flat_res._1.map(println(aregex_simple_print(_)))
Chengsong
parents: 150
diff changeset
   902
          val dist_res = distinctBy2(i, flat_res._2, flat_res._1, erase)
Chengsong
parents: 150
diff changeset
   903
          println("list after distinctBy2")
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   904
          val rs_new = dist_res._1
151
Chengsong
parents: 150
diff changeset
   905
          rs_new.map(println(aregex_simple_print(_)))
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   906
          val v_new = deunify(rs_new.length, dist_res._2)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   907
          rs_new match {
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   908
            case Nil => (AZERO, undefined)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   909
            case s :: Nil => (fuse(bs1, s), v_new)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   910
            case rs => (AALTS(bs1, rs), v_new)
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   911
          }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   912
        }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   913
        case _ => throw new Exception("Funny vlist bsimp2")
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   914
      }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   915
    }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   916
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   917
    case (r, v) => (r, v)  
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   918
  }
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   919
  /*def bsimp2(r: ARexp, v: Val): (ARexp, Val) = (r,v) match{
17
Chengsong
parents: 16
diff changeset
   920
    case (ASEQ(bs1, r1, r2), Sequ(v1, v2)) => (bsimp2(r1, v1), bsimp2(r2, v2)) match {
Chengsong
parents: 16
diff changeset
   921
        case ((AZERO, _), (_, _) )=> (AZERO, undefined)
Chengsong
parents: 16
diff changeset
   922
        case ((_, _), (AZERO, _)) => (AZERO, undefined)
Chengsong
parents: 16
diff changeset
   923
        case ((AONE(bs2), v1s) , (r2s, v2s)) => (fuse(bs1 ++ bs2, r2s), v2s )//v2 tells how to retrieve bits in r2s, which is enough as the bits of the first part of the sequence has already been integrated to the top level of the second regx.
Chengsong
parents: 16
diff changeset
   924
        case ((r1s, v1s), (r2s, v2s)) => (ASEQ(bs1, r1s, r2s),  Sequ(v1s, v2s))
Chengsong
parents: 16
diff changeset
   925
    }
Chengsong
parents: 16
diff changeset
   926
    case (AALTS(bs1, rs), v) => {
Chengsong
parents: 16
diff changeset
   927
      val init_ind = find_pos(v, rs)
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   928
      val vpointr = bsimp2(rs(init_ind), remove(v, rs))//remove all the outer layers of left and right in v to  match the regx rs[i]
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   929
      val target_sv = vpointr._2
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   930
      val target_sr = vpointr._1
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   931
17
Chengsong
parents: 16
diff changeset
   932
      val rs_simp = rs.map(bsimp)
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   933
      val target_vs_kernel = target_sr match {
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   934
        case AALTS(bs2, rs2) => remove(target_sv, rs2)//if rs(init_ind) after simp is also an alts, we remove the R(....L(v)) outside v
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   935
        case r => target_sv
17
Chengsong
parents: 16
diff changeset
   936
      }
Chengsong
parents: 16
diff changeset
   937
      val flat_res = flats(rs_simp)
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   938
      val flats_shift1 = right_shift(rs_simp, init_ind)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   939
      val flats_base = find_pos_aux(target_sv, target_sr)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   940
      val flats_shift =  flats_shift1 + flats_base//right_shift used to be called flats_vsimp
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   941
      val new_ind = init_ind + flats_shift
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   942
17
Chengsong
parents: 16
diff changeset
   943
      val dist_res = distinctBy(flat_res, erase)
Chengsong
parents: 16
diff changeset
   944
      val front_part = distinctBy(flat_res.slice(0, new_ind + 1), erase)
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   945
17
Chengsong
parents: 16
diff changeset
   946
      val vdb = if(dist_res.length == front_part.length )//that means the regex we are interested in is at the end of the list
Chengsong
parents: 16
diff changeset
   947
      {
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   948
        coat(target_vs_kernel, front_part.length - 1)
17
Chengsong
parents: 16
diff changeset
   949
      }
Chengsong
parents: 16
diff changeset
   950
      else{
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   951
        coat(Left(target_vs_kernel), front_part.length - 1)
17
Chengsong
parents: 16
diff changeset
   952
      }
Chengsong
parents: 16
diff changeset
   953
      dist_res match {
Chengsong
parents: 16
diff changeset
   954
        case Nil => (AZERO, undefined)
Chengsong
parents: 16
diff changeset
   955
        case s :: Nil => (fuse(bs1, s), vdb)
Chengsong
parents: 16
diff changeset
   956
        case rs => (AALTS(bs1, rs), vdb)
Chengsong
parents: 16
diff changeset
   957
      }
Chengsong
parents: 16
diff changeset
   958
    }
Chengsong
parents: 16
diff changeset
   959
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
Chengsong
parents: 16
diff changeset
   960
    case (r, v) => (r, v)  
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
   961
  }*/
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   962
  //the below are all residuals from the bsimp2 function 
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   963
        //val vs_for_coating = if(isend(vs._2, rs_simp, init_ind)||flat_res.length == 1) vs_kernel else Left(vs_kernel)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   964
        //val vf = coat(vs_for_coating, new_ind)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   965
      //flats2 returns a list of regex and a single v
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   966
      //now |- vf: ALTS(bs1, flat_res)
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   967
      //phase 2 transformation so that aalts(bs1, rsf) => aalts(bs, rsdb) and vf => vdb
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   968
            //val size_reduction = new_ind + 1 - front_part.length
17
Chengsong
parents: 16
diff changeset
   969
  def vsimp(r: ARexp, v: Val): Val = bsimp2(r, v)._2
Chengsong
parents: 16
diff changeset
   970
  /*This version was first intended for returning a function however a value would be simpler.
15
Chengsong
parents: 14
diff changeset
   971
  def bsimp2(r: ARexp, v: Val): (ARexp, Val => Val) = (r,v) match{
Chengsong
parents: 14
diff changeset
   972
    case (ASEQ(bs1, r1, r2), v) => (bsimp2(r1), bsimp2(r2)) match {
Chengsong
parents: 14
diff changeset
   973
        case ((AZERO, _), (_, _) )=> (AZERO, undefined)
Chengsong
parents: 14
diff changeset
   974
        case ((_, _), (AZERO, _)) => (AZERO, undefined)
Chengsong
parents: 14
diff changeset
   975
        case ((AONE(bs2), f1) , (r2s, f2)) => (fuse(bs1 ++ bs2, r2s), lambda v => v match { case Sequ(_, v) => f2(v) } )
Chengsong
parents: 14
diff changeset
   976
        case ((r1s, f1), (r2s, f2)) => (ASEQ(bs1, r1s, r2s), lambda v => v match {case Sequ(v1, v2) => Sequ(f1(v1), f2(v2))}
Chengsong
parents: 14
diff changeset
   977
    }
Chengsong
parents: 14
diff changeset
   978
    case AALTS(bs1, rs) => {
Chengsong
parents: 14
diff changeset
   979
      val init_ind = find_pos(v, rs)
Chengsong
parents: 14
diff changeset
   980
      val vs = bsimp2(rs[init_ind], remove(v, rs))//remove all the outer layers of left and right in v to  match the regx rs[i]
Chengsong
parents: 14
diff changeset
   981
      val rs_simp = rs.map(bsimp)
Chengsong
parents: 14
diff changeset
   982
      val vs_kernel = rs_simp[init_ind] match {
Chengsong
parents: 14
diff changeset
   983
        case AALTS(bs2, rs2) => remove(vs, rs_simp[init_ind])//remove the secondary layer of left and right
Chengsong
parents: 14
diff changeset
   984
        case r => vs
Chengsong
parents: 14
diff changeset
   985
      }
Chengsong
parents: 14
diff changeset
   986
      val vs_for_coating = if(isend(vs, rs_simp, init_ind)) vs_kernel else Left(vs_kernel)
Chengsong
parents: 14
diff changeset
   987
Chengsong
parents: 14
diff changeset
   988
      val r_s = rs_simp[init_ind]
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
   989
      val shift = right_shift(vs, rs_simp, init_ind) + find_pos(vs, rs_simp[init_ind])
15
Chengsong
parents: 14
diff changeset
   990
      val vf = coat(vs_for_coating, shift + init_ind)
Chengsong
parents: 14
diff changeset
   991
Chengsong
parents: 14
diff changeset
   992
      val flat_res = flats(rs_simp)//flats2 returns a list of regex and a single v
Chengsong
parents: 14
diff changeset
   993
      val dist_res = distinctBy(flat_res, erase)
Chengsong
parents: 14
diff changeset
   994
      dist_res match {
Chengsong
parents: 14
diff changeset
   995
        case Nil => AZERO
Chengsong
parents: 14
diff changeset
   996
        case s :: Nil => fuse(bs1, s)
Chengsong
parents: 14
diff changeset
   997
        case rs => AALTS(bs1, rs)  
Chengsong
parents: 14
diff changeset
   998
      }
Chengsong
parents: 14
diff changeset
   999
    }
Chengsong
parents: 14
diff changeset
  1000
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
Chengsong
parents: 14
diff changeset
  1001
    case r => r  
16
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
  1002
  }*/
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1003
  def super_bsimp(r: ARexp): ARexp = r match {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1004
    case ASEQ(bs1, r1, r2) => (super_bsimp(r1), super_bsimp(r2)) match {
0
Chengsong
parents:
diff changeset
  1005
        case (AZERO, _) => AZERO
Chengsong
parents:
diff changeset
  1006
        case (_, AZERO) => AZERO
11
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
  1007
        case (AONE(bs2), r2s) => fuse(bs1 ++ bs2, r2s)//万一是(r1, alts(rs))这种形式呢
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
  1008
        case (AALTS(bs2, rs), r2) => AALTS(bs1 ++ bs2, rs.map(r => r match {case AONE(bs3) => fuse(bs3, r2) case r => ASEQ(Nil, r, r2)} ) ) 
0
Chengsong
parents:
diff changeset
  1009
        case (r1s, r2s) => ASEQ(bs1, r1s, r2s)
Chengsong
parents:
diff changeset
  1010
    }
Chengsong
parents:
diff changeset
  1011
    case AALTS(bs1, rs) => {
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1012
      val rs_simp = rs.map(super_bsimp)
0
Chengsong
parents:
diff changeset
  1013
      val flat_res = flats(rs_simp)
Chengsong
parents:
diff changeset
  1014
      val dist_res = distinctBy(flat_res, erase)
Chengsong
parents:
diff changeset
  1015
      dist_res match {
Chengsong
parents:
diff changeset
  1016
        case Nil => AZERO
Chengsong
parents:
diff changeset
  1017
        case s :: Nil => fuse(bs1, s)
Chengsong
parents:
diff changeset
  1018
        case rs => AALTS(bs1, rs)  
Chengsong
parents:
diff changeset
  1019
      }
Chengsong
parents:
diff changeset
  1020
    }
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1021
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
0
Chengsong
parents:
diff changeset
  1022
    case r => r
Chengsong
parents:
diff changeset
  1023
  }
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
  1024
//nice website http://www.nhc.gov.cn/xcs/kpzs/202002/d228d85eaa19412eaaa4eee740f03101.shtml
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
  1025
//orientalism
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1026
0
Chengsong
parents:
diff changeset
  1027
  def simp_weakened(r: Rexp): Rexp = r match {
Chengsong
parents:
diff changeset
  1028
    case SEQ(r1, r2) => (simp_weakened(r1), r2) match {
Chengsong
parents:
diff changeset
  1029
        case (ZERO, _) => ZERO
Chengsong
parents:
diff changeset
  1030
        case (_, ZERO) => ZERO
Chengsong
parents:
diff changeset
  1031
        case (ONE, r2s) => r2s
Chengsong
parents:
diff changeset
  1032
        case (r1s, r2s) => SEQ(r1s, r2s)
Chengsong
parents:
diff changeset
  1033
    }
Chengsong
parents:
diff changeset
  1034
    case ALTS(rs) => {
Chengsong
parents:
diff changeset
  1035
      val rs_simp = rs.map(simp_weakened)
Chengsong
parents:
diff changeset
  1036
      val flat_res = rflats(rs_simp)
Chengsong
parents:
diff changeset
  1037
      val dist_res = rs_simp.distinct
Chengsong
parents:
diff changeset
  1038
      dist_res match {
Chengsong
parents:
diff changeset
  1039
        case Nil => ZERO
Chengsong
parents:
diff changeset
  1040
        case s :: Nil => s
Chengsong
parents:
diff changeset
  1041
        case rs => ALTS(rs)  
Chengsong
parents:
diff changeset
  1042
      }
Chengsong
parents:
diff changeset
  1043
    }
Chengsong
parents:
diff changeset
  1044
    case STAR(r) => STAR(simp_weakened(r))
Chengsong
parents:
diff changeset
  1045
    case r => r
Chengsong
parents:
diff changeset
  1046
  }
Chengsong
parents:
diff changeset
  1047
    
Chengsong
parents:
diff changeset
  1048
  def bders_simp (s: List[Char], r: ARexp) : ARexp = s match {
Chengsong
parents:
diff changeset
  1049
    case Nil => r
Chengsong
parents:
diff changeset
  1050
    case c::s => bders_simp(s, bsimp(bder(c, r)))
Chengsong
parents:
diff changeset
  1051
  }
107
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
  1052
  def bders_simp_rf (s: List[Char], r: ARexp) : ARexp = s match {
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
  1053
    case Nil => r
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
  1054
    case c::s => bders_simp_rf(s, bsimp_rf(bder(c, r)))
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
  1055
  }
b1e365afa29c changes
Chengsong
parents: 93
diff changeset
  1056
  
14
610f14009c0b the property
Chengsong
parents: 12
diff changeset
  1057
  //----------------------------------------------------------------------------experiment bsimp
610f14009c0b the property
Chengsong
parents: 12
diff changeset
  1058
  /*
610f14009c0b the property
Chengsong
parents: 12
diff changeset
  1059
0
Chengsong
parents:
diff changeset
  1060
  */
Chengsong
parents:
diff changeset
  1061
  /*
Chengsong
parents:
diff changeset
  1062
  def time[T](code: => T) = {
Chengsong
parents:
diff changeset
  1063
    val start = System.nanoTime()
Chengsong
parents:
diff changeset
  1064
    val result = code
Chengsong
parents:
diff changeset
  1065
    val end = System.nanoTime()
Chengsong
parents:
diff changeset
  1066
    println((end - start)/1.0e9)
Chengsong
parents:
diff changeset
  1067
    result
Chengsong
parents:
diff changeset
  1068
  }
Chengsong
parents:
diff changeset
  1069
  */
Chengsong
parents:
diff changeset
  1070
  // main unsimplified lexing function (produces a value)
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
  1071
  def blex(s: List[Char], r: ARexp) : Bits = s match {
0
Chengsong
parents:
diff changeset
  1072
    case Nil => if (bnullable(r)) mkepsBC(r) else throw new Exception("Not matched")
Chengsong
parents:
diff changeset
  1073
    case c::cs => {
Chengsong
parents:
diff changeset
  1074
      val der_res = bder(c,r)
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
  1075
      blex(cs, der_res)
0
Chengsong
parents:
diff changeset
  1076
    }
Chengsong
parents:
diff changeset
  1077
  }
Chengsong
parents:
diff changeset
  1078
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
  1079
  def bpre_lexing(r: Rexp, s: String) = blex( s.toList, internalise(r) )
c8ef391dd6f7 vunsimp
Chengsong
parents: 109
diff changeset
  1080
  def blexing(s: String, r: Rexp) : Val = decode(r, blex( s.toList, internalise(r) ) )
0
Chengsong
parents:
diff changeset
  1081
Chengsong
parents:
diff changeset
  1082
  var bder_time = 0L
Chengsong
parents:
diff changeset
  1083
  var bsimp_time = 0L
Chengsong
parents:
diff changeset
  1084
  var mkepsBC_time = 0L
Chengsong
parents:
diff changeset
  1085
  var small_de = 2
Chengsong
parents:
diff changeset
  1086
  var big_de = 5
Chengsong
parents:
diff changeset
  1087
  var usual_de = 3
Chengsong
parents:
diff changeset
  1088
  
Chengsong
parents:
diff changeset
  1089
  def blex_simp(r: ARexp, s: List[Char]) : Bits = s match {
Chengsong
parents:
diff changeset
  1090
    case Nil => {
Chengsong
parents:
diff changeset
  1091
      if (bnullable(r)) {
Chengsong
parents:
diff changeset
  1092
        //println(asize(r))
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1093
        mkepsBC(r)
0
Chengsong
parents:
diff changeset
  1094
      }
Chengsong
parents:
diff changeset
  1095
    else throw new Exception("Not matched")
Chengsong
parents:
diff changeset
  1096
    }
Chengsong
parents:
diff changeset
  1097
    case c::cs => {
Chengsong
parents:
diff changeset
  1098
      val der_res = bder(c,r)
Chengsong
parents:
diff changeset
  1099
      val simp_res = bsimp(der_res)
Chengsong
parents:
diff changeset
  1100
      blex_simp(simp_res, cs)      
Chengsong
parents:
diff changeset
  1101
    }
Chengsong
parents:
diff changeset
  1102
  }
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1103
  def super_blex_simp(r: ARexp, s: List[Char]): Bits = s match {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1104
    case Nil => {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1105
      if (bnullable(r)) {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1106
        mkepsBC(r)
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1107
      }
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1108
      else throw new Exception("Not matched")
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1109
    }
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1110
    case c::cs => {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1111
      super_blex_simp(super_bsimp(bder(c,r)), cs)
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1112
    }
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1113
  }
0
Chengsong
parents:
diff changeset
  1114
  def blex_real_simp(r: ARexp, s: List[Char]): ARexp = s match{
Chengsong
parents:
diff changeset
  1115
    case Nil => r
Chengsong
parents:
diff changeset
  1116
    case c::cs => blex_real_simp(bsimp(bder(c, r)), cs)
Chengsong
parents:
diff changeset
  1117
  }
Chengsong
parents:
diff changeset
  1118
Chengsong
parents:
diff changeset
  1119
Chengsong
parents:
diff changeset
  1120
  //size: of a Aregx for testing purposes 
Chengsong
parents:
diff changeset
  1121
  def size(r: Rexp) : Int = r match {
Chengsong
parents:
diff changeset
  1122
    case ZERO => 1
Chengsong
parents:
diff changeset
  1123
    case ONE => 1
Chengsong
parents:
diff changeset
  1124
    case CHAR(_) => 1
Chengsong
parents:
diff changeset
  1125
    case SEQ(r1, r2) => 1 + size(r1) + size(r2)
Chengsong
parents:
diff changeset
  1126
    case ALTS(rs) => 1 + rs.map(size).sum
Chengsong
parents:
diff changeset
  1127
    case STAR(r) => 1 + size(r)
Chengsong
parents:
diff changeset
  1128
  }
Chengsong
parents:
diff changeset
  1129
Chengsong
parents:
diff changeset
  1130
  def asize(a: ARexp) = size(erase(a))
Chengsong
parents:
diff changeset
  1131
Chengsong
parents:
diff changeset
  1132
Chengsong
parents:
diff changeset
  1133
  // decoding does not work yet
Chengsong
parents:
diff changeset
  1134
  def blexing_simp(r: Rexp, s: String) = {
Chengsong
parents:
diff changeset
  1135
    val bit_code = blex_simp(internalise(r), s.toList)
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1136
    decode(r, bit_code) 
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1137
  }
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1138
  def super_blexing_simp(r: Rexp, s: String) = {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1139
    decode(r, super_blex_simp(internalise(r), s.toList))
0
Chengsong
parents:
diff changeset
  1140
  }
Chengsong
parents:
diff changeset
  1141
Chengsong
parents:
diff changeset
  1142
Chengsong
parents:
diff changeset
  1143
Chengsong
parents:
diff changeset
  1144
Chengsong
parents:
diff changeset
  1145
Chengsong
parents:
diff changeset
  1146
  // Lexing Rules for a Small While Language
Chengsong
parents:
diff changeset
  1147
Chengsong
parents:
diff changeset
  1148
  //symbols
Chengsong
parents:
diff changeset
  1149
  /*
Chengsong
parents:
diff changeset
  1150
  val SYM = PRED("abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ".contains(_))
Chengsong
parents:
diff changeset
  1151
  
Chengsong
parents:
diff changeset
  1152
  //digits
Chengsong
parents:
diff changeset
  1153
  val DIGIT = PRED("0123456789".contains(_))
Chengsong
parents:
diff changeset
  1154
  //identifiers
Chengsong
parents:
diff changeset
  1155
  val ID = SYM ~ (SYM | DIGIT).% 
Chengsong
parents:
diff changeset
  1156
  //numbers
Chengsong
parents:
diff changeset
  1157
  val NUM = STAR(DIGIT)
Chengsong
parents:
diff changeset
  1158
  //keywords
Chengsong
parents:
diff changeset
  1159
  val KEYWORD : Rexp = "skip" | "while" | "do" | "if" | "then" | "else" | "read" | "write" | "true" | "false"
Chengsong
parents:
diff changeset
  1160
  val AKEYWORD: Rexp = ALTS(List("skip" , "while" , "do" , "if" , "then" , "else" , "read" , "write" , "true" , "false"))
Chengsong
parents:
diff changeset
  1161
  //semicolons
Chengsong
parents:
diff changeset
  1162
  val SEMI: Rexp = ";"
Chengsong
parents:
diff changeset
  1163
  //operators
Chengsong
parents:
diff changeset
  1164
  val OP: Rexp = ":=" | "==" | "-" | "+" | "*" | "!=" | "<" | ">" | "<=" | ">=" | "%" | "/"
Chengsong
parents:
diff changeset
  1165
  val AOP: Rexp = ALTS(List(":=" , "==" , "-" , "+" , "*" , "!=" , "<" , ">" , "<=" , ">=" , "%" , "/"))
Chengsong
parents:
diff changeset
  1166
  //whitespaces
Chengsong
parents:
diff changeset
  1167
  val WHITESPACE = PLUS(" " | "\n" | "\t")
Chengsong
parents:
diff changeset
  1168
  //parentheses
Chengsong
parents:
diff changeset
  1169
  val RPAREN: Rexp = ")"
Chengsong
parents:
diff changeset
  1170
  val LPAREN: Rexp = "("
Chengsong
parents:
diff changeset
  1171
  val BEGIN: Rexp = "{"
Chengsong
parents:
diff changeset
  1172
  val END: Rexp = "}"
Chengsong
parents:
diff changeset
  1173
  //strings...but probably needs not
Chengsong
parents:
diff changeset
  1174
  val STRING: Rexp = "\"" ~ SYM.% ~ "\""
Chengsong
parents:
diff changeset
  1175
Chengsong
parents:
diff changeset
  1176
Chengsong
parents:
diff changeset
  1177
Chengsong
parents:
diff changeset
  1178
  val WHILE_REGS = (("k" $ KEYWORD) | 
Chengsong
parents:
diff changeset
  1179
                    ("i" $ ID) | 
Chengsong
parents:
diff changeset
  1180
                    ("o" $ OP) | 
Chengsong
parents:
diff changeset
  1181
                    ("n" $ NUM) | 
Chengsong
parents:
diff changeset
  1182
                    ("s" $ SEMI) | 
Chengsong
parents:
diff changeset
  1183
                    ("str" $ STRING) |
Chengsong
parents:
diff changeset
  1184
                    ("p" $ (LPAREN | RPAREN)) | 
Chengsong
parents:
diff changeset
  1185
                    ("b" $ (BEGIN | END)) | 
Chengsong
parents:
diff changeset
  1186
                    ("w" $ WHITESPACE)).%
Chengsong
parents:
diff changeset
  1187
Chengsong
parents:
diff changeset
  1188
  val AWHILE_REGS = (
Chengsong
parents:
diff changeset
  1189
    ALTS(
Chengsong
parents:
diff changeset
  1190
      List(
Chengsong
parents:
diff changeset
  1191
        ("k" $ AKEYWORD), 
Chengsong
parents:
diff changeset
  1192
                    ("i" $ ID),
Chengsong
parents:
diff changeset
  1193
                    ("o" $ AOP) , 
Chengsong
parents:
diff changeset
  1194
                    ("n" $ NUM) ,
Chengsong
parents:
diff changeset
  1195
                    ("s" $ SEMI) ,
Chengsong
parents:
diff changeset
  1196
                    ("str" $ STRING), 
Chengsong
parents:
diff changeset
  1197
                    ("p" $ (LPAREN | RPAREN)), 
Chengsong
parents:
diff changeset
  1198
                    ("b" $ (BEGIN | END)), 
Chengsong
parents:
diff changeset
  1199
                    ("w" $ WHITESPACE)
Chengsong
parents:
diff changeset
  1200
      )
Chengsong
parents:
diff changeset
  1201
    )
Chengsong
parents:
diff changeset
  1202
  ).%
Chengsong
parents:
diff changeset
  1203
Chengsong
parents:
diff changeset
  1204
*/
Chengsong
parents:
diff changeset
  1205
Chengsong
parents:
diff changeset
  1206
Chengsong
parents:
diff changeset
  1207
  //--------------------------------------------------------------------------------------------------------START OF NON-BITCODE PART (TESTING)
Chengsong
parents:
diff changeset
  1208
  /*
Chengsong
parents:
diff changeset
  1209
  // Two Simple While programs
Chengsong
parents:
diff changeset
  1210
  //========================
Chengsong
parents:
diff changeset
  1211
  println("prog0 test")
Chengsong
parents:
diff changeset
  1212
Chengsong
parents:
diff changeset
  1213
  val prog0 = """read n"""
Chengsong
parents:
diff changeset
  1214
  println(env(lexing_simp(WHILE_REGS, prog0)))
Chengsong
parents:
diff changeset
  1215
  println(tokenise(WHILE_REGS, prog0))
Chengsong
parents:
diff changeset
  1216
Chengsong
parents:
diff changeset
  1217
  println("prog1 test")
Chengsong
parents:
diff changeset
  1218
Chengsong
parents:
diff changeset
  1219
  val prog1 = """read  n; write (n)"""
Chengsong
parents:
diff changeset
  1220
  println(tokenise(WHILE_REGS, prog1))
Chengsong
parents:
diff changeset
  1221
Chengsong
parents:
diff changeset
  1222
  */
Chengsong
parents:
diff changeset
  1223
  // Bigger Tests
Chengsong
parents:
diff changeset
  1224
  //==============
Chengsong
parents:
diff changeset
  1225
Chengsong
parents:
diff changeset
  1226
  def escape(raw: String): String = {
Chengsong
parents:
diff changeset
  1227
    import scala.reflect.runtime.universe._
Chengsong
parents:
diff changeset
  1228
    Literal(Constant(raw)).toString
Chengsong
parents:
diff changeset
  1229
  }
Chengsong
parents:
diff changeset
  1230
Chengsong
parents:
diff changeset
  1231
  val prog2 = """
Chengsong
parents:
diff changeset
  1232
  write "Fib";
Chengsong
parents:
diff changeset
  1233
  read n;
Chengsong
parents:
diff changeset
  1234
  minus1 := 0;
Chengsong
parents:
diff changeset
  1235
  minus2 := 1;
Chengsong
parents:
diff changeset
  1236
  while n > 0 do {
Chengsong
parents:
diff changeset
  1237
    temp := minus2;
Chengsong
parents:
diff changeset
  1238
    minus2 := minus1 + minus2;
Chengsong
parents:
diff changeset
  1239
    minus1 := temp;
Chengsong
parents:
diff changeset
  1240
    n := n - 1
Chengsong
parents:
diff changeset
  1241
  };
Chengsong
parents:
diff changeset
  1242
  write "Result";
Chengsong
parents:
diff changeset
  1243
  write minus2
Chengsong
parents:
diff changeset
  1244
  """
Chengsong
parents:
diff changeset
  1245
Chengsong
parents:
diff changeset
  1246
  val prog3 = """
Chengsong
parents:
diff changeset
  1247
  start := 1000;
Chengsong
parents:
diff changeset
  1248
  x := start;
Chengsong
parents:
diff changeset
  1249
  y := start;
Chengsong
parents:
diff changeset
  1250
  z := start;
Chengsong
parents:
diff changeset
  1251
  while 0 < x do {
Chengsong
parents:
diff changeset
  1252
  while 0 < y do {
Chengsong
parents:
diff changeset
  1253
    while 0 < z do {
Chengsong
parents:
diff changeset
  1254
      z := z - 1
Chengsong
parents:
diff changeset
  1255
    };
Chengsong
parents:
diff changeset
  1256
    z := start;
Chengsong
parents:
diff changeset
  1257
    y := y - 1
Chengsong
parents:
diff changeset
  1258
  };     
Chengsong
parents:
diff changeset
  1259
  y := start;
Chengsong
parents:
diff changeset
  1260
  x := x - 1
Chengsong
parents:
diff changeset
  1261
  }
Chengsong
parents:
diff changeset
  1262
  """
Chengsong
parents:
diff changeset
  1263
  /*
Chengsong
parents:
diff changeset
  1264
  for(i <- 400 to 400 by 1){
Chengsong
parents:
diff changeset
  1265
    println(i+":")
Chengsong
parents:
diff changeset
  1266
    blexing_simp(WHILE_REGS, prog2 * i)
Chengsong
parents:
diff changeset
  1267
  } */
Chengsong
parents:
diff changeset
  1268
Chengsong
parents:
diff changeset
  1269
    /*
Chengsong
parents:
diff changeset
  1270
    for (i <- 2 to 5){
Chengsong
parents:
diff changeset
  1271
      for(j <- 1 to 3){
Chengsong
parents:
diff changeset
  1272
        println(i,j)
Chengsong
parents:
diff changeset
  1273
        small_de = i
Chengsong
parents:
diff changeset
  1274
        usual_de = i + j
Chengsong
parents:
diff changeset
  1275
        big_de = i + 2*j 
Chengsong
parents:
diff changeset
  1276
        blexing_simp(AWHILE_REGS, prog2 * 100)
Chengsong
parents:
diff changeset
  1277
      }
Chengsong
parents:
diff changeset
  1278
    }*/
Chengsong
parents:
diff changeset
  1279
Chengsong
parents:
diff changeset
  1280
  /*
Chengsong
parents:
diff changeset
  1281
  println("Tokens of prog2")
Chengsong
parents:
diff changeset
  1282
  println(tokenise(WHILE_REGS, prog2).mkString("\n"))
Chengsong
parents:
diff changeset
  1283
Chengsong
parents:
diff changeset
  1284
  val fib_tokens = tokenise(WHILE_REGS, prog2)
Chengsong
parents:
diff changeset
  1285
  fib_tokens.map{case (s1, s2) => (escape(s1), escape(s2))}.mkString(",\n")
Chengsong
parents:
diff changeset
  1286
Chengsong
parents:
diff changeset
  1287
Chengsong
parents:
diff changeset
  1288
  val test_tokens = tokenise(WHILE_REGS, prog3)
Chengsong
parents:
diff changeset
  1289
  test_tokens.map{case (s1, s2) => (escape(s1), escape(s2))}.mkString(",\n")
Chengsong
parents:
diff changeset
  1290
  */
Chengsong
parents:
diff changeset
  1291
Chengsong
parents:
diff changeset
  1292
  /*
Chengsong
parents:
diff changeset
  1293
  println("time test for blexing_simp")
Chengsong
parents:
diff changeset
  1294
  for (i <- 1 to 1 by 1) {
Chengsong
parents:
diff changeset
  1295
    lexing_simp(WHILE_REGS, prog2 * i)
Chengsong
parents:
diff changeset
  1296
    blexing_simp(WHILE_REGS, prog2 * i)
Chengsong
parents:
diff changeset
  1297
    for( j <- 0 to each_simp_timeb.length - 1){
Chengsong
parents:
diff changeset
  1298
      if( each_simp_timeb(j)/each_simp_time(j) >= 10.0 )
Chengsong
parents:
diff changeset
  1299
        println(j, each_simp_timeb(j), each_simp_time(j))
Chengsong
parents:
diff changeset
  1300
    }
Chengsong
parents:
diff changeset
  1301
  }
Chengsong
parents:
diff changeset
  1302
  */
Chengsong
parents:
diff changeset
  1303
Chengsong
parents:
diff changeset
  1304
Chengsong
parents:
diff changeset
  1305
  //--------------------------------------------------------------------------------------------------------END OF NON-BITCODE PART (TESTING)
151
Chengsong
parents: 150
diff changeset
  1306
  def bstostick(bs: List[Bit]): Element = bs match {
Chengsong
parents: 150
diff changeset
  1307
    //case b::Nil => elem(b.toString)
Chengsong
parents: 150
diff changeset
  1308
    case b::bs1 => elem(b.toString) beside bstostick(bs1)
Chengsong
parents: 150
diff changeset
  1309
    case Nil => elem(' ', 1, 1)
Chengsong
parents: 150
diff changeset
  1310
  }
0
Chengsong
parents:
diff changeset
  1311
151
Chengsong
parents: 150
diff changeset
  1312
  def aregex_simple_print(r: ARexp): Element = r match {
Chengsong
parents: 150
diff changeset
  1313
    case AALTS(bs,rs) => {
Chengsong
parents: 150
diff changeset
  1314
      val bitstick = bstostick(bs)
Chengsong
parents: 150
diff changeset
  1315
      rs match {
Chengsong
parents: 150
diff changeset
  1316
        case r::rs1 =>  
Chengsong
parents: 150
diff changeset
  1317
        rs1.foldLeft( 
Chengsong
parents: 150
diff changeset
  1318
        ((elem("(") left_align bitstick) beside 
Chengsong
parents: 150
diff changeset
  1319
        aregex_simple_print(r))  )( (acc, r2) => acc beside ((elem(" + ") above elem("   ")) beside aregex_simple_print(r2) )) beside
Chengsong
parents: 150
diff changeset
  1320
        elem(")")
Chengsong
parents: 150
diff changeset
  1321
        case Nil => elem(' ', 1, 1)
Chengsong
parents: 150
diff changeset
  1322
      }
Chengsong
parents: 150
diff changeset
  1323
    }
Chengsong
parents: 150
diff changeset
  1324
    case ASEQ(bs, r1, r2) => {
Chengsong
parents: 150
diff changeset
  1325
      ((elem("[") left_align bstostick(bs)) beside  aregex_simple_print(r1) beside elem("~") beside aregex_simple_print(r2) beside (elem("]") above elem(" "))) 
Chengsong
parents: 150
diff changeset
  1326
    }
Chengsong
parents: 150
diff changeset
  1327
    case ASTAR(bs, r) => {
Chengsong
parents: 150
diff changeset
  1328
      r match {
Chengsong
parents: 150
diff changeset
  1329
        case AONE(_) | AZERO | ACHAR(_, _) => {
Chengsong
parents: 150
diff changeset
  1330
          (elem("{") left_align bstostick(bs)) beside (aregex_simple_print(r) beside elem("}*")) 
Chengsong
parents: 150
diff changeset
  1331
        }
Chengsong
parents: 150
diff changeset
  1332
        case _ => {
Chengsong
parents: 150
diff changeset
  1333
          (elem("{") left_align bstostick(bs)) beside (aregex_simple_print(r) beside elem("}*")) 
Chengsong
parents: 150
diff changeset
  1334
        }
Chengsong
parents: 150
diff changeset
  1335
      }
Chengsong
parents: 150
diff changeset
  1336
    }
Chengsong
parents: 150
diff changeset
  1337
    case AONE(bs) => {
Chengsong
parents: 150
diff changeset
  1338
      elem("1") left_align bstostick(bs)
Chengsong
parents: 150
diff changeset
  1339
    }
Chengsong
parents: 150
diff changeset
  1340
    case ACHAR(bs, c) => {
Chengsong
parents: 150
diff changeset
  1341
      elem(c, 1, 1) left_align bstostick(bs)
Chengsong
parents: 150
diff changeset
  1342
    }
Chengsong
parents: 150
diff changeset
  1343
    case AZERO =>
Chengsong
parents: 150
diff changeset
  1344
    {
Chengsong
parents: 150
diff changeset
  1345
      elem ("0") above elem(" ")
Chengsong
parents: 150
diff changeset
  1346
    }
Chengsong
parents: 150
diff changeset
  1347
  }
0
Chengsong
parents:
diff changeset
  1348
Chengsong
parents:
diff changeset
  1349
Chengsong
parents:
diff changeset
  1350
  def clear() = {
Chengsong
parents:
diff changeset
  1351
    print("")
Chengsong
parents:
diff changeset
  1352
    //print("\33[H\33[2J")
Chengsong
parents:
diff changeset
  1353
  }
Chengsong
parents:
diff changeset
  1354
Chengsong
parents:
diff changeset
  1355
  //testing the two lexings produce the same value
Chengsong
parents:
diff changeset
  1356
  //enumerates strings of length n over alphabet cs
Chengsong
parents:
diff changeset
  1357
  def strs(n: Int, cs: String) : Set[String] = {
Chengsong
parents:
diff changeset
  1358
    if (n == 0) Set("")
Chengsong
parents:
diff changeset
  1359
    else {
Chengsong
parents:
diff changeset
  1360
      val ss = strs(n - 1, cs)
Chengsong
parents:
diff changeset
  1361
      ss ++
Chengsong
parents:
diff changeset
  1362
      (for (s <- ss; c <- cs.toList) yield c + s)
Chengsong
parents:
diff changeset
  1363
    }
Chengsong
parents:
diff changeset
  1364
  }
Chengsong
parents:
diff changeset
  1365
  def enum(n: Int, s: String) : Stream[Rexp] = n match {
Chengsong
parents:
diff changeset
  1366
    case 0 => ZERO #:: ONE #:: s.toStream.map(CHAR)
Chengsong
parents:
diff changeset
  1367
    case n => {  
Chengsong
parents:
diff changeset
  1368
      val rs = enum(n - 1, s)
Chengsong
parents:
diff changeset
  1369
      rs #:::
Chengsong
parents:
diff changeset
  1370
      (for (r1 <- rs; r2 <- rs) yield ALT(r1, r2)) #:::
Chengsong
parents:
diff changeset
  1371
      (for (r1 <- rs; r2 <- rs) yield SEQ(r1, r2)) #:::
Chengsong
parents:
diff changeset
  1372
      (for (r1 <- rs) yield STAR(r1))
Chengsong
parents:
diff changeset
  1373
    }
Chengsong
parents:
diff changeset
  1374
  }
Chengsong
parents:
diff changeset
  1375
Chengsong
parents:
diff changeset
  1376
  //tests blexing and lexing
Chengsong
parents:
diff changeset
  1377
  def tests_blexer_simp(ss: Set[String])(r: Rexp) = {
Chengsong
parents:
diff changeset
  1378
    clear()
Chengsong
parents:
diff changeset
  1379
    //println(s"Testing ${r}")
Chengsong
parents:
diff changeset
  1380
    for (s <- ss.par) yield {
Chengsong
parents:
diff changeset
  1381
      val res1 = Try(Some(lexing_simp(r, s))).getOrElse(None)
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1382
      val res2 = Try(Some(super_blexing_simp(r, s))).getOrElse(None)
0
Chengsong
parents:
diff changeset
  1383
      if (res1 != res2) println(s"Disagree on ${r} and ${s}")
Chengsong
parents:
diff changeset
  1384
      if (res1 != res2) println(s"   ${res1} !=  ${res2}")
Chengsong
parents:
diff changeset
  1385
      if (res1 != res2) Some((r, s)) else None
Chengsong
parents:
diff changeset
  1386
    }
Chengsong
parents:
diff changeset
  1387
  }
Chengsong
parents:
diff changeset
  1388
Chengsong
parents:
diff changeset
  1389
Chengsong
parents:
diff changeset
  1390
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
  1391
  
0
Chengsong
parents:
diff changeset
  1392
  /*
Chengsong
parents:
diff changeset
  1393
  def single_expression_explorer(ar: ARexp, ss: Set[String]): Unit = {
Chengsong
parents:
diff changeset
  1394
    for (s <- ss){
Chengsong
parents:
diff changeset
  1395
      
Chengsong
parents:
diff changeset
  1396
      val der_res = bder(c, ar) 
Chengsong
parents:
diff changeset
  1397
      val simp_res = bsimp(der_res)
Chengsong
parents:
diff changeset
  1398
      println(asize(der_res))
Chengsong
parents:
diff changeset
  1399
      println(asize(simp_res))
Chengsong
parents:
diff changeset
  1400
      single_expression_explorer(simp_res, (sc - c))
Chengsong
parents:
diff changeset
  1401
    }
Chengsong
parents:
diff changeset
  1402
  }*/
Chengsong
parents:
diff changeset
  1403
Chengsong
parents:
diff changeset
  1404
  //single_expression_explorer(internalise(("c"~("a"+"b"))%) , Set('a','b','c'))
Chengsong
parents:
diff changeset
  1405
Chengsong
parents:
diff changeset
  1406
Chengsong
parents:
diff changeset
  1407
}
Chengsong
parents:
diff changeset
  1408
151
Chengsong
parents: 150
diff changeset
  1409
Chengsong
parents: 150
diff changeset
  1410
0
Chengsong
parents:
diff changeset
  1411
import Rexp.Bits
Chengsong
parents:
diff changeset
  1412
abstract class ARexp 
Chengsong
parents:
diff changeset
  1413
case object AZERO extends ARexp
Chengsong
parents:
diff changeset
  1414
case class AONE(bs: Bits) extends ARexp
Chengsong
parents:
diff changeset
  1415
case class ACHAR(bs: Bits, f: Char) extends ARexp
Chengsong
parents:
diff changeset
  1416
case class AALTS(bs: Bits, rs: List[ARexp]) extends ARexp 
Chengsong
parents:
diff changeset
  1417
case class ASEQ(bs: Bits, r1: ARexp, r2: ARexp) extends ARexp 
Chengsong
parents:
diff changeset
  1418
case class ASTAR(bs: Bits, r: ARexp) extends ARexp 
Chengsong
parents:
diff changeset
  1419
Chengsong
parents:
diff changeset
  1420
Chengsong
parents:
diff changeset
  1421
Chengsong
parents:
diff changeset
  1422
abstract class Val
Chengsong
parents:
diff changeset
  1423
case object Empty extends Val
Chengsong
parents:
diff changeset
  1424
case class Chr(c: Char) extends Val
Chengsong
parents:
diff changeset
  1425
case class Sequ(v1: Val, v2: Val) extends Val
Chengsong
parents:
diff changeset
  1426
case class Left(v: Val) extends Val
Chengsong
parents:
diff changeset
  1427
case class Right(v: Val) extends Val
Chengsong
parents:
diff changeset
  1428
case class Stars(vs: List[Val]) extends Val
Chengsong
parents:
diff changeset
  1429
case class Rec(x: String, v: Val) extends Val
150
b51d34113d47 currnet code
Chengsong
parents: 148
diff changeset
  1430
case class Position(i: Int, v: Val) extends Val
17
Chengsong
parents: 16
diff changeset
  1431
case object undefined extends Val
0
Chengsong
parents:
diff changeset
  1432
//case class Pos(i: Int, v: Val) extends Val
Chengsong
parents:
diff changeset
  1433
case object Prd extends Val
151
Chengsong
parents: 150
diff changeset
  1434
}