Spiral.scala
author Chengsong
Thu, 07 May 2020 11:36:15 +0100
changeset 150 b51d34113d47
parent 149 6c5920fd02a7
child 151 73f990bc6843
permissions -rwxr-xr-x
currnet code
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import Element.elem
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import RexpRelated._
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import RexpRelated.Rexp._
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import Partial._
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import scala.collection.mutable.ListBuffer
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object Spiral{
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  val space = elem(" ")
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  val corner = elem("+")
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  def spiral(nEdges: Int, direction: Int): Element = {
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    if(nEdges == 1)
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      elem("+")
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    else {
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      val sp = spiral(nEdges - 1, (direction + 3) % 4)
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      def verticalBar = elem('|', 1, sp.height)
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      def horizontalBar = elem('-', sp.width, 1)
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      if(direction == 0)
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        (corner beside horizontalBar) above sp//(sp beside space)
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      else if (direction == 1)
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        sp beside (corner above verticalBar)
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      else if (direction == 2)
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        (space beside sp) above (horizontalBar beside corner)
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      else
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        (verticalBar above corner) beside (space above sp)
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    }
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  }
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  val alphabet = ("""abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789.:"=()\;-+*!<>\/%{} """+"\n\t").toSet//Set('a','b','c')
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  def regx_tree(r: Rexp): Element = aregx_tree(internalise(r))
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  def annotated_tree(r: ARexp): Element = {
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    r match {
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      case ACHAR(bs, d) => {
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        //val Some(d) = alphabet.find(f)
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        d match {
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          case '\n' => elem("\\n")
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          case '\t' => elem("\\t")
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          case ' ' => elem("space")
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          case d => if(bs.isEmpty)  elem(d.toString) else elem(d.toString++" ") beside elem(bs.toString)
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        }   
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      }
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      case AONE(bs) => {
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        if(bs.isEmpty)  elem("ONE") else elem("ONE ") beside elem(bs.toString)
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      }
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      case AZERO => {
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        elem("ZERO") 
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      }
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      case ASEQ(bs, r1, r2) => {
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        annotated_binary_print("SEQ", r1, r2, bs)
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      }
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      case AALTS(bs, rs) => {
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        //elem("Awaiting completion")
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        annotated_list_print("ALT", rs, bs)  
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      }
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      case ASTAR(bs, r) => {
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        annotated_list_print("STA", List(r), bs)
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      }
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    } 
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  }
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  def aregx_tree(r: ARexp): Element = {
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    r match {
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      case ACHAR(bs, d) => {
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        //val Some(d) = alphabet.find(f)
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        d match {
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          case '\n' => elem("\\n")
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          case '\t' => elem("\\t")
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          case ' ' => elem("space")
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          case d => elem(d.toString)
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        }   
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      }
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      case AONE(bs) => {
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        elem("ONE")
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      }
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      case AZERO => {
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        elem("ZERO")
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      }
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      case ASEQ(bs, r1, r2) => {
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        binary_print("SEQ", r1, r2)
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      }
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      case AALTS(bs, rs) => {
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        //elem("Awaiting completion")
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        list_print("ALT", rs)
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      }
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      case ASTAR(bs, r) => {
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        list_print("STA", List(r))
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      }
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    }
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  }
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  val port = elem(" └-")
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  def list_print(name: String, rs: List[ARexp]): Element = {
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    rs match {
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      case r::Nil => {
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        val pref = aregx_tree(r)
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        val head = elem(name)
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        (head left_align (port up_align pref) ) 
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      }
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      case r2::r1::Nil => {
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        binary_print(name, r2, r1)
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      }
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      case r::rs1 => {
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        val pref = aregx_tree(r)
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        val head = elem(name)
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        if (pref.height > 1){
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          val link = elem('|', 1, pref.height - 1)
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          (head left_align ((port above link) beside pref)) left_align tail_print(rs1)    
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        }
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        else{
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          (head left_align (port beside pref) ) left_align tail_print(rs1)
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        }
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      }
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    }
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  }
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    def annotated_list_print(name: String, rs: List[ARexp], bs: List[Bit]): Element = {
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    rs match {
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      case r::Nil => {
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        val pref = annotated_tree(r)
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        val head = if(bs.isEmpty) elem(name) else elem(name ++ " ") beside elem(bs.toString)
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        (head left_align (port up_align pref) ) 
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      }
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      case r2::r1::Nil => {
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        annotated_binary_print(name, r2, r1, bs)
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      }
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      case r::rs1 => {
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        val pref = annotated_tree(r)
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        val head = if (bs.isEmpty) elem(name) else elem(name ++ " ") beside elem(bs.toString)
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        if (pref.height > 1){
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          val link = elem('|', 1, pref.height - 1)
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          (head left_align ((port above link) beside pref)) left_align annotated_tail_print(rs1)    
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        }
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        else{
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          (head left_align (port beside pref) ) left_align annotated_tail_print(rs1)
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        }
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      }
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    }
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  }
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  def annotated_tail_print(rs: List[ARexp]): Element = {
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    rs match {
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      case r2::r1::Nil => {
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        val pref = annotated_tree(r2)
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        val suff = annotated_tree(r1)
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        if (pref.height > 1){
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          val link = elem('|', 1, pref.height - 1)
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          ((port above link) beside pref) left_align (port up_align suff)
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        }
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        else{
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          (port beside pref) left_align (port up_align suff)
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        } 
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      }
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      case r2::rs1 => {
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        val pref = annotated_tree(r2)
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        if (pref.height > 1){
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          val link = elem('|', 1, pref.height - 1)
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          ((port above link) beside pref) left_align annotated_tail_print(rs1)//(port up_align tail_print(rs1) )
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        }
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        else{
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          (port beside pref) left_align annotated_tail_print(rs1)//(port up_align tail_print(rs1))
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        } 
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        //pref left_align tail_print(rs1)
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      }
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    }
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  }
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0
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  def tail_print(rs: List[ARexp]): Element = {
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    rs match {
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      case r2::r1::Nil => {
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        val pref = aregx_tree(r2)
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        val suff = aregx_tree(r1)
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        if (pref.height > 1){
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          val link = elem('|', 1, pref.height - 1)
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          ((port above link) beside pref) left_align (port up_align suff)
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        }
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        else{
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          (port beside pref) left_align (port up_align suff)
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        } 
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      }
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      case r2::rs1 => {
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        val pref = aregx_tree(r2)
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        if (pref.height > 1){
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          val link = elem('|', 1, pref.height - 1)
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          ((port above link) beside pref) left_align tail_print(rs1)//(port up_align tail_print(rs1) )
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        }
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        else{
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          (port beside pref) left_align tail_print(rs1)//(port up_align tail_print(rs1))
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        } 
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        //pref left_align tail_print(rs1)
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      }
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    }
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  }
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  def binary_print(name: String, r1: ARexp, r2: ARexp): Element = {
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    val pref = aregx_tree(r1)
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    val suff = aregx_tree(r2)
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    val head = elem(name) 
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    if (pref.height > 1){
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      val link = elem('|', 1, pref.height - 1)
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      (head left_align ((port above link) beside pref) ) left_align (port up_align suff)
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    }
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    else{
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      (head left_align (port beside pref) ) left_align (port up_align suff)
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    }
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  }
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  def annotated_binary_print(name: String, r1: ARexp, r2: ARexp, bs: List[Bit]): Element = {
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    val pref = annotated_tree(r1)
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    val suff = annotated_tree(r2)
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    val head = if (bs.isEmpty) elem(name) else elem(name ++ " ") beside elem(bs.toString)
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    if (pref.height > 1){
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      val link = elem('|', 1, pref.height - 1)
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      (head left_align ((port above link) beside pref) ) left_align (port up_align suff)
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    }
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    else{
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      (head left_align (port beside pref) ) left_align (port up_align suff)
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    }
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  }
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  val arr_of_size = ListBuffer.empty[Int]
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  def pC(r: Rexp): Set[Rexp] = {//PD's companion
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    r match {
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      case SEQ(r1, r2) => pC(r2)
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      case ALTS(rs) => rs.flatMap(a => pC(a) ).toSet
Chengsong
parents:
diff changeset
   223
      case CHAR(c) => Set(r)
Chengsong
parents:
diff changeset
   224
      case r => Set()
Chengsong
parents:
diff changeset
   225
    }
Chengsong
parents:
diff changeset
   226
  }
Chengsong
parents:
diff changeset
   227
  def illustration(r: Rexp, s: String){
Chengsong
parents:
diff changeset
   228
    var i_like_imperative_style = internalise(r)
Chengsong
parents:
diff changeset
   229
    val all_chars = s.toList
Chengsong
parents:
diff changeset
   230
    for (i <- 0 to s.length - 1){
Chengsong
parents:
diff changeset
   231
      val der_res =  bder(all_chars(i), i_like_imperative_style)
Chengsong
parents:
diff changeset
   232
      val simp_res = bsimp(der_res)
Chengsong
parents:
diff changeset
   233
      println("The original regex, the regex after derivative w.r.t " + all_chars(i) + " and the simplification of the derivative.")
Chengsong
parents:
diff changeset
   234
      println(aregx_tree(i_like_imperative_style) up_align aregx_tree(der_res) up_align aregx_tree(simp_res))
Chengsong
parents:
diff changeset
   235
      //println(asize(i_like_imperative_style), asize(der_res), asize(simp_res))
Chengsong
parents:
diff changeset
   236
      arr_of_size += asize(i_like_imperative_style)
Chengsong
parents:
diff changeset
   237
      //println(asize(simp_res), asize(simp_res) / arr_of_size(0) )
Chengsong
parents:
diff changeset
   238
      i_like_imperative_style = simp_res
Chengsong
parents:
diff changeset
   239
    }
Chengsong
parents:
diff changeset
   240
    arr_of_size += asize(i_like_imperative_style)
Chengsong
parents:
diff changeset
   241
  }
Chengsong
parents:
diff changeset
   242
  val ran = scala.util.Random
Chengsong
parents:
diff changeset
   243
  var alphabet_size = 3
Chengsong
parents:
diff changeset
   244
  def balanced_seq_star_gen(depth: Int, star: Boolean): Rexp = {
Chengsong
parents:
diff changeset
   245
    if(depth == 1){
Chengsong
parents:
diff changeset
   246
      ((ran.nextInt(4) + 97).toChar).toString
Chengsong
parents:
diff changeset
   247
    }
Chengsong
parents:
diff changeset
   248
    else if(star){
Chengsong
parents:
diff changeset
   249
      STAR(balanced_seq_star_gen(depth - 1, false))
Chengsong
parents:
diff changeset
   250
    }
Chengsong
parents:
diff changeset
   251
    else{
Chengsong
parents:
diff changeset
   252
      SEQ(balanced_seq_star_gen(depth - 1, true), balanced_seq_star_gen(depth - 1, true))
Chengsong
parents:
diff changeset
   253
    }
Chengsong
parents:
diff changeset
   254
  }
Chengsong
parents:
diff changeset
   255
  def max(i: Int, j: Int): Int = {
Chengsong
parents:
diff changeset
   256
    if(i > j)
Chengsong
parents:
diff changeset
   257
      i
Chengsong
parents:
diff changeset
   258
    else 
Chengsong
parents:
diff changeset
   259
      j
Chengsong
parents:
diff changeset
   260
  }
Chengsong
parents:
diff changeset
   261
  def random_struct_gen(depth:Int): Rexp = {
Chengsong
parents:
diff changeset
   262
    val dice = ran.nextInt(3)
Chengsong
parents:
diff changeset
   263
    val dice2 = ran.nextInt(3)
Chengsong
parents:
diff changeset
   264
    (dice, depth) match {
Chengsong
parents:
diff changeset
   265
      case (_, 0) => ((ran.nextInt(3) + 97).toChar).toString
Chengsong
parents:
diff changeset
   266
      case (0, i) => STAR(random_struct_gen(max(0, i - 1 - dice2)))
Chengsong
parents:
diff changeset
   267
      case (1, i) => SEQ(random_struct_gen(max(0, i - 1 - dice2)), random_struct_gen(max(0, i - 1 - dice2)))
Chengsong
parents:
diff changeset
   268
      case (2, i) => ALTS( List(random_struct_gen(max(0, i - 1 - dice2)), random_struct_gen(max(0, i - 1 - dice2))) )
Chengsong
parents:
diff changeset
   269
    }
Chengsong
parents:
diff changeset
   270
  }
Chengsong
parents:
diff changeset
   271
  def balanced_struct_gen(depth: Int): Rexp = {
Chengsong
parents:
diff changeset
   272
    val dice = ran.nextInt(3)
Chengsong
parents:
diff changeset
   273
    (dice, depth) match {
Chengsong
parents:
diff changeset
   274
      case (_, 0) => ((ran.nextInt(3) + 97).toChar).toString
Chengsong
parents:
diff changeset
   275
      case (0, i) => STAR(random_struct_gen(depth - 1))
Chengsong
parents:
diff changeset
   276
      case (1, i) => SEQ(random_struct_gen(depth - 1), random_struct_gen(depth - 1))
Chengsong
parents:
diff changeset
   277
      case (2, i) => ALTS( List(random_struct_gen(depth - 1), random_struct_gen(depth - 1) ) )
Chengsong
parents:
diff changeset
   278
    }
Chengsong
parents:
diff changeset
   279
  }
6
26b40a985622 random test failed
Chengsong
parents: 5
diff changeset
   280
  def random_pool(n: Int, d: Int) : Stream[Rexp] = n match {
26b40a985622 random test failed
Chengsong
parents: 5
diff changeset
   281
    case 0 => (for (i <- 1 to 10) yield balanced_struct_gen(d)).toStream
26b40a985622 random test failed
Chengsong
parents: 5
diff changeset
   282
    case n => {  
26b40a985622 random test failed
Chengsong
parents: 5
diff changeset
   283
      val rs = random_pool(n - 1, d)
26b40a985622 random test failed
Chengsong
parents: 5
diff changeset
   284
      rs #:::
26b40a985622 random test failed
Chengsong
parents: 5
diff changeset
   285
      (for (i <- (1 to 10).toStream) yield balanced_struct_gen(d)) #::: 
26b40a985622 random test failed
Chengsong
parents: 5
diff changeset
   286
      (for (i <- (1 to 10).toStream) yield random_struct_gen(d))
26b40a985622 random test failed
Chengsong
parents: 5
diff changeset
   287
    }
26b40a985622 random test failed
Chengsong
parents: 5
diff changeset
   288
  }
26b40a985622 random test failed
Chengsong
parents: 5
diff changeset
   289
0
Chengsong
parents:
diff changeset
   290
  def rd_string_gen(alp_size: Int, len: Int): String = {
Chengsong
parents:
diff changeset
   291
    if( len > 0)
Chengsong
parents:
diff changeset
   292
      ((ran.nextInt(alp_size) + 97).toChar).toString + rd_string_gen(alp_size, len - 1)
Chengsong
parents:
diff changeset
   293
    else
Chengsong
parents:
diff changeset
   294
      ((ran.nextInt(alp_size) + 97).toChar).toString
Chengsong
parents:
diff changeset
   295
  }
Chengsong
parents:
diff changeset
   296
  def plot(b: List[Int]){
Chengsong
parents:
diff changeset
   297
    println(b(0),b.max)
Chengsong
parents:
diff changeset
   298
Chengsong
parents:
diff changeset
   299
  }
Chengsong
parents:
diff changeset
   300
  def dep_exp(depth: List[Int]){
Chengsong
parents:
diff changeset
   301
    for(i <- depth){
Chengsong
parents:
diff changeset
   302
      arr_of_size.clear()
Chengsong
parents:
diff changeset
   303
      val s = rd_string_gen(alphabet_size, (i-8)*(i-8)+10)
Chengsong
parents:
diff changeset
   304
      val r = random_struct_gen(i)
Chengsong
parents:
diff changeset
   305
      println("depth: "+i)
Chengsong
parents:
diff changeset
   306
      illustration(r, s) //"abcabadaaadcabdbabcdaadbabbcbbdabdabbcbdbabdbcdb") 
Chengsong
parents:
diff changeset
   307
      //println("depth: " + i + " general stats:"+ arr_of_size(0), arr_of_size.max, arr_of_size.max/arr_of_size(0))
Chengsong
parents:
diff changeset
   308
      //println("x y label alignment")
Chengsong
parents:
diff changeset
   309
      /*for(i <- 0 to s.length - 1){
Chengsong
parents:
diff changeset
   310
        if(s(i) == '\n')
Chengsong
parents:
diff changeset
   311
          println(i+" "+arr_of_size(i)+" "+"nl"+" -140")
Chengsong
parents:
diff changeset
   312
        else if(s(i) ==  ' ')
Chengsong
parents:
diff changeset
   313
          println(i+" "+arr_of_size(i)+" "+"sp"+" -140")
Chengsong
parents:
diff changeset
   314
        else
Chengsong
parents:
diff changeset
   315
          println(i+" "+arr_of_size(i)+" "+s(i)+" -140")
Chengsong
parents:
diff changeset
   316
      }*/
Chengsong
parents:
diff changeset
   317
      //println(s.length + " " + arr_of_size(s.length) + " ]" + " -140")
Chengsong
parents:
diff changeset
   318
    }
Chengsong
parents:
diff changeset
   319
  }
Chengsong
parents:
diff changeset
   320
  def case_study(ss: List[String], r: Rexp){
Chengsong
parents:
diff changeset
   321
    for(s <- ss){
Chengsong
parents:
diff changeset
   322
      arr_of_size.clear()
Chengsong
parents:
diff changeset
   323
      illustration(r, s)
Chengsong
parents:
diff changeset
   324
      println("x y label alignment")
Chengsong
parents:
diff changeset
   325
      for(i <- 0 to s.length - 1){
Chengsong
parents:
diff changeset
   326
        if(s(i) == '\n')
Chengsong
parents:
diff changeset
   327
          println(i+" "+arr_of_size(i)+" "+"nl"+" -140")
Chengsong
parents:
diff changeset
   328
        else if(s(i) ==  ' ')
Chengsong
parents:
diff changeset
   329
          println(i+" "+arr_of_size(i)+" "+"sp"+" -140")
Chengsong
parents:
diff changeset
   330
        else
Chengsong
parents:
diff changeset
   331
          println(i+" "+arr_of_size(i)+" "+s(i)+" -140")
Chengsong
parents:
diff changeset
   332
      }
Chengsong
parents:
diff changeset
   333
    }
Chengsong
parents:
diff changeset
   334
  }
Chengsong
parents:
diff changeset
   335
  def star_gen(dp: Int): Rexp = {
Chengsong
parents:
diff changeset
   336
    if(dp > 0)
Chengsong
parents:
diff changeset
   337
      STAR(star_gen(dp - 1))
Chengsong
parents:
diff changeset
   338
    else
Chengsong
parents:
diff changeset
   339
      "a"
Chengsong
parents:
diff changeset
   340
  }
Chengsong
parents:
diff changeset
   341
  def strs_gen(len: Int, num: Int): List[String] = {
Chengsong
parents:
diff changeset
   342
    if(num > 0){
Chengsong
parents:
diff changeset
   343
      rd_string_gen(3, len)::strs_gen(len, num - 1)
Chengsong
parents:
diff changeset
   344
    }
Chengsong
parents:
diff changeset
   345
    else{
Chengsong
parents:
diff changeset
   346
      Nil
Chengsong
parents:
diff changeset
   347
    }
Chengsong
parents:
diff changeset
   348
  }
Chengsong
parents:
diff changeset
   349
  def regx_print(r: Rexp): String = {
Chengsong
parents:
diff changeset
   350
    r match {
Chengsong
parents:
diff changeset
   351
      case ZERO =>
Chengsong
parents:
diff changeset
   352
        "ZERO"
Chengsong
parents:
diff changeset
   353
      case CHAR(c) => {
Chengsong
parents:
diff changeset
   354
         //val Some(c) = alphabet.find(f)
Chengsong
parents:
diff changeset
   355
         "\"" + c.toString + "\""
Chengsong
parents:
diff changeset
   356
      }
Chengsong
parents:
diff changeset
   357
      case ONE => {
Chengsong
parents:
diff changeset
   358
        "ONE"
Chengsong
parents:
diff changeset
   359
      }
Chengsong
parents:
diff changeset
   360
      case ALTS(rs) => {
Chengsong
parents:
diff changeset
   361
        "ALTS(List("+(rs.map(regx_print)).foldLeft("")((a, b) => if(a == "") b else a + "," + b)+"))"
Chengsong
parents:
diff changeset
   362
      }
Chengsong
parents:
diff changeset
   363
      case SEQ(r1, r2) => {
Chengsong
parents:
diff changeset
   364
        "SEQ(" + regx_print(r1) + "," + regx_print(r2) + ")"
Chengsong
parents:
diff changeset
   365
      }
Chengsong
parents:
diff changeset
   366
      case STAR(r) => {
Chengsong
parents:
diff changeset
   367
        "STAR(" + regx_print(r) + ")"
Chengsong
parents:
diff changeset
   368
      }
Chengsong
parents:
diff changeset
   369
    }
Chengsong
parents:
diff changeset
   370
  }
Chengsong
parents:
diff changeset
   371
  val mkst = "abcdefghijklmnopqrstuvwxyz"
150
b51d34113d47 currnet code
Chengsong
parents: 149
diff changeset
   372
  
0
Chengsong
parents:
diff changeset
   373
  def inclusion_truth(anatomy: List[Rexp], pd: Set[Rexp]): Boolean = {
Chengsong
parents:
diff changeset
   374
    val aset = anatomy.toSet
Chengsong
parents:
diff changeset
   375
    if(aset subsetOf pd){
Chengsong
parents:
diff changeset
   376
      true
Chengsong
parents:
diff changeset
   377
    }
Chengsong
parents:
diff changeset
   378
    else{
Chengsong
parents:
diff changeset
   379
      println("inclusion not true")
Chengsong
parents:
diff changeset
   380
      false
Chengsong
parents:
diff changeset
   381
    }
Chengsong
parents:
diff changeset
   382
  }
Chengsong
parents:
diff changeset
   383
  def size_comp(anatomy: List[Rexp], pd: Set[Rexp]):Boolean = {println("size of PD and bspilled simp regx: ", pd.size, anatomy.size); true}
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 4
diff changeset
   384
  def size_expansion_rate(r: List[Rexp], pd: Set[Rexp]): Boolean = if(size(r(0)) > (pd.map(size).sum) * 3 ) { false }else {true}
4
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   385
  def ders_simp(r: ARexp, s: List[Char]): ARexp = {
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   386
    s match {
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   387
      case Nil => r 
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   388
      case c::cs => ders_simp(bsimp(bder(c, r)), cs)
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   389
    }
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   390
  }
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 4
diff changeset
   391
  val big_panda = STAR(STAR(STAR(ALTS(List(ALTS(List(CHAR('c'), CHAR('b'))), SEQ(CHAR('c'),CHAR('c')))))))
622ddbb1223a correctness test with enumeration
Chengsong
parents: 4
diff changeset
   392
  val str_panda = "ccccb"
622ddbb1223a correctness test with enumeration
Chengsong
parents: 4
diff changeset
   393
93
Chengsong
parents: 92
diff changeset
   394
  def bstostick(bs: List[Bit]): Element = bs match {
Chengsong
parents: 92
diff changeset
   395
    //case b::Nil => elem(b.toString)
Chengsong
parents: 92
diff changeset
   396
    case b::bs1 => elem(b.toString) beside bstostick(bs1)
Chengsong
parents: 92
diff changeset
   397
    case Nil => elem(' ', 1, 1)
Chengsong
parents: 92
diff changeset
   398
  }
Chengsong
parents: 92
diff changeset
   399
  def bits_print(r: ARexp): Element = r match {
Chengsong
parents: 92
diff changeset
   400
    case AALTS(bs,rs) => {
Chengsong
parents: 92
diff changeset
   401
      val bitstick = bstostick(bs)
Chengsong
parents: 92
diff changeset
   402
      rs match {
Chengsong
parents: 92
diff changeset
   403
        case r::rs1 =>  
Chengsong
parents: 92
diff changeset
   404
        rs1.foldLeft( 
Chengsong
parents: 92
diff changeset
   405
        ((elem("(") left_align bitstick) beside 
Chengsong
parents: 92
diff changeset
   406
        bits_print(r))  )( (acc, r2) => acc beside ((elem(" + ") above elem("   ")) beside bits_print(r2) )) beside
Chengsong
parents: 92
diff changeset
   407
        elem(")")
Chengsong
parents: 92
diff changeset
   408
        case Nil => elem(' ', 1, 1)
Chengsong
parents: 92
diff changeset
   409
      }
Chengsong
parents: 92
diff changeset
   410
    }
Chengsong
parents: 92
diff changeset
   411
    case ASEQ(bs, r1, r2) => {
103
Chengsong
parents: 101
diff changeset
   412
      ((elem("[") left_align bstostick(bs)) beside  bits_print(r1) beside elem("~") beside bits_print(r2) beside (elem("]") above elem(" "))) 
93
Chengsong
parents: 92
diff changeset
   413
    }
Chengsong
parents: 92
diff changeset
   414
    case ASTAR(bs, r) => {
Chengsong
parents: 92
diff changeset
   415
      r match {
Chengsong
parents: 92
diff changeset
   416
        case AONE(_) | AZERO | ACHAR(_, _) => {
Chengsong
parents: 92
diff changeset
   417
          (elem("{") left_align bstostick(bs)) beside (bits_print(r) beside elem("}*")) 
Chengsong
parents: 92
diff changeset
   418
        }
Chengsong
parents: 92
diff changeset
   419
        case _ => {
Chengsong
parents: 92
diff changeset
   420
          (elem("{") left_align bstostick(bs)) beside (bits_print(r) beside elem("}*")) 
Chengsong
parents: 92
diff changeset
   421
        }
Chengsong
parents: 92
diff changeset
   422
      }
Chengsong
parents: 92
diff changeset
   423
    }
Chengsong
parents: 92
diff changeset
   424
    case AONE(bs) => {
Chengsong
parents: 92
diff changeset
   425
      elem("1") left_align bstostick(bs)
Chengsong
parents: 92
diff changeset
   426
    }
Chengsong
parents: 92
diff changeset
   427
    case ACHAR(bs, c) => {
Chengsong
parents: 92
diff changeset
   428
      elem(c, 1, 1) left_align bstostick(bs)
Chengsong
parents: 92
diff changeset
   429
    }
Chengsong
parents: 92
diff changeset
   430
    case AZERO =>
Chengsong
parents: 92
diff changeset
   431
    {
Chengsong
parents: 92
diff changeset
   432
      elem ("0") above elem(" ")
Chengsong
parents: 92
diff changeset
   433
    }
Chengsong
parents: 92
diff changeset
   434
  }
Chengsong
parents: 92
diff changeset
   435
  def happy_print(r: Rexp): Unit = r match {
Chengsong
parents: 92
diff changeset
   436
    case ALTS( r::rs ) => {
Chengsong
parents: 92
diff changeset
   437
      print("(")
Chengsong
parents: 92
diff changeset
   438
      happy_print(r)
Chengsong
parents: 92
diff changeset
   439
      rs.map(r2=>{      
Chengsong
parents: 92
diff changeset
   440
        print(" + ")
Chengsong
parents: 92
diff changeset
   441
        happy_print(r2)
Chengsong
parents: 92
diff changeset
   442
      })
Chengsong
parents: 92
diff changeset
   443
      print(")")
Chengsong
parents: 92
diff changeset
   444
    }
Chengsong
parents: 92
diff changeset
   445
    case SEQ(r1, r2) => {
Chengsong
parents: 92
diff changeset
   446
      happy_print(r1)
Chengsong
parents: 92
diff changeset
   447
      print("~")
Chengsong
parents: 92
diff changeset
   448
      happy_print(r2)
Chengsong
parents: 92
diff changeset
   449
    }
Chengsong
parents: 92
diff changeset
   450
    case STAR(r) => {
Chengsong
parents: 92
diff changeset
   451
      r match {
Chengsong
parents: 92
diff changeset
   452
        case ONE | ZERO | CHAR(_) => {
Chengsong
parents: 92
diff changeset
   453
          happy_print(r)
Chengsong
parents: 92
diff changeset
   454
          print("*")
Chengsong
parents: 92
diff changeset
   455
        }
Chengsong
parents: 92
diff changeset
   456
        case _ => {
Chengsong
parents: 92
diff changeset
   457
          print("[")
Chengsong
parents: 92
diff changeset
   458
          happy_print(r)
Chengsong
parents: 92
diff changeset
   459
          print("]*")
Chengsong
parents: 92
diff changeset
   460
        }
Chengsong
parents: 92
diff changeset
   461
      }
Chengsong
parents: 92
diff changeset
   462
    }
Chengsong
parents: 92
diff changeset
   463
    case ONE => {
Chengsong
parents: 92
diff changeset
   464
      print("1")
Chengsong
parents: 92
diff changeset
   465
    }
Chengsong
parents: 92
diff changeset
   466
    case ZERO => {
Chengsong
parents: 92
diff changeset
   467
      print("0")
Chengsong
parents: 92
diff changeset
   468
    }
Chengsong
parents: 92
diff changeset
   469
    case CHAR(c) =>{
Chengsong
parents: 92
diff changeset
   470
      print(c)
Chengsong
parents: 92
diff changeset
   471
    }
Chengsong
parents: 92
diff changeset
   472
  }
Chengsong
parents: 92
diff changeset
   473
  def bits_slide(s: String, r: Rexp){
Chengsong
parents: 92
diff changeset
   474
    val nangao = ders_simp(internalise(r), s.toList)
Chengsong
parents: 92
diff changeset
   475
    val easy = bsimp(bders(s.toList, internalise(r)))
Chengsong
parents: 92
diff changeset
   476
    println(s)
Chengsong
parents: 92
diff changeset
   477
    println(r)
Chengsong
parents: 92
diff changeset
   478
    happy_print(r)
Chengsong
parents: 92
diff changeset
   479
    println()
Chengsong
parents: 92
diff changeset
   480
    print(bits_print(nangao))
Chengsong
parents: 92
diff changeset
   481
    println()
Chengsong
parents: 92
diff changeset
   482
    print(bits_print(easy))
Chengsong
parents: 92
diff changeset
   483
    println()
Chengsong
parents: 92
diff changeset
   484
  }
Chengsong
parents: 92
diff changeset
   485
  //found r = SEQ(ALTS(List(CHAR(c), CHAR(a))),SEQ(ALTS(List(CHAR(a), CHAR(c))),ALTS(List(CHAR(b), CHAR(c))))) s = "aa"
Chengsong
parents: 92
diff changeset
   486
    def bsimp_print(r: ARexp): Unit = r match {
Chengsong
parents: 92
diff changeset
   487
    case ASEQ(bs, r1, r2) => 
Chengsong
parents: 92
diff changeset
   488
      {
Chengsong
parents: 92
diff changeset
   489
        println("0.r or r.0 to 0 or bs1 1.r to fuse bs++bs1 r")
Chengsong
parents: 92
diff changeset
   490
        bits_print(bsimp(r1))
Chengsong
parents: 92
diff changeset
   491
        bits_print(bsimp(r2))
Chengsong
parents: 92
diff changeset
   492
      }
Chengsong
parents: 92
diff changeset
   493
    case AALTS(bs, rs) => {
Chengsong
parents: 92
diff changeset
   494
      println("rs.map(bsimp) equals *************")
Chengsong
parents: 92
diff changeset
   495
      val rs_simp = rs.map(bsimp)
Chengsong
parents: 92
diff changeset
   496
      for(r <- rs_simp){
Chengsong
parents: 92
diff changeset
   497
        println(bits_print(r))
Chengsong
parents: 92
diff changeset
   498
      }
Chengsong
parents: 92
diff changeset
   499
      println("*************")
Chengsong
parents: 92
diff changeset
   500
      println("flts(rs_simp)")
Chengsong
parents: 92
diff changeset
   501
      val flat_res = flats(rs_simp)
Chengsong
parents: 92
diff changeset
   502
      for(r <- flat_res){
Chengsong
parents: 92
diff changeset
   503
        println(bits_print(r))
Chengsong
parents: 92
diff changeset
   504
      }
Chengsong
parents: 92
diff changeset
   505
      println("dB(flat_res)")
Chengsong
parents: 92
diff changeset
   506
      val dist_res = distinctBy(flat_res, erase)
Chengsong
parents: 92
diff changeset
   507
      for(r <- dist_res){
Chengsong
parents: 92
diff changeset
   508
        println(bits_print(r))
Chengsong
parents: 92
diff changeset
   509
      }
Chengsong
parents: 92
diff changeset
   510
      dist_res match {
Chengsong
parents: 92
diff changeset
   511
        case Nil => println("AZERO")
Chengsong
parents: 92
diff changeset
   512
        case r::Nil => println("fuse(bs, r)")
Chengsong
parents: 92
diff changeset
   513
        case rs => println("AALTS(bs, rs)")
Chengsong
parents: 92
diff changeset
   514
      }
Chengsong
parents: 92
diff changeset
   515
    }
Chengsong
parents: 92
diff changeset
   516
    case _ => println("No simp at this level")
Chengsong
parents: 92
diff changeset
   517
  }
Chengsong
parents: 92
diff changeset
   518
  def tellmewhy(){
Chengsong
parents: 92
diff changeset
   519
    //val r = SEQ(ALTS(List(CHAR('a'), CHAR('b'))),ALTS(List(ALTS(List(CHAR('a'), CHAR('a'))), STAR(CHAR('a'))))) 
107
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   520
    //val r = SEQ(ALTS(List(CHAR('a'), CHAR('b'))),ALTS(List(CHAR('a'), STAR(CHAR('a')) ) ))
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   521
    val r = ("ab" | (  (("a")%) | "aa")  )
93
Chengsong
parents: 92
diff changeset
   522
    //val r = ("a"|"b")~("a")
Chengsong
parents: 92
diff changeset
   523
    val s = "aa"
123
fb7472a29058 in case
Chengsong
parents: 122
diff changeset
   524
    for(i <- 0 to s.length-1){
93
Chengsong
parents: 92
diff changeset
   525
      val ss = s.slice(0, i+1)
107
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   526
      val nangao = bders_simp_rf(ss.toList, internalise(r))
93
Chengsong
parents: 92
diff changeset
   527
      val easy = (bders(ss.toList, internalise(r)))
123
fb7472a29058 in case
Chengsong
parents: 122
diff changeset
   528
      println("iteration starts")
fb7472a29058 in case
Chengsong
parents: 122
diff changeset
   529
      println("bders_simp")
93
Chengsong
parents: 92
diff changeset
   530
      println(bits_print(nangao))
107
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   531
      println()
123
fb7472a29058 in case
Chengsong
parents: 122
diff changeset
   532
      println("bders")
93
Chengsong
parents: 92
diff changeset
   533
      println(bits_print(easy))
Chengsong
parents: 92
diff changeset
   534
      println()
123
fb7472a29058 in case
Chengsong
parents: 122
diff changeset
   535
      println("new simp")
107
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   536
      println(bits_print(bsimp_rf(easy)))
123
fb7472a29058 in case
Chengsong
parents: 122
diff changeset
   537
      println("iteration ends")
93
Chengsong
parents: 92
diff changeset
   538
    }
123
fb7472a29058 in case
Chengsong
parents: 122
diff changeset
   539
    println("old simp ders")
93
Chengsong
parents: 92
diff changeset
   540
    println(bits_print(bsimp(bders(s.toList, internalise(r)))))
123
fb7472a29058 in case
Chengsong
parents: 122
diff changeset
   541
    println("old derssimp")
101
Chengsong
parents: 93
diff changeset
   542
    println(bits_print(ders_simp(internalise(r), s.toList)))
93
Chengsong
parents: 92
diff changeset
   543
  }
Chengsong
parents: 92
diff changeset
   544
  def find_re(){
Chengsong
parents: 92
diff changeset
   545
    for (i <- 1 to 10000){
Chengsong
parents: 92
diff changeset
   546
      val r = balanced_struct_gen(3)
Chengsong
parents: 92
diff changeset
   547
      val s = rd_string_gen(2,1)
Chengsong
parents: 92
diff changeset
   548
      val nangao = ders_simp(internalise(r), s.toList)
Chengsong
parents: 92
diff changeset
   549
      val easy = bsimp(bders(s.toList, internalise(r)))
Chengsong
parents: 92
diff changeset
   550
      if(nangao != easy){
Chengsong
parents: 92
diff changeset
   551
        bits_slide(s, r)
Chengsong
parents: 92
diff changeset
   552
      }
Chengsong
parents: 92
diff changeset
   553
    }
Chengsong
parents: 92
diff changeset
   554
  }
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 4
diff changeset
   555
  //simplified regex size 291, so called pd_simp size 70 (did not do simplification to terms in the PD set)
10
2b95bcd2ac73 exp and proof
Chengsong
parents: 8
diff changeset
   556
  def pushbits(r: ARexp): ARexp = r match {
11
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 10
diff changeset
   557
    case AALTS(bs, rs) => AALTS(Nil, rs.map(r=>fuse(bs, pushbits(r))))
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 10
diff changeset
   558
    case ASEQ(bs, r1, r2) => ASEQ(bs, pushbits(r1), pushbits(r2))
10
2b95bcd2ac73 exp and proof
Chengsong
parents: 8
diff changeset
   559
    case r => r
2b95bcd2ac73 exp and proof
Chengsong
parents: 8
diff changeset
   560
  }
4
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   561
  def correctness_proof_convenient_path(){
107
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   562
    for(i <- 1 to 19999){
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   563
        val s = rd_string_gen(alphabet_size, 3)//"abaa"//rd_string_gen(alphabet_size, 3)
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   564
        val r = internalise(random_struct_gen(4))//ASTAR(List(),AALTS(List(),List(ASTAR(List(Z),ACHAR(List(),'a')), ASEQ(List(S),ACHAR(List(),'a'),ACHAR(List(),'b')))))//internalise(balanced_struct_gen(3))//SEQ(ALTS(List(STAR("a"),ALTS(List("a","c")))),SEQ(ALTS(List("c","a")),ALTS(List("c","b")))) //random_struct_gen(7)
4
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   565
        for(j <- 0 to s.length - 1){
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   566
          val ss = s.slice(0, j+ 1)
107
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   567
          val nangao = bders_simp_rf(ss.toList, r)
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   568
          val easy = bsimp_rf(bders_rf(ss.toList, r))
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   569
          if(!(nangao == easy)){
4
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   570
            println(j)
10
2b95bcd2ac73 exp and proof
Chengsong
parents: 8
diff changeset
   571
            println("not equal")
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 4
diff changeset
   572
            println("string")
4
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   573
            println(ss)
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 4
diff changeset
   574
            println("original regex")
107
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   575
            println(annotated_tree(r))
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 4
diff changeset
   576
            println("regex after ders simp")
10
2b95bcd2ac73 exp and proof
Chengsong
parents: 8
diff changeset
   577
            println(annotated_tree(nangao))
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 4
diff changeset
   578
            println("regex after ders")
107
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   579
            println(annotated_tree(bders(ss.toList, r)))//flats' fuse when opening up AALTS causes the difference
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 4
diff changeset
   580
            println("regex after ders and then a single simp")
7
1572760ff866 found the difference: caused by flats
Chengsong
parents: 6
diff changeset
   581
            println(annotated_tree(easy))
4
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   582
          }
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   583
        }
107
b1e365afa29c changes
Chengsong
parents: 103
diff changeset
   584
      }
4
7a349fe58bf4 :test whether bsimp(bders(r, s)) == ders_simp(r,s)
Chengsong
parents: 3
diff changeset
   585
  }
13
4868c26268aa test of
Chengsong
parents: 12
diff changeset
   586
  /*    if(bts == cdbts){//test of equality code v = retrieve internalise(r) v if |- v : r
4868c26268aa test of
Chengsong
parents: 12
diff changeset
   587
      println(bts)
4868c26268aa test of
Chengsong
parents: 12
diff changeset
   588
      println(cdbts)
4868c26268aa test of
Chengsong
parents: 12
diff changeset
   589
      println("code v = retrieve internalise(r) v if |- v : r")
4868c26268aa test of
Chengsong
parents: 12
diff changeset
   590
    }
14
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   591
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   592
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   593
        val r_der_s = bders(st.toList, rg)
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   594
    println(aregx_tree(r_der_s))
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   595
    val bts = retrieve(r_der_s, unsimplified_vl)
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   596
    val cdbts = code(unsimplified_vl)
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   597
    val simprg = bsimp(r_der_s)
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   598
    val frectv = decode(erase(simprg), cdbts)
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   599
    val simpbts = retrieve(simprg, frectv)
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   600
    if(bts == simpbts){
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   601
      println("retrieve r v = retrieve (bsimp r) (decode bsimp(r) code(v))")
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   602
      println("bits:")
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   603
      //println(bts)
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   604
      println(simpbts)
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   605
      println("v = ")
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   606
      println(unsimplified_vl)
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   607
      println("frect v = ")
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   608
      println(frectv)
610f14009c0b the property
Chengsong
parents: 13
diff changeset
   609
    }
17
Chengsong
parents: 16
diff changeset
   610
    *///KH8W5BXL
Chengsong
parents: 16
diff changeset
   611
  def nice_lex(r: Rexp, s: List[Char], ar: ARexp) : Val = s match {
Chengsong
parents: 16
diff changeset
   612
    case Nil => 
Chengsong
parents: 16
diff changeset
   613
    if (nullable(r)){
Chengsong
parents: 16
diff changeset
   614
      val vr = mkeps(r)
Chengsong
parents: 16
diff changeset
   615
      val bits1 = retrieve(ar, vr)
Chengsong
parents: 16
diff changeset
   616
      val av = bsimp2(ar, vr)
Chengsong
parents: 16
diff changeset
   617
      val bits2 = retrieve(av._1, av._2)
Chengsong
parents: 16
diff changeset
   618
      if(bits1 != bits2) throw new Exception("bsimp2 does not work")
Chengsong
parents: 16
diff changeset
   619
      vr
Chengsong
parents: 16
diff changeset
   620
    }  
Chengsong
parents: 16
diff changeset
   621
    else throw new Exception("Not matched")
Chengsong
parents: 16
diff changeset
   622
    case c::cs => { 
Chengsong
parents: 16
diff changeset
   623
      val vr = inj(r, c, nice_lex(der(c, r), cs, bder(c, ar)));
Chengsong
parents: 16
diff changeset
   624
      val bits1 = retrieve(ar, vr);
Chengsong
parents: 16
diff changeset
   625
      val av = bsimp2(ar, vr);
Chengsong
parents: 16
diff changeset
   626
      val bits2 = retrieve(av._1, av._2);
Chengsong
parents: 16
diff changeset
   627
      if(bits1 != bits2) throw new Exception("bsimp2 does not work");
Chengsong
parents: 16
diff changeset
   628
      vr 
Chengsong
parents: 16
diff changeset
   629
    }
Chengsong
parents: 16
diff changeset
   630
  }
Chengsong
parents: 16
diff changeset
   631
  def test_bsimp2(){
Chengsong
parents: 16
diff changeset
   632
    for(i <- 1 to 1000){
Chengsong
parents: 16
diff changeset
   633
      val rg = (balanced_struct_gen(9))//ASTAR(List(),AALTS(List(),List(ASTAR(List(Z),ACHAR(List(),'a')), ASEQ(List(S),ACHAR(List(),'a'),ACHAR(List(),'b')))))//internalise(balanced_struct_gen(3))//SEQ(ALTS(List(STAR("a"),ALTS(List("a","c")))),SEQ(ALTS(List("c","a")),ALTS(List("c","b")))) 
Chengsong
parents: 16
diff changeset
   634
      val st = rd_string_gen(3, 4)
Chengsong
parents: 16
diff changeset
   635
      val a = internalise(rg)
Chengsong
parents: 16
diff changeset
   636
      val final_derivative = ders(st.toList, rg)
Chengsong
parents: 16
diff changeset
   637
      if(nullable(final_derivative))
Chengsong
parents: 16
diff changeset
   638
        nice_lex(rg, st.toList, a)
Chengsong
parents: 16
diff changeset
   639
    }
Chengsong
parents: 16
diff changeset
   640
  }
15
Chengsong
parents: 14
diff changeset
   641
17
Chengsong
parents: 16
diff changeset
   642
  def neat_retrieve(){
Chengsong
parents: 16
diff changeset
   643
    for(i <- 1 to 1000){
Chengsong
parents: 16
diff changeset
   644
      val rg = internalise(balanced_struct_gen(6))//ASTAR(List(),AALTS(List(),List(ASTAR(List(Z),ACHAR(List(),'a')), ASEQ(List(S),ACHAR(List(),'a'),ACHAR(List(),'b')))))//internalise(balanced_struct_gen(3))//SEQ(ALTS(List(STAR("a"),ALTS(List("a","c")))),SEQ(ALTS(List("c","a")),ALTS(List("c","b")))) 
Chengsong
parents: 16
diff changeset
   645
      val st = rd_string_gen(3, 5)
Chengsong
parents: 16
diff changeset
   646
      val final_derivative = ders(st.toList, erase(rg))
Chengsong
parents: 16
diff changeset
   647
      if(nullable(final_derivative)){
Chengsong
parents: 16
diff changeset
   648
        val unsimplified_vl = mkeps(final_derivative)
Chengsong
parents: 16
diff changeset
   649
        val arexp_for_retrieve = bders( st.toList, rg)
Chengsong
parents: 16
diff changeset
   650
        val simp_ar_vl = bsimp2(arexp_for_retrieve, unsimplified_vl)
Chengsong
parents: 16
diff changeset
   651
        val bits1 = retrieve(arexp_for_retrieve, unsimplified_vl)
Chengsong
parents: 16
diff changeset
   652
        val bits2 = retrieve(simp_ar_vl._1, simp_ar_vl._2)
Chengsong
parents: 16
diff changeset
   653
        if(bits1 != bits2){
Chengsong
parents: 16
diff changeset
   654
          println("nOOOOOOOOOO!")
15
Chengsong
parents: 14
diff changeset
   655
        }
Chengsong
parents: 14
diff changeset
   656
      }
11
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 10
diff changeset
   657
    }
17
Chengsong
parents: 16
diff changeset
   658
  }
Chengsong
parents: 16
diff changeset
   659
7
1572760ff866 found the difference: caused by flats
Chengsong
parents: 6
diff changeset
   660
  def radical_correctness(){
1572760ff866 found the difference: caused by flats
Chengsong
parents: 6
diff changeset
   661
    enum(3, "abc").map(tests_blexer_simp(strs(3, "abc"))).toSet
1572760ff866 found the difference: caused by flats
Chengsong
parents: 6
diff changeset
   662
    random_pool(1, 5).map(tests_blexer_simp(strs(5, "abc"))).toSet
1572760ff866 found the difference: caused by flats
Chengsong
parents: 6
diff changeset
   663
  }
15
Chengsong
parents: 14
diff changeset
   664
  def christian_def(){
Chengsong
parents: 14
diff changeset
   665
    val r = ALTS(List(SEQ(ZERO,CHAR('b')), ONE))
Chengsong
parents: 14
diff changeset
   666
    val v = Right(Empty)
Chengsong
parents: 14
diff changeset
   667
    val a = internalise(r)
17
Chengsong
parents: 16
diff changeset
   668
    val a_v = bsimp2(a,v)
15
Chengsong
parents: 14
diff changeset
   669
    println(s"Testing ${r} and ${v}")
Chengsong
parents: 14
diff changeset
   670
    println(s"internalise(r) = ${a}")
17
Chengsong
parents: 16
diff changeset
   671
    println(s"a_v = ${a_v}")
15
Chengsong
parents: 14
diff changeset
   672
    val bs1 = retrieve(a, v)
Chengsong
parents: 14
diff changeset
   673
    println(bs1)
17
Chengsong
parents: 16
diff changeset
   674
    println(s"as = ${a_v._1}")
15
Chengsong
parents: 14
diff changeset
   675
    //val bs2 = retrieve(as, decode(erase(as), bs1))
17
Chengsong
parents: 16
diff changeset
   676
    val bs3 = retrieve(a_v._1, a_v._2)//decode(erase(as), bs1) does not work
Chengsong
parents: 16
diff changeset
   677
    //println(decode(erase(as), bs1))
Chengsong
parents: 16
diff changeset
   678
    println(s"bs1=${bs1}, bs3=${bs3}")
Chengsong
parents: 16
diff changeset
   679
    //println(decode(erase(a_v._1), bs3))
15
Chengsong
parents: 14
diff changeset
   680
  }
72
83b021fc7d29 interesting?
Chengsong
parents: 17
diff changeset
   681
  def christian_def2(){
89
a0bcf15a7844 counterexample
Chengsong
parents: 87
diff changeset
   682
    val a = AALTS(List(S), List(AZERO, ASEQ(List(S), AALTS(List(S), List(AONE(List(S)), ACHAR(List(S), 'c'))), ACHAR(List(S),'c') )) )
a0bcf15a7844 counterexample
Chengsong
parents: 87
diff changeset
   683
    //AALTS(List(Z), List(AZERO, ASEQ(List(), AALTS(List(),List(AONE(List()), ACHAR(Nil, 'b'))), ACHAR(Nil, 'b'))  )   )
a0bcf15a7844 counterexample
Chengsong
parents: 87
diff changeset
   684
    val unsimp = bsimp(bder('c',a))
a0bcf15a7844 counterexample
Chengsong
parents: 87
diff changeset
   685
    val simped = bsimp(bder('c', bsimp(a))           )
72
83b021fc7d29 interesting?
Chengsong
parents: 17
diff changeset
   686
    println(bsimp(a))
89
a0bcf15a7844 counterexample
Chengsong
parents: 87
diff changeset
   687
    if(unsimp != simped){
72
83b021fc7d29 interesting?
Chengsong
parents: 17
diff changeset
   688
      println(s"bsimp(bder c r) = ${unsimp}, whereas bsimp(bder c bsimp r) = ${simped}")
83b021fc7d29 interesting?
Chengsong
parents: 17
diff changeset
   689
    }
83b021fc7d29 interesting?
Chengsong
parents: 17
diff changeset
   690
  }
15
Chengsong
parents: 14
diff changeset
   691
  def essence_posix(){
16
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   692
    //val s = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"//rd_string_gen(alphabet_size, 3)//"abaa"//rd_string_gen(alphabet_size, 3)
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   693
    val s0 = "a"
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   694
    val r = SEQ(STAR(ALT("a", "aa")), "b")//internalise(random_struct_gen(4))//ASTAR(List(),AALTS(List(),List(ASTAR(List(Z),ACHAR(List(),'a')), ASEQ(List(S),ACHAR(List(),'a'),ACHAR(List(),'b')))))//internalise(balanced_struct_gen(3))//SEQ(ALTS(List(STAR("a"),ALTS(List("a","c")))),SEQ(ALTS(List("c","a")),ALTS(List("c","b")))) //random_struct_gen(7)
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   695
    for(i <- 1 to 40){
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   696
      val s = s0*i
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   697
      //printf("%d  %d\n",i, size(ders(s.toList, r)))
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   698
      printf("%d  %d\n",i, asize(ders_simp( internalise(r), s.toList)))
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   699
      //println(asize(ders_simp( internalise(r), s.toList)))
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   700
    }
15
Chengsong
parents: 14
diff changeset
   701
  }
16
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   702
87
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   703
  def speed_test(){
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   704
    val s0 = "a"*1000
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   705
    val r = SEQ(STAR("a"), "b")
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   706
    for(i <- 1 to 30){
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   707
      val s = s0*i
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   708
      val start = System.nanoTime()
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   709
      try{
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   710
        blex_simp(internalise(r), s.toList)
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   711
      }
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   712
      catch{
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   713
        case x: Exception =>
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   714
      }
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   715
      val end = System.nanoTime()
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   716
      printf("%d  %f\n",i, (end - start)/1.0e9)
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   717
    }
9c52c21b5db3 changes to report
Chengsong
parents: 75
diff changeset
   718
  }
91
Chengsong
parents: 89
diff changeset
   719
  /*
Chengsong
parents: 89
diff changeset
   720
  lemma retrieve_encode_STARS:
Chengsong
parents: 89
diff changeset
   721
  assumes "∀v∈set vs. ⊨ v : r ∧ code v = retrieve (intern r) v"
Chengsong
parents: 89
diff changeset
   722
  shows "code (Stars vs) = retrieve (ASTAR [] (intern r)) (Stars vs)"
Chengsong
parents: 89
diff changeset
   723
  */
Chengsong
parents: 89
diff changeset
   724
  def retrieve_encode_STARS(){
Chengsong
parents: 89
diff changeset
   725
    val r =  ALT(CHAR('a'), SEQ(CHAR('a'),CHAR('b')) ) 
Chengsong
parents: 89
diff changeset
   726
    //val v =  Stars(List(Sequ(Chr('a'), Chr('b')),  Chr('a')) )
Chengsong
parents: 89
diff changeset
   727
    val v1 = Right(Sequ(Chr('a'), Chr('b')))
Chengsong
parents: 89
diff changeset
   728
    val v2 = Left(Chr('a'))
Chengsong
parents: 89
diff changeset
   729
    val compressed1 = code(v1)
Chengsong
parents: 89
diff changeset
   730
    val compressed2 = code(v2)
Chengsong
parents: 89
diff changeset
   731
    val xompressed1 = retrieve(internalise(r), v1)
Chengsong
parents: 89
diff changeset
   732
    val xompressed2 = retrieve(internalise(r), v2)
Chengsong
parents: 89
diff changeset
   733
    println(compressed1, compressed2, xompressed1, xompressed2)
Chengsong
parents: 89
diff changeset
   734
    val v = Stars(List(v1, v2))
Chengsong
parents: 89
diff changeset
   735
    val compressed = code(v)
Chengsong
parents: 89
diff changeset
   736
    val a = ASTAR(List(), internalise(r))
Chengsong
parents: 89
diff changeset
   737
    val xompressed = retrieve(a, v)
Chengsong
parents: 89
diff changeset
   738
    println(compressed, xompressed)
Chengsong
parents: 89
diff changeset
   739
  }
Chengsong
parents: 89
diff changeset
   740
  //what does contains7 do?
Chengsong
parents: 89
diff changeset
   741
  //it causes exception
Chengsong
parents: 89
diff changeset
   742
  //relation between retreive, bder and injection
Chengsong
parents: 89
diff changeset
   743
  // a match error occurs when doing the injection
Chengsong
parents: 89
diff changeset
   744
  def contains7(){
Chengsong
parents: 89
diff changeset
   745
    val r = STAR( SEQ(CHAR('a'),CHAR('b')) )
Chengsong
parents: 89
diff changeset
   746
    val v = Sequ(Chr('b'), Stars(List(Sequ(Chr('a'), Chr('b')))))
Chengsong
parents: 89
diff changeset
   747
    val a = internalise(r)
Chengsong
parents: 89
diff changeset
   748
    val c = 'a'
Chengsong
parents: 89
diff changeset
   749
    val v_aug = inj(r, c, v)
Chengsong
parents: 89
diff changeset
   750
    println("bder c r:")
Chengsong
parents: 89
diff changeset
   751
    println(bder(c, a))
Chengsong
parents: 89
diff changeset
   752
    println("r:")
Chengsong
parents: 89
diff changeset
   753
    println(a)
Chengsong
parents: 89
diff changeset
   754
    println("bits they can both produce:")
Chengsong
parents: 89
diff changeset
   755
    println(retrieve(a, v_aug))
Chengsong
parents: 89
diff changeset
   756
  }
Chengsong
parents: 89
diff changeset
   757
  def der_seq(r:ARexp, s: List[Char],acc: List[ARexp]) : List[ARexp] = s match{
Chengsong
parents: 89
diff changeset
   758
    case Nil => acc ::: List(r)
Chengsong
parents: 89
diff changeset
   759
    case c::cs => der_seq(bder(c, r), cs, acc ::: List(r))
Chengsong
parents: 89
diff changeset
   760
  }
Chengsong
parents: 89
diff changeset
   761
  def der_seq_rev(r:ARexp, s: List[Char], acc: List[ARexp]): List[ARexp] = s match{
Chengsong
parents: 89
diff changeset
   762
    case Nil => r::acc
Chengsong
parents: 89
diff changeset
   763
    case c::cs =>der_seq_rev(r, cs, bders(s, r) :: acc  )
Chengsong
parents: 89
diff changeset
   764
  }
Chengsong
parents: 89
diff changeset
   765
  def re_close(l1: List[ARexp], l2: List[ARexp], re_init: ARexp): ARexp = l1 match {
Chengsong
parents: 89
diff changeset
   766
    case Nil => re_init
Chengsong
parents: 89
diff changeset
   767
    case c::cs => if(bnullable(c)) re_close(cs, l2.tail, AALTS(List(), List(re_init, fuse(mkepsBC(c), l2.head)) ) ) 
Chengsong
parents: 89
diff changeset
   768
    else re_close(cs, l2.tail, re_init)
Chengsong
parents: 89
diff changeset
   769
  }
92
Chengsong
parents: 91
diff changeset
   770
  //HERE
91
Chengsong
parents: 89
diff changeset
   771
  def closed_string_der(r1: ARexp, r2: ARexp, s: String): ARexp = {
Chengsong
parents: 89
diff changeset
   772
    val l1 = der_seq(r1, s.toList, Nil)
Chengsong
parents: 89
diff changeset
   773
    val l2 = der_seq_rev(r2, s.toList, Nil)
93
Chengsong
parents: 92
diff changeset
   774
    val Re = re_close((l1.reverse).tail, l2.tail, ASEQ(List(), l1.last, l2.head))
91
Chengsong
parents: 89
diff changeset
   775
    print(Re)
Chengsong
parents: 89
diff changeset
   776
    val Comp = bders( s.toList, ASEQ(List(), r1, r2))
Chengsong
parents: 89
diff changeset
   777
    print(Comp  )
Chengsong
parents: 89
diff changeset
   778
    if(Re != Comp){
Chengsong
parents: 89
diff changeset
   779
      println("boooooooooooooooo!joihniuguyfuyftyftyufuyids gheioueghrigdhxilj")
Chengsong
parents: 89
diff changeset
   780
    }
Chengsong
parents: 89
diff changeset
   781
    Re
Chengsong
parents: 89
diff changeset
   782
  }
Chengsong
parents: 89
diff changeset
   783
  def newxp1(){
Chengsong
parents: 89
diff changeset
   784
    val r1 = internalise("ab"|"")
Chengsong
parents: 89
diff changeset
   785
    val r2 = internalise(("b")%)
Chengsong
parents: 89
diff changeset
   786
    val s = "abbbbb"
Chengsong
parents: 89
diff changeset
   787
    val s2= "bbbbb"
Chengsong
parents: 89
diff changeset
   788
    val s3 = "aaaaaa"
Chengsong
parents: 89
diff changeset
   789
    //closed_string_der(r1, r2, s)
Chengsong
parents: 89
diff changeset
   790
    //closed_string_der(r1, r2, s2)
Chengsong
parents: 89
diff changeset
   791
    closed_string_der(r1, r2, s3)
Chengsong
parents: 89
diff changeset
   792
  }
92
Chengsong
parents: 91
diff changeset
   793
Chengsong
parents: 91
diff changeset
   794
  def string_der_test(){
Chengsong
parents: 91
diff changeset
   795
    for(i <- 0 to 10){
Chengsong
parents: 91
diff changeset
   796
      val s = rd_string_gen(alphabet_size, i).toList
Chengsong
parents: 91
diff changeset
   797
      val r = random_struct_gen(2)
Chengsong
parents: 91
diff changeset
   798
      if(ders(s, r) != ders2(s, r)){
Chengsong
parents: 91
diff changeset
   799
        println(i)
Chengsong
parents: 91
diff changeset
   800
        println(s)
Chengsong
parents: 91
diff changeset
   801
        println(r)
Chengsong
parents: 91
diff changeset
   802
        println(ders(s, r))
Chengsong
parents: 91
diff changeset
   803
        println(ders2(s,r))
149
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   804
        println("neq") 
92
Chengsong
parents: 91
diff changeset
   805
      }
Chengsong
parents: 91
diff changeset
   806
    }
Chengsong
parents: 91
diff changeset
   807
  }
109
Chengsong
parents: 107
diff changeset
   808
  def have_fun(){
Chengsong
parents: 107
diff changeset
   809
    val bis = List(S,S)
Chengsong
parents: 107
diff changeset
   810
    val bits = List(S,S,Z)
Chengsong
parents: 107
diff changeset
   811
    val reg = ("a" | (("a")%) )~("b")
Chengsong
parents: 107
diff changeset
   812
    val res = decode_aux(reg, bis)
149
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   813
    val result = decode_aux(reg, bis) 
109
Chengsong
parents: 107
diff changeset
   814
    val result1 = decode_aux(reg, List(Z))
Chengsong
parents: 107
diff changeset
   815
    println(res)
Chengsong
parents: 107
diff changeset
   816
    println(result)
Chengsong
parents: 107
diff changeset
   817
    println(bsimp(bders( "a".toList, internalise(reg))))
Chengsong
parents: 107
diff changeset
   818
    println(result1)
Chengsong
parents: 107
diff changeset
   819
  }
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   820
  def finj_test0(c: Char, r: ARexp){
149
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   821
    val dr = (bder(c, r))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   822
    val sdr = bsimp(dr)
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   823
    val v = if(bnullable(sdr)) mkeps(erase(sdr)) else mkchr(erase(sdr))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   824
    val v0 = if(bnullable(sdr)) mkeps(erase(bder(c,r))) else mkchr(erase(bder(c, r)))
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   825
    val v1 = inj(erase(r), c, v0)
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   826
    val v2 = fuzzy_inj(r, c, v)
149
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   827
    println("regular expression original")
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   828
    println(bits_print(r))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   829
    println("regular expression derivative")
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   830
    println(bits_print(dr))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   831
    println("regular expression simped derivative")
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   832
    println(bits_print(sdr))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   833
    println("simplified value")
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   834
    println(v)
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   835
    println("unsimplified value")
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   836
    println(v0)
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   837
    println("normal injection")
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   838
    println(v1)
149
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   839
    println("fuzzy injection")
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   840
    println(v2)
149
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   841
    println("inj "+r+c+v0)
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   842
    println("fuzzy_inj "+r+c+v)
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   843
  }
149
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   844
  def vunsimp_test(){
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   845
    for(i <- 1 to 1000){
149
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   846
      val r = random_struct_gen(5)//[{  a}*~{{a}*}*]
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   847
      val c = (ran.nextInt(3) + 97).toChar//Sequ(Stars(List()),Stars(List()))
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   848
      val dr = der(c, r)
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   849
      val bdr = bder(c, internalise(r))
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   850
      if(nullable(dr)){
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   851
        println("bohooooooooooooooooo!")
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   852
        val dv = mkeps(dr)
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   853
        val target_vr = bsimp2(bdr, dv)
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   854
        println(bits_print(target_vr._1))
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   855
        println(target_vr._2)
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   856
        println(vunsimp(bdr, dv)(target_vr._2))
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   857
      }
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   858
    }
149
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   859
  }
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   860
  def main(args: Array[String]) {
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   861
    //finj_test0('b', fuse(List(S, Z), internalise(  ( ("a"|"b")% ) )   ))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   862
    //finj_test0('a', fuse(List(S, Z), internalise(  ( ("a"|"b")% ) )   ))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   863
    //finj_test0('b', bder('a', internalise(   (("c" | "ab")%)  )))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   864
    //finj_test0('a', internalise(   (("c" | "ab")%)  ))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   865
    //this example gives us an exception
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   866
    //val r = internalise(ALTS(List(STAR(CHAR('c')), STAR(CHAR('b')))))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   867
    //val c = 'c'
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   868
    //if(bder(c, r) != internalise(der(c, erase(r))))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   869
      //println("noooooo!")
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   870
    //println(bits_print(r))
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   871
    //println(c)
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   872
    //finj_test0(c, r) 
6c5920fd02a7 before changes to bsimp2
Chengsong
parents: 148
diff changeset
   873
    vunsimp_test()
148
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   874
  }
c8ef391dd6f7 vunsimp
Chengsong
parents: 123
diff changeset
   875
   
0
Chengsong
parents:
diff changeset
   876
}
93
Chengsong
parents: 92
diff changeset
   877
//List(              ASTAR(List(Z),ACHAR(List(),a)),            AALTS(List(S),List(ACHAR(List(Z),b), ACHAR(List(S),a)))       )