lex_blex_Frankensteined.scala
author Chengsong
Fri, 10 Jan 2020 17:02:16 +0000
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parent 93 d486c12deeab
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package RexpRelated
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import scala.language.implicitConversions    
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import scala.language.reflectiveCalls
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import scala.annotation.tailrec   
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import scala.util.Try
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abstract class Bit
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case object Z extends Bit
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case object S extends Bit
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//case class C(c: Char) extends Bit
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abstract class Rexp 
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case object ZERO extends Rexp
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case object ONE extends Rexp
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case class CHAR(c: Char) extends Rexp
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case class ALTS(rs: List[Rexp]) extends Rexp 
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case class SEQ(r1: Rexp, r2: Rexp) extends Rexp 
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case class STAR(r: Rexp) extends Rexp 
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case class RECD(x: String, r: Rexp) extends Rexp
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object Rexp{
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  type Bits = List[Bit]
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  // abbreviations
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  type Mon = (Char, Rexp)
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  type Lin = Set[Mon]
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  def ALT(r1: Rexp, r2: Rexp) = ALTS(List(r1, r2))
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  def PLUS(r: Rexp) = SEQ(r, STAR(r))
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  def AALT(bs: Bits, r1: ARexp, r2: ARexp) = AALTS(bs, List(r1, r2))
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  def distinctBy[B, C](xs: List[B], f: B => C, acc: List[C] = Nil): List[B] = xs match {
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    case Nil => Nil
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    case (x::xs) => {
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      val res = f(x)
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      if (acc.contains(res)) distinctBy(xs, f, acc)  
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      else x::distinctBy(xs, f, res::acc)
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    }
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  } 
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  // some convenience for typing in regular expressions
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  def charlist2rexp(s : List[Char]): Rexp = s match {
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    case Nil => ONE
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    case c::Nil => CHAR(c)
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    case c::s => SEQ(CHAR(c), charlist2rexp(s))
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  }
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  implicit def string2rexp(s : String) : Rexp = charlist2rexp(s.toList)
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  implicit def RexpOps(r: Rexp) = new {
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    def | (s: Rexp) = ALT(r, s)
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    def % = STAR(r)
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    def ~ (s: Rexp) = SEQ(r, s)
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  }
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  implicit def stringOps(s: String) = new {
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    def | (r: Rexp) = ALT(s, r)
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    def | (r: String) = ALT(s, r)
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    def % = STAR(s)
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    def ~ (r: Rexp) = SEQ(s, r)
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    def ~ (r: String) = SEQ(s, r)
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    def $ (r: Rexp) = RECD(s, r)
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  }
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  // translation into ARexps
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  def fuse(bs: Bits, r: ARexp) : ARexp = r match {
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    case AZERO => AZERO
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    case AONE(cs) => AONE(bs ++ cs)
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    case ACHAR(cs, f) => ACHAR(bs ++ cs, f)
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    case AALTS(cs, rs) => AALTS(bs ++ cs, rs)
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    case ASEQ(cs, r1, r2) => ASEQ(bs ++ cs, r1, r2)
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    case ASTAR(cs, r) => ASTAR(bs ++ cs, r)
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  }
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  def internalise(r: Rexp) : ARexp = r match {
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    case ZERO => AZERO
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    case ONE => AONE(Nil)
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    case CHAR(c) => ACHAR(Nil, c)
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    case ALTS(List(r1, r2)) => 
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      AALTS(Nil, List(fuse(List(Z), internalise(r1)), fuse(List(S), internalise(r2))))
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    case ALTS(r1::rs) => {
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      val AALTS(Nil, rs2) = internalise(ALTS(rs))
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      AALTS(Nil, fuse(List(Z), internalise(r1)) :: rs2.map(fuse(List(S), _)))
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    }
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    case SEQ(r1, r2) => ASEQ(Nil, internalise(r1), internalise(r2))
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    case STAR(r) => ASTAR(Nil, internalise(r))
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    case RECD(x, r) => internalise(r)
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  }
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  internalise(("a" | "ab") ~ ("b" | ""))
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  def decode_aux(r: Rexp, bs: Bits) : (Val, Bits) = (r, bs) match {
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    case (ONE, bs) => (Empty, bs)
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    case (CHAR(f), bs) => (Chr(f), bs)
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    case (ALTS(r::Nil), bs) => decode_aux(r, bs)//this case seems only used when we simp a regex before derivatives and it contains things like alt("a")
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    case (ALTS(rs), bs) => bs match {
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      case Z::bs1 => {
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        val (v, bs2) = decode_aux(rs.head, bs1)
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        (Left(v), bs2)
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      }
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      case S::bs1 => {
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        val (v, bs2) = decode_aux(ALTS(rs.tail), bs1)
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        (Right(v), bs2)			
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      }
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    }
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    case (SEQ(r1, r2), bs) => {
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      val (v1, bs1) = decode_aux(r1, bs)
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      val (v2, bs2) = decode_aux(r2, bs1)
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      (Sequ(v1, v2), bs2)
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    }
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    case (STAR(r1), S::bs) => {
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      val (v, bs1) = decode_aux(r1, bs)
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      //println(v)
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      val (Stars(vs), bs2) = decode_aux(STAR(r1), bs1)
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      (Stars(v::vs), bs2)
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    }
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    case (STAR(_), Z::bs) => (Stars(Nil), bs)
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    case (RECD(x, r1), bs) => {
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      val (v, bs1) = decode_aux(r1, bs)
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      (Rec(x, v), bs1)
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    }
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  }
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  def decode(r: Rexp, bs: Bits) = decode_aux(r, bs) match {
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    case (v, Nil) => v
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    case _ => throw new Exception("Not decodable")
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  }
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  def code(v: Val): Bits = v match {
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    case Empty => Nil
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    case Chr(a) => Nil
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    case Left(v) => Z :: code(v)
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    case Right(v) => S :: code(v)
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    case Sequ(v1, v2) => code(v1) ::: code(v2)
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    case Stars(Nil) => Z::Nil
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    case Stars(v::vs) => S::code(v) ::: code(Stars(vs))
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  }
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  def retrieve(r: ARexp, v: Val): Bits = (r,v) match {
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    case (AONE(bs), Empty) => bs
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    case (ACHAR(bs, c), Chr(d)) => bs
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    case (AALTS(bs, a::Nil), v) => bs ++ retrieve(a, v)
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    case (AALTS(bs, as), Left(v)) => bs ++ retrieve(as.head,v)
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    case (AALTS(bs, as), Right(v)) => bs ++ retrieve(AALTS(Nil,as.tail),v)
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    case (ASEQ(bs, a1, a2), Sequ(v1, v2)) => bs ++ retrieve(a1, v1) ++ retrieve(a2, v2)
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    case (ASTAR(bs, a), Stars(Nil)) => bs ++ List(Z) 
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    case (ASTAR(bs, a), Stars(v::vs)) => bs ++ List(S) ++ retrieve(a, v) ++ retrieve(ASTAR(Nil, a), Stars(vs))
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  }//bug here last clause should not add list(S)
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  //erase function: extracts the regx from Aregex
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  def erase(r:ARexp): Rexp = r match{
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    case AZERO => ZERO
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    case AONE(_) => ONE
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    case ACHAR(bs, f) => CHAR(f)
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    case AALTS(bs, rs) => ALTS(rs.map(erase(_)))
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    case ASEQ(bs, r1, r2) => SEQ (erase(r1), erase(r2))
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    case ASTAR(cs, r)=> STAR(erase(r))
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  }
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  //--------------------------------------------------------------------------------------------------------START OF NON-BITCODE PART
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  // nullable function: tests whether the regular 
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  // expression can recognise the empty string
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  def nullable (r: Rexp) : Boolean = r match {
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    case ZERO => false
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    case ONE => true
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    case CHAR(_) => false
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    case ALTS(rs) => rs.exists(nullable)
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    case SEQ(r1, r2) => nullable(r1) && nullable(r2)
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    case STAR(_) => true
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    case RECD(_, r) => nullable(r)
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    //case PLUS(r) => nullable(r)
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  }
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  // derivative of a regular expression w.r.t. a character
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  def der (c: Char, r: Rexp) : Rexp = r match {
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    case ZERO => ZERO
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    case ONE => ZERO
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    case CHAR(f) => if (c == f) ONE else ZERO
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    case ALTS(List(r1, r2)) => ALTS(List(der(c, r1), der(c, r2)))
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    case SEQ(r1, r2) => 
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      if (nullable(r1)) ALTS(List(SEQ(der(c, r1), r2), der(c, r2)))
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      else SEQ(der(c, r1), r2)
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    case STAR(r) => SEQ(der(c, r), STAR(r))
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    case RECD(_, r1) => der(c, r1)
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    //case PLUS(r) => SEQ(der(c, r), STAR(r))
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  }
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  def ders (s: List[Char], r: Rexp) : Rexp = s match {
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    case Nil => r
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    case c::s => ders(s, der(c, r))
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  }
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def der_seqo(r:Rexp, s: List[Char],acc: List[Rexp]) : List[Rexp] = s match{
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    case Nil => acc ::: List(r)
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    case c::cs => der_seqo(der(c, r), cs, acc ::: List(r))
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  }
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  def der_seq_revo(r:Rexp, s: List[Char], acc: List[Rexp]): List[Rexp] = s match{
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    case Nil => r::acc
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    case c::cs =>der_seq_revo(r, cs, ders(s, r) :: acc  )
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  }
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  def re_closeo(l1: List[Rexp], l2: List[Rexp], re_init: Rexp): Rexp = l1 match {
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    case Nil => re_init
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    case c::cs => if(nullable(c)) re_closeo(cs, l2.tail, ALT(re_init,  l2.head)  ) 
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    else re_closeo(cs, l2.tail, re_init)
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  }
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  //HERE
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  def closed_string_dero(r1: Rexp, r2: Rexp, s: List[Char]): Rexp = {
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    val l1 = der_seqo(r1, s, Nil)
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    val l2 = der_seq_revo(r2, s, Nil)
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    val Re = re_closeo((l1.reverse).tail, l2.tail, SEQ(l1.last, l2.head))
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    Re
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  }
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  //derivative w.r.t string
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def ders2(s: List[Char], r: Rexp) : Rexp = (s, r) match {
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  case (Nil, r) => r
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  case (s, ZERO) => ZERO
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  case (s, ONE) => if (s == Nil) ONE else ZERO
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  case (s, CHAR(c)) => if (s == List(c)) ONE else 
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                       if (s == Nil) CHAR(c) else ZERO
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  case (s, ALTS(List(r1, r2))) => ALT(ders2(s, r1), ders2(s, r2))
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  case (s, SEQ(r1, r2)) => closed_string_dero(r1, r2, s)
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  case (c::cs, STAR(r)) => closed_string_dero(der(c, r), STAR(r), cs)
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}
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0
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  def flatten(v: Val) : String = v match {
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    case Empty => ""
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    case Chr(c) => c.toString
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    case Left(v) => flatten(v)
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    case Right(v) => flatten(v)
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    case Sequ(v1, v2) => flatten(v1) + flatten(v2)
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    case Stars(vs) => vs.map(flatten).mkString
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    case Rec(_, v) => flatten(v)
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  }
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  // extracts an environment from a value
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  def env(v: Val) : List[(String, String)] = v match {
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    case Empty => Nil
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    case Chr(c) => Nil
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    case Left(v) => env(v)
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    case Right(v) => env(v)
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    case Sequ(v1, v2) => env(v1) ::: env(v2)
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    case Stars(vs) => vs.flatMap(env)
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    case Rec(x, v) => (x, flatten(v))::env(v)
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  }
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  // injection part
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  def mkeps(r: Rexp) : Val = r match {
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    case ONE => Empty
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    case ALTS(List(r1, r2)) => 
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      if (nullable(r1)) Left(mkeps(r1)) else Right(mkeps(r2))
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    case SEQ(r1, r2) => Sequ(mkeps(r1), mkeps(r2))
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    case STAR(r) => Stars(Nil)
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    case RECD(x, r) => Rec(x, mkeps(r))
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    //case PLUS(r) => Stars(List(mkeps(r)))
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  }
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  def inj(r: Rexp, c: Char, v: Val) : Val = (r, v) match {
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    case (STAR(r), Sequ(v1, Stars(vs))) => Stars(inj(r, c, v1)::vs)
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    case (SEQ(r1, r2), Sequ(v1, v2)) => Sequ(inj(r1, c, v1), v2)
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    case (SEQ(r1, r2), Left(Sequ(v1, v2))) => Sequ(inj(r1, c, v1), v2)
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    case (SEQ(r1, r2), Right(v2)) => Sequ(mkeps(r1), inj(r2, c, v2))
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    case (ALTS(List(r1, r2)), Left(v1)) => Left(inj(r1, c, v1))
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    case (ALTS(List(r1, r2)), Right(v2)) => Right(inj(r2, c, v2))
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    case (CHAR(_), Empty) => Chr(c) 
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    case (RECD(x, r1), _) => Rec(x, inj(r1, c, v))
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    //case (PLUS(r), Sequ(v1, Stars(vs))) => Stars(inj(r, c, v1)::vs)
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  }
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  def lex(r: Rexp, s: List[Char]) : Val = s match {
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    case Nil => if (nullable(r)) mkeps(r) else throw new Exception("Not matched")
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    case c::cs => inj(r, c, lex(der(c, r), cs))
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  }
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  def lexing(r: Rexp, s: String) : Val = lex(r, s.toList)
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  // some "rectification" functions for simplification
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  def F_ID(v: Val): Val = v
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  def F_RIGHT(f: Val => Val) = (v:Val) => Right(f(v))
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  def F_LEFT(f: Val => Val) = (v:Val) => Left(f(v))
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  def F_ALT(f1: Val => Val, f2: Val => Val) = (v:Val) => v match {
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    case Right(v) => Right(f2(v))
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    case Left(v) => Left(f1(v))
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  }
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  def F_SEQ(f1: Val => Val, f2: Val => Val) = (v:Val) => v match {
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    case Sequ(v1, v2) => Sequ(f1(v1), f2(v2))
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  }
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  def F_SEQ_Empty1(f1: Val => Val, f2: Val => Val) = 
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    (v:Val) => Sequ(f1(Empty), f2(v))
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  def F_SEQ_Empty2(f1: Val => Val, f2: Val => Val) = 
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    (v:Val) => Sequ(f1(v), f2(Empty))
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  def F_RECD(f: Val => Val) = (v:Val) => v match {
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    case Rec(x, v) => Rec(x, f(v))
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  }
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  def F_ERROR(v: Val): Val = throw new Exception("error")
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  // simplification of regular expressions returning also an
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  // rectification function; no simplification under STAR 
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  def simp(r: Rexp): (Rexp, Val => Val) = r match {
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    case ALTS(List(r1, r2)) => {
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      val (r1s, f1s) = simp(r1)
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      val (r2s, f2s) = simp(r2)
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      (r1s, r2s) match {
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        case (ZERO, _) => (r2s, F_RIGHT(f2s))
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        case (_, ZERO) => (r1s, F_LEFT(f1s))
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        case _ => if (r1s == r2s) (r1s, F_LEFT(f1s))
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                  else (ALTS(List(r1s, r2s)), F_ALT(f1s, f2s)) 
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      }
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    }
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    case SEQ(r1, r2) => {
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      val (r1s, f1s) = simp(r1)
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      val (r2s, f2s) = simp(r2)
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      (r1s, r2s) match {
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        case (ZERO, _) => (ZERO, F_ERROR)
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        case (_, ZERO) => (ZERO, F_ERROR)
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        case (ONE, _) => (r2s, F_SEQ_Empty1(f1s, f2s))
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   317
        case (_, ONE) => (r1s, F_SEQ_Empty2(f1s, f2s))
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   318
        case _ => (SEQ(r1s,r2s), F_SEQ(f1s, f2s))
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      }
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   320
    }
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    case RECD(x, r1) => {
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      val (r1s, f1s) = simp(r1)
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      (RECD(x, r1s), F_RECD(f1s))
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    }
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    case r => (r, F_ID)
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  }
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  /*
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  val each_simp_time = scala.collection.mutable.ArrayBuffer.empty[Long]
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  val each_simp_timeb = scala.collection.mutable.ArrayBuffer.empty[Long]
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  */
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  def lex_simp(r: Rexp, s: List[Char]) : Val = s match {
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   332
    case Nil => {
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   333
      if (nullable(r)) {
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   334
        mkeps(r) 
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   335
      }
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      else throw new Exception("Not matched")
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    }
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    case c::cs => {
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   339
      val (r_simp, f_simp) = simp(der(c, r))
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      inj(r, c, f_simp(lex_simp(r_simp, cs)))
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   341
    }
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  }
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  def lexing_simp(r: Rexp, s: String) : Val = lex_simp(r, s.toList)
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  //println(lexing_simp(("a" | "ab") ~ ("b" | ""), "ab"))
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  // filters out all white spaces
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  def tokenise(r: Rexp, s: String) = 
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   350
    env(lexing_simp(r, s)).filterNot { _._1 == "w"}
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  //reads the string from a file 
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   354
  def fromFile(name: String) : String = 
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   355
    io.Source.fromFile(name).mkString
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   356
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   357
  def tokenise_file(r: Rexp, name: String) = 
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   358
    tokenise(r, fromFile(name))
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   359
  
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  //   Testing
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   361
  //============
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   362
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   363
  def time[T](code: => T) = {
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   364
    val start = System.nanoTime()
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   365
    val result = code
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   366
    val end = System.nanoTime()
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   367
    println((end - start)/1.0e9)
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   368
    result
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   369
  }
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   370
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   371
  //--------------------------------------------------------------------------------------------------------END OF NON-BITCODE PART
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   372
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   373
  // bnullable function: tests whether the aregular 
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   374
  // expression can recognise the empty string
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   375
  def bnullable (r: ARexp) : Boolean = r match {
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   376
    case AZERO => false
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   377
    case AONE(_) => true
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   378
    case ACHAR(_,_) => false
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   379
    case AALTS(_, rs) => rs.exists(bnullable)
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diff changeset
   380
    case ASEQ(_, r1, r2) => bnullable(r1) && bnullable(r2)
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diff changeset
   381
    case ASTAR(_, _) => true
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diff changeset
   382
  }
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   383
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   384
  def mkepsBC(r: ARexp) : Bits = r match {
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diff changeset
   385
    case AONE(bs) => bs
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diff changeset
   386
    case AALTS(bs, rs) => {
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diff changeset
   387
      val n = rs.indexWhere(bnullable)
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diff changeset
   388
      bs ++ mkepsBC(rs(n))
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diff changeset
   389
    }
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diff changeset
   390
    case ASEQ(bs, r1, r2) => bs ++ mkepsBC(r1) ++ mkepsBC(r2)
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diff changeset
   391
    case ASTAR(bs, r) => bs ++ List(Z)
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diff changeset
   392
  }
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diff changeset
   393
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diff changeset
   394
  // derivative of a regular expression w.r.t. a character
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diff changeset
   395
  def bder(c: Char, r: ARexp) : ARexp = r match {
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diff changeset
   396
    case AZERO => AZERO
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diff changeset
   397
    case AONE(_) => AZERO
12
768b833d6230 removed C(c) The retrieve and code in the previous version is still not correct and will crash. no prob now.
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diff changeset
   398
    case ACHAR(bs, f) => if (c == f) AONE(bs) else AZERO
0
Chengsong
parents:
diff changeset
   399
    case AALTS(bs, rs) => AALTS(bs, rs.map(bder(c, _)))
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diff changeset
   400
    case ASEQ(bs, r1, r2) => 
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parents:
diff changeset
   401
      if (bnullable(r1)) AALT(bs, ASEQ(Nil, bder(c, r1), r2), fuse(mkepsBC(r1), bder(c, r2)))
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parents:
diff changeset
   402
      else ASEQ(bs, bder(c, r1), r2)
Chengsong
parents:
diff changeset
   403
    case ASTAR(bs, r) => ASEQ(bs, fuse(List(S), bder(c, r)), ASTAR(Nil, r))
Chengsong
parents:
diff changeset
   404
  }
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parents:
diff changeset
   405
Chengsong
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diff changeset
   406
  // derivative w.r.t. a string (iterates bder)
Chengsong
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diff changeset
   407
  @tailrec
Chengsong
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diff changeset
   408
  def bders (s: List[Char], r: ARexp) : ARexp = s match {
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parents:
diff changeset
   409
    case Nil => r
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parents:
diff changeset
   410
    case c::s => bders(s, bder(c, r))
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parents:
diff changeset
   411
  }
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diff changeset
   412
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diff changeset
   413
  def flats(rs: List[ARexp]): List[ARexp] = rs match {
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diff changeset
   414
      case Nil => Nil
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parents:
diff changeset
   415
      case AZERO :: rs1 => flats(rs1)
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parents:
diff changeset
   416
      case AALTS(bs, rs1) :: rs2 => rs1.map(fuse(bs, _)) ::: flats(rs2)
Chengsong
parents:
diff changeset
   417
      case r1 :: rs2 => r1 :: flats(rs2)
15
Chengsong
parents: 14
diff changeset
   418
  }
17
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diff changeset
   419
  /*
15
Chengsong
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diff changeset
   420
  def remove(v: Val): Val = v match{
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parents: 14
diff changeset
   421
    case Right(v1) => v1
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parents: 14
diff changeset
   422
    case Left(v1) => v1
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diff changeset
   423
    case _ => throw new Exception("Not removable")
17
Chengsong
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diff changeset
   424
  }*/
15
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diff changeset
   425
  def augment(v: Val, i: Int): Val = if(i > 1) augment(Right(v), i - 1) else Right(v)
Chengsong
parents: 14
diff changeset
   426
//an overly complex version
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parents: 14
diff changeset
   427
/*
Chengsong
parents: 14
diff changeset
   428
    if(rel_dist >0){//the regex we are dealing with is not what v points at
Chengsong
parents: 14
diff changeset
   429
      rs match{
Chengsong
parents: 14
diff changeset
   430
        case Nil => throw new Exception("Trying to simplify a non-existent value")
Chengsong
parents: 14
diff changeset
   431
        case AZERO :: rs1 => flats_vsimp(rs1, rel_dist - 1, remove(v))
Chengsong
parents: 14
diff changeset
   432
        case AALTS(bs, rs1) :: rs2 => flats_vsimp(rs2, rel_dist - 1, augment(v, rs1.length - 1))//rs1 is guaranteed to have a len geq 2
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parents: 14
diff changeset
   433
        case r1 :: rs2 => flats_vsimp(rs2, rel_dist - 1, v)
Chengsong
parents: 14
diff changeset
   434
      }
0
Chengsong
parents:
diff changeset
   435
    }
15
Chengsong
parents: 14
diff changeset
   436
    else if(rel_dist == 0){//we are dealing with regex v is pointing to -- "v->r itself"
Chengsong
parents: 14
diff changeset
   437
      rs match{//r1 cannot be zero
Chengsong
parents: 14
diff changeset
   438
        AALTS(bs, rs1) :: rs2 => flats_vsimp(  )
Chengsong
parents: 14
diff changeset
   439
        AZERO::rs2 => throw new Exception("Value corresponds to zero")
Chengsong
parents: 14
diff changeset
   440
        r1::rs2 => flats_vsimp(rs2, rel_dist - 1, v)
Chengsong
parents: 14
diff changeset
   441
      }
Chengsong
parents: 14
diff changeset
   442
Chengsong
parents: 14
diff changeset
   443
    }
Chengsong
parents: 14
diff changeset
   444
    else{
Chengsong
parents: 14
diff changeset
   445
Chengsong
parents: 14
diff changeset
   446
    }
Chengsong
parents: 14
diff changeset
   447
    */
Chengsong
parents: 14
diff changeset
   448
  def flats_vsimp(rs: List[ARexp], position: Int): Int = (rs, position) match {
Chengsong
parents: 14
diff changeset
   449
    case (_, 0) => 0
Chengsong
parents: 14
diff changeset
   450
    case (Nil, _) => 0
16
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   451
    case (AZERO :: rs1, _) => flats_vsimp(rs1, position - 1) - 1
15
Chengsong
parents: 14
diff changeset
   452
    case (AALTS(bs, rs1) :: rs2, _) => rs1.length - 1 + flats_vsimp(rs2, position - 1)
Chengsong
parents: 14
diff changeset
   453
    case (r1 :: rs2, _) => flats_vsimp(rs2, position - 1)
Chengsong
parents: 14
diff changeset
   454
  }
0
Chengsong
parents:
diff changeset
   455
  def rflats(rs: List[Rexp]): List[Rexp] = rs match {
Chengsong
parents:
diff changeset
   456
    case Nil => Nil
Chengsong
parents:
diff changeset
   457
    case ZERO :: rs1 => rflats(rs1)
Chengsong
parents:
diff changeset
   458
    case ALTS(rs1) :: rs2 => rs1 ::: rflats(rs2)
Chengsong
parents:
diff changeset
   459
    case r1 :: rs2 => r1 :: rflats(rs2)
Chengsong
parents:
diff changeset
   460
  }
Chengsong
parents:
diff changeset
   461
  var flats_time = 0L
Chengsong
parents:
diff changeset
   462
  var dist_time = 0L
Chengsong
parents:
diff changeset
   463
  
Chengsong
parents:
diff changeset
   464
  def bsimp(r: ARexp): ARexp = r match {
Chengsong
parents:
diff changeset
   465
    case ASEQ(bs1, r1, r2) => (bsimp(r1), bsimp(r2)) match {
Chengsong
parents:
diff changeset
   466
        case (AZERO, _) => AZERO
Chengsong
parents:
diff changeset
   467
        case (_, AZERO) => AZERO
Chengsong
parents:
diff changeset
   468
        case (AONE(bs2), r2s) => fuse(bs1 ++ bs2, r2s)
Chengsong
parents:
diff changeset
   469
        case (r1s, r2s) => ASEQ(bs1, r1s, r2s)
Chengsong
parents:
diff changeset
   470
    }
Chengsong
parents:
diff changeset
   471
    case AALTS(bs1, rs) => {
Chengsong
parents:
diff changeset
   472
      val rs_simp = rs.map(bsimp)
Chengsong
parents:
diff changeset
   473
      val flat_res = flats(rs_simp)
Chengsong
parents:
diff changeset
   474
      val dist_res = distinctBy(flat_res, erase)
Chengsong
parents:
diff changeset
   475
      dist_res match {
Chengsong
parents:
diff changeset
   476
        case Nil => AZERO
93
Chengsong
parents: 92
diff changeset
   477
        case r :: Nil => fuse(bs1, r)
0
Chengsong
parents:
diff changeset
   478
        case rs => AALTS(bs1, rs)  
Chengsong
parents:
diff changeset
   479
      }
Chengsong
parents:
diff changeset
   480
    }
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   481
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
0
Chengsong
parents:
diff changeset
   482
    case r => r
Chengsong
parents:
diff changeset
   483
  }
93
Chengsong
parents: 92
diff changeset
   484
  //only print at the top level
Chengsong
parents: 92
diff changeset
   485
17
Chengsong
parents: 16
diff changeset
   486
  def find_pos(v: Val, rs: List[ARexp]): Int = (v, rs) match{
Chengsong
parents: 16
diff changeset
   487
    case (v, r::Nil) => 0
15
Chengsong
parents: 14
diff changeset
   488
    case (Right(v), r::rs) => find_pos(v, rs) + 1
17
Chengsong
parents: 16
diff changeset
   489
    case (Left(v), r::rs) => 0
Chengsong
parents: 16
diff changeset
   490
    //case (v, _) => 0
Chengsong
parents: 16
diff changeset
   491
  }
Chengsong
parents: 16
diff changeset
   492
  def find_pos_aux(v: Val, r: ARexp): Int = r match {
Chengsong
parents: 16
diff changeset
   493
    case AALTS(bs, rs) => find_pos(v, rs)
Chengsong
parents: 16
diff changeset
   494
    case r => 0
15
Chengsong
parents: 14
diff changeset
   495
  }
17
Chengsong
parents: 16
diff changeset
   496
  def remove(v: Val, rs: List[ARexp]) : Val = (v,rs) match {//remove the outmost layer of ALTS's Left and Right
Chengsong
parents: 16
diff changeset
   497
    //we have to use r to detect the bound of nested L/Rs
Chengsong
parents: 16
diff changeset
   498
    case (v, r::Nil) => v
Chengsong
parents: 16
diff changeset
   499
    case (Right(v), r::rs) => remove(v, rs) 
15
Chengsong
parents: 14
diff changeset
   500
    case (Left(v), r::rs) => v 
17
Chengsong
parents: 16
diff changeset
   501
    //case (v, r::Nil) => v
15
Chengsong
parents: 14
diff changeset
   502
  }
16
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   503
  def simple_end(v: Val): Boolean = v match {
15
Chengsong
parents: 14
diff changeset
   504
    case Left(v) => return false
Chengsong
parents: 14
diff changeset
   505
    case Right(v) => return simple_end(v)
Chengsong
parents: 14
diff changeset
   506
    case v => return true
Chengsong
parents: 14
diff changeset
   507
  }
17
Chengsong
parents: 16
diff changeset
   508
  def isend(v: Val, rs: List[ARexp], position: Int): Boolean = {//TODO: here the slice api i am not familiar with so this call might be incorrect and crash the bsimp2
Chengsong
parents: 16
diff changeset
   509
    val rsbh = rs.slice(position + 1, rs.length)
15
Chengsong
parents: 14
diff changeset
   510
    val out_end = if(flats(rsbh) == Nil) true else false
Chengsong
parents: 14
diff changeset
   511
    val inner_end = simple_end(v)
Chengsong
parents: 14
diff changeset
   512
    inner_end && out_end
Chengsong
parents: 14
diff changeset
   513
  }
16
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   514
  def get_coat(v: Val, rs: List[Rexp], vs: Val): Val = (v, rs) match{//the dual operation of remove(so-called by myself)
15
Chengsong
parents: 14
diff changeset
   515
    case (Right(v), r::Nil) => Right(vs)
Chengsong
parents: 14
diff changeset
   516
    case (Left(v), r::rs) => Left(vs) 
Chengsong
parents: 14
diff changeset
   517
    case (Right(v), r::rs) => Right(get_coat(v, rs, vs))
Chengsong
parents: 14
diff changeset
   518
  }
Chengsong
parents: 14
diff changeset
   519
  def coat(v: Val, i: Int) : Val = i match {
Chengsong
parents: 14
diff changeset
   520
    case 0 => v
Chengsong
parents: 14
diff changeset
   521
    case i => coat(Right(v), i - 1)
Chengsong
parents: 14
diff changeset
   522
  }
17
Chengsong
parents: 16
diff changeset
   523
  //This version takes a regex and a value, return a simplified regex and its corresponding simplified value 
Chengsong
parents: 16
diff changeset
   524
  def bsimp2(r: ARexp, v: Val): (ARexp, Val) = (r,v) match{
Chengsong
parents: 16
diff changeset
   525
    case (ASEQ(bs1, r1, r2), Sequ(v1, v2)) => (bsimp2(r1, v1), bsimp2(r2, v2)) match {
Chengsong
parents: 16
diff changeset
   526
        case ((AZERO, _), (_, _) )=> (AZERO, undefined)
Chengsong
parents: 16
diff changeset
   527
        case ((_, _), (AZERO, _)) => (AZERO, undefined)
Chengsong
parents: 16
diff changeset
   528
        case ((AONE(bs2), v1s) , (r2s, v2s)) => (fuse(bs1 ++ bs2, r2s), v2s )//v2 tells how to retrieve bits in r2s, which is enough as the bits of the first part of the sequence has already been integrated to the top level of the second regx.
Chengsong
parents: 16
diff changeset
   529
        case ((r1s, v1s), (r2s, v2s)) => (ASEQ(bs1, r1s, r2s),  Sequ(v1s, v2s))
Chengsong
parents: 16
diff changeset
   530
    }
Chengsong
parents: 16
diff changeset
   531
    case (AALTS(bs1, rs), v) => {
Chengsong
parents: 16
diff changeset
   532
      //phase 1 transformation so that aalts(bs1, rs) => aalts(bs1, rsf) and v => vf
Chengsong
parents: 16
diff changeset
   533
      val init_ind = find_pos(v, rs)
Chengsong
parents: 16
diff changeset
   534
      val vs = bsimp2(rs(init_ind), remove(v, rs))//remove all the outer layers of left and right in v to  match the regx rs[i]
Chengsong
parents: 16
diff changeset
   535
      //println(vs)
Chengsong
parents: 16
diff changeset
   536
      val rs_simp = rs.map(bsimp)
Chengsong
parents: 16
diff changeset
   537
      val vs_kernel = rs_simp(init_ind) match {
Chengsong
parents: 16
diff changeset
   538
        case AALTS(bs2, rs2) => remove(vs._2, rs2)//remove the secondary layer of left and right
Chengsong
parents: 16
diff changeset
   539
        case r => vs._2
Chengsong
parents: 16
diff changeset
   540
      }
Chengsong
parents: 16
diff changeset
   541
      val flat_res = flats(rs_simp)
Chengsong
parents: 16
diff changeset
   542
      val vs_for_coating = if(isend(vs._2, rs_simp, init_ind)||flat_res.length == 1) vs_kernel else Left(vs_kernel)
Chengsong
parents: 16
diff changeset
   543
      val r_s = rs_simp(init_ind)//or vs._1
Chengsong
parents: 16
diff changeset
   544
      val shift = flats_vsimp(rs_simp, init_ind) + find_pos_aux(vs._2, rs_simp(init_ind))
Chengsong
parents: 16
diff changeset
   545
      val new_ind = init_ind + shift
Chengsong
parents: 16
diff changeset
   546
      val vf = coat(vs_for_coating, new_ind)
Chengsong
parents: 16
diff changeset
   547
      //flats2 returns a list of regex and a single v
Chengsong
parents: 16
diff changeset
   548
      //now |- vf: ALTS(bs1, flat_res)
Chengsong
parents: 16
diff changeset
   549
      //phase 2 transformation so that aalts(bs1, rsf) => aalts(bs, rsdb) and vf => vdb
Chengsong
parents: 16
diff changeset
   550
      val dist_res = distinctBy(flat_res, erase)
Chengsong
parents: 16
diff changeset
   551
      val front_part = distinctBy(flat_res.slice(0, new_ind + 1), erase)
Chengsong
parents: 16
diff changeset
   552
      //val size_reduction = new_ind + 1 - front_part.length
Chengsong
parents: 16
diff changeset
   553
      val vdb = if(dist_res.length == front_part.length )//that means the regex we are interested in is at the end of the list
Chengsong
parents: 16
diff changeset
   554
      {
Chengsong
parents: 16
diff changeset
   555
        coat(vs_kernel, front_part.length - 1)
Chengsong
parents: 16
diff changeset
   556
      }
Chengsong
parents: 16
diff changeset
   557
      else{
Chengsong
parents: 16
diff changeset
   558
        coat(Left(vs_kernel), front_part.length - 1)
Chengsong
parents: 16
diff changeset
   559
      }
Chengsong
parents: 16
diff changeset
   560
      //println(vdb)
Chengsong
parents: 16
diff changeset
   561
      //we don't need to transform vdb as this phase will not make enough changes to the regex to affect value.
Chengsong
parents: 16
diff changeset
   562
      //the above statement needs verification. but can be left as is now.
Chengsong
parents: 16
diff changeset
   563
      dist_res match {
Chengsong
parents: 16
diff changeset
   564
        case Nil => (AZERO, undefined)
Chengsong
parents: 16
diff changeset
   565
        case s :: Nil => (fuse(bs1, s), vdb)
Chengsong
parents: 16
diff changeset
   566
        case rs => (AALTS(bs1, rs), vdb)
Chengsong
parents: 16
diff changeset
   567
      }
Chengsong
parents: 16
diff changeset
   568
    }
Chengsong
parents: 16
diff changeset
   569
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
Chengsong
parents: 16
diff changeset
   570
    case (r, v) => (r, v)  
Chengsong
parents: 16
diff changeset
   571
  }
Chengsong
parents: 16
diff changeset
   572
  def vsimp(r: ARexp, v: Val): Val = bsimp2(r, v)._2
Chengsong
parents: 16
diff changeset
   573
  /*This version was first intended for returning a function however a value would be simpler.
15
Chengsong
parents: 14
diff changeset
   574
  def bsimp2(r: ARexp, v: Val): (ARexp, Val => Val) = (r,v) match{
Chengsong
parents: 14
diff changeset
   575
    case (ASEQ(bs1, r1, r2), v) => (bsimp2(r1), bsimp2(r2)) match {
Chengsong
parents: 14
diff changeset
   576
        case ((AZERO, _), (_, _) )=> (AZERO, undefined)
Chengsong
parents: 14
diff changeset
   577
        case ((_, _), (AZERO, _)) => (AZERO, undefined)
Chengsong
parents: 14
diff changeset
   578
        case ((AONE(bs2), f1) , (r2s, f2)) => (fuse(bs1 ++ bs2, r2s), lambda v => v match { case Sequ(_, v) => f2(v) } )
Chengsong
parents: 14
diff changeset
   579
        case ((r1s, f1), (r2s, f2)) => (ASEQ(bs1, r1s, r2s), lambda v => v match {case Sequ(v1, v2) => Sequ(f1(v1), f2(v2))}
Chengsong
parents: 14
diff changeset
   580
    }
Chengsong
parents: 14
diff changeset
   581
    case AALTS(bs1, rs) => {
Chengsong
parents: 14
diff changeset
   582
      val init_ind = find_pos(v, rs)
Chengsong
parents: 14
diff changeset
   583
      val vs = bsimp2(rs[init_ind], remove(v, rs))//remove all the outer layers of left and right in v to  match the regx rs[i]
Chengsong
parents: 14
diff changeset
   584
      val rs_simp = rs.map(bsimp)
Chengsong
parents: 14
diff changeset
   585
      val vs_kernel = rs_simp[init_ind] match {
Chengsong
parents: 14
diff changeset
   586
        case AALTS(bs2, rs2) => remove(vs, rs_simp[init_ind])//remove the secondary layer of left and right
Chengsong
parents: 14
diff changeset
   587
        case r => vs
Chengsong
parents: 14
diff changeset
   588
      }
Chengsong
parents: 14
diff changeset
   589
      val vs_for_coating = if(isend(vs, rs_simp, init_ind)) vs_kernel else Left(vs_kernel)
Chengsong
parents: 14
diff changeset
   590
Chengsong
parents: 14
diff changeset
   591
      val r_s = rs_simp[init_ind]
Chengsong
parents: 14
diff changeset
   592
      val shift = flats_vsimp(vs, rs_simp, init_ind) + find_pos(vs, rs_simp[init_ind])
Chengsong
parents: 14
diff changeset
   593
      val vf = coat(vs_for_coating, shift + init_ind)
Chengsong
parents: 14
diff changeset
   594
Chengsong
parents: 14
diff changeset
   595
      val flat_res = flats(rs_simp)//flats2 returns a list of regex and a single v
Chengsong
parents: 14
diff changeset
   596
      val dist_res = distinctBy(flat_res, erase)
Chengsong
parents: 14
diff changeset
   597
      dist_res match {
Chengsong
parents: 14
diff changeset
   598
        case Nil => AZERO
Chengsong
parents: 14
diff changeset
   599
        case s :: Nil => fuse(bs1, s)
Chengsong
parents: 14
diff changeset
   600
        case rs => AALTS(bs1, rs)  
Chengsong
parents: 14
diff changeset
   601
      }
Chengsong
parents: 14
diff changeset
   602
    }
Chengsong
parents: 14
diff changeset
   603
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
Chengsong
parents: 14
diff changeset
   604
    case r => r  
16
c51178fa85fe new version of slides
Chengsong
parents: 15
diff changeset
   605
  }*/
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   606
  def super_bsimp(r: ARexp): ARexp = r match {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   607
    case ASEQ(bs1, r1, r2) => (super_bsimp(r1), super_bsimp(r2)) match {
0
Chengsong
parents:
diff changeset
   608
        case (AZERO, _) => AZERO
Chengsong
parents:
diff changeset
   609
        case (_, AZERO) => AZERO
11
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   610
        case (AONE(bs2), r2s) => fuse(bs1 ++ bs2, r2s)//万一是(r1, alts(rs))这种形式呢
9c1ca6d6e190 The C(Char) construct is incompatible with the code and retrieve in Fahad's thesis.
Chengsong
parents: 5
diff changeset
   611
        case (AALTS(bs2, rs), r2) => AALTS(bs1 ++ bs2, rs.map(r => r match {case AONE(bs3) => fuse(bs3, r2) case r => ASEQ(Nil, r, r2)} ) ) 
0
Chengsong
parents:
diff changeset
   612
        case (r1s, r2s) => ASEQ(bs1, r1s, r2s)
Chengsong
parents:
diff changeset
   613
    }
Chengsong
parents:
diff changeset
   614
    case AALTS(bs1, rs) => {
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   615
      val rs_simp = rs.map(super_bsimp)
0
Chengsong
parents:
diff changeset
   616
      val flat_res = flats(rs_simp)
Chengsong
parents:
diff changeset
   617
      val dist_res = distinctBy(flat_res, erase)
Chengsong
parents:
diff changeset
   618
      dist_res match {
Chengsong
parents:
diff changeset
   619
        case Nil => AZERO
Chengsong
parents:
diff changeset
   620
        case s :: Nil => fuse(bs1, s)
Chengsong
parents:
diff changeset
   621
        case rs => AALTS(bs1, rs)  
Chengsong
parents:
diff changeset
   622
      }
Chengsong
parents:
diff changeset
   623
    }
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   624
    //case ASTAR(bs, r) => ASTAR(bs, bsimp(r))
0
Chengsong
parents:
diff changeset
   625
    case r => r
Chengsong
parents:
diff changeset
   626
  }
Chengsong
parents:
diff changeset
   627
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   628
0
Chengsong
parents:
diff changeset
   629
  def simp_weakened(r: Rexp): Rexp = r match {
Chengsong
parents:
diff changeset
   630
    case SEQ(r1, r2) => (simp_weakened(r1), r2) match {
Chengsong
parents:
diff changeset
   631
        case (ZERO, _) => ZERO
Chengsong
parents:
diff changeset
   632
        case (_, ZERO) => ZERO
Chengsong
parents:
diff changeset
   633
        case (ONE, r2s) => r2s
Chengsong
parents:
diff changeset
   634
        case (r1s, r2s) => SEQ(r1s, r2s)
Chengsong
parents:
diff changeset
   635
    }
Chengsong
parents:
diff changeset
   636
    case ALTS(rs) => {
Chengsong
parents:
diff changeset
   637
      val rs_simp = rs.map(simp_weakened)
Chengsong
parents:
diff changeset
   638
      val flat_res = rflats(rs_simp)
Chengsong
parents:
diff changeset
   639
      val dist_res = rs_simp.distinct
Chengsong
parents:
diff changeset
   640
      dist_res match {
Chengsong
parents:
diff changeset
   641
        case Nil => ZERO
Chengsong
parents:
diff changeset
   642
        case s :: Nil => s
Chengsong
parents:
diff changeset
   643
        case rs => ALTS(rs)  
Chengsong
parents:
diff changeset
   644
      }
Chengsong
parents:
diff changeset
   645
    }
Chengsong
parents:
diff changeset
   646
    case STAR(r) => STAR(simp_weakened(r))
Chengsong
parents:
diff changeset
   647
    case r => r
Chengsong
parents:
diff changeset
   648
  }
Chengsong
parents:
diff changeset
   649
    
Chengsong
parents:
diff changeset
   650
  def bders_simp (s: List[Char], r: ARexp) : ARexp = s match {
Chengsong
parents:
diff changeset
   651
    case Nil => r
Chengsong
parents:
diff changeset
   652
    case c::s => bders_simp(s, bsimp(bder(c, r)))
Chengsong
parents:
diff changeset
   653
  }
14
610f14009c0b the property
Chengsong
parents: 12
diff changeset
   654
  //----------------------------------------------------------------------------experiment bsimp
610f14009c0b the property
Chengsong
parents: 12
diff changeset
   655
  /*
610f14009c0b the property
Chengsong
parents: 12
diff changeset
   656
0
Chengsong
parents:
diff changeset
   657
  */
Chengsong
parents:
diff changeset
   658
  /*
Chengsong
parents:
diff changeset
   659
  def time[T](code: => T) = {
Chengsong
parents:
diff changeset
   660
    val start = System.nanoTime()
Chengsong
parents:
diff changeset
   661
    val result = code
Chengsong
parents:
diff changeset
   662
    val end = System.nanoTime()
Chengsong
parents:
diff changeset
   663
    println((end - start)/1.0e9)
Chengsong
parents:
diff changeset
   664
    result
Chengsong
parents:
diff changeset
   665
  }
Chengsong
parents:
diff changeset
   666
  */
Chengsong
parents:
diff changeset
   667
  // main unsimplified lexing function (produces a value)
Chengsong
parents:
diff changeset
   668
  def blex(r: ARexp, s: List[Char]) : Bits = s match {
Chengsong
parents:
diff changeset
   669
    case Nil => if (bnullable(r)) mkepsBC(r) else throw new Exception("Not matched")
Chengsong
parents:
diff changeset
   670
    case c::cs => {
Chengsong
parents:
diff changeset
   671
      val der_res = bder(c,r)
Chengsong
parents:
diff changeset
   672
      blex(der_res, cs)
Chengsong
parents:
diff changeset
   673
    }
Chengsong
parents:
diff changeset
   674
  }
Chengsong
parents:
diff changeset
   675
Chengsong
parents:
diff changeset
   676
  def bpre_lexing(r: Rexp, s: String) = blex(internalise(r), s.toList)
14
610f14009c0b the property
Chengsong
parents: 12
diff changeset
   677
  def blexing(r: Rexp, s: String) : Val = decode(r, blex(internalise(r), s.toList))
0
Chengsong
parents:
diff changeset
   678
Chengsong
parents:
diff changeset
   679
  var bder_time = 0L
Chengsong
parents:
diff changeset
   680
  var bsimp_time = 0L
Chengsong
parents:
diff changeset
   681
  var mkepsBC_time = 0L
Chengsong
parents:
diff changeset
   682
  var small_de = 2
Chengsong
parents:
diff changeset
   683
  var big_de = 5
Chengsong
parents:
diff changeset
   684
  var usual_de = 3
Chengsong
parents:
diff changeset
   685
  
Chengsong
parents:
diff changeset
   686
  def blex_simp(r: ARexp, s: List[Char]) : Bits = s match {
Chengsong
parents:
diff changeset
   687
    case Nil => {
Chengsong
parents:
diff changeset
   688
      if (bnullable(r)) {
Chengsong
parents:
diff changeset
   689
        //println(asize(r))
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   690
        mkepsBC(r)
0
Chengsong
parents:
diff changeset
   691
      }
Chengsong
parents:
diff changeset
   692
    else throw new Exception("Not matched")
Chengsong
parents:
diff changeset
   693
    }
Chengsong
parents:
diff changeset
   694
    case c::cs => {
Chengsong
parents:
diff changeset
   695
      val der_res = bder(c,r)
Chengsong
parents:
diff changeset
   696
      val simp_res = bsimp(der_res)
Chengsong
parents:
diff changeset
   697
      blex_simp(simp_res, cs)      
Chengsong
parents:
diff changeset
   698
    }
Chengsong
parents:
diff changeset
   699
  }
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   700
  def super_blex_simp(r: ARexp, s: List[Char]): Bits = s match {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   701
    case Nil => {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   702
      if (bnullable(r)) {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   703
        mkepsBC(r)
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   704
      }
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   705
      else throw new Exception("Not matched")
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   706
    }
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   707
    case c::cs => {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   708
      super_blex_simp(super_bsimp(bder(c,r)), cs)
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   709
    }
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   710
  }
0
Chengsong
parents:
diff changeset
   711
  def blex_real_simp(r: ARexp, s: List[Char]): ARexp = s match{
Chengsong
parents:
diff changeset
   712
    case Nil => r
Chengsong
parents:
diff changeset
   713
    case c::cs => blex_real_simp(bsimp(bder(c, r)), cs)
Chengsong
parents:
diff changeset
   714
  }
Chengsong
parents:
diff changeset
   715
Chengsong
parents:
diff changeset
   716
Chengsong
parents:
diff changeset
   717
  //size: of a Aregx for testing purposes 
Chengsong
parents:
diff changeset
   718
  def size(r: Rexp) : Int = r match {
Chengsong
parents:
diff changeset
   719
    case ZERO => 1
Chengsong
parents:
diff changeset
   720
    case ONE => 1
Chengsong
parents:
diff changeset
   721
    case CHAR(_) => 1
Chengsong
parents:
diff changeset
   722
    case SEQ(r1, r2) => 1 + size(r1) + size(r2)
Chengsong
parents:
diff changeset
   723
    case ALTS(rs) => 1 + rs.map(size).sum
Chengsong
parents:
diff changeset
   724
    case STAR(r) => 1 + size(r)
Chengsong
parents:
diff changeset
   725
  }
Chengsong
parents:
diff changeset
   726
Chengsong
parents:
diff changeset
   727
  def asize(a: ARexp) = size(erase(a))
Chengsong
parents:
diff changeset
   728
Chengsong
parents:
diff changeset
   729
Chengsong
parents:
diff changeset
   730
  // decoding does not work yet
Chengsong
parents:
diff changeset
   731
  def blexing_simp(r: Rexp, s: String) = {
Chengsong
parents:
diff changeset
   732
    val bit_code = blex_simp(internalise(r), s.toList)
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   733
    decode(r, bit_code) 
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   734
  }
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   735
  def super_blexing_simp(r: Rexp, s: String) = {
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   736
    decode(r, super_blex_simp(internalise(r), s.toList))
0
Chengsong
parents:
diff changeset
   737
  }
Chengsong
parents:
diff changeset
   738
Chengsong
parents:
diff changeset
   739
Chengsong
parents:
diff changeset
   740
Chengsong
parents:
diff changeset
   741
Chengsong
parents:
diff changeset
   742
Chengsong
parents:
diff changeset
   743
  // Lexing Rules for a Small While Language
Chengsong
parents:
diff changeset
   744
Chengsong
parents:
diff changeset
   745
  //symbols
Chengsong
parents:
diff changeset
   746
  /*
Chengsong
parents:
diff changeset
   747
  val SYM = PRED("abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ".contains(_))
Chengsong
parents:
diff changeset
   748
  
Chengsong
parents:
diff changeset
   749
  //digits
Chengsong
parents:
diff changeset
   750
  val DIGIT = PRED("0123456789".contains(_))
Chengsong
parents:
diff changeset
   751
  //identifiers
Chengsong
parents:
diff changeset
   752
  val ID = SYM ~ (SYM | DIGIT).% 
Chengsong
parents:
diff changeset
   753
  //numbers
Chengsong
parents:
diff changeset
   754
  val NUM = STAR(DIGIT)
Chengsong
parents:
diff changeset
   755
  //keywords
Chengsong
parents:
diff changeset
   756
  val KEYWORD : Rexp = "skip" | "while" | "do" | "if" | "then" | "else" | "read" | "write" | "true" | "false"
Chengsong
parents:
diff changeset
   757
  val AKEYWORD: Rexp = ALTS(List("skip" , "while" , "do" , "if" , "then" , "else" , "read" , "write" , "true" , "false"))
Chengsong
parents:
diff changeset
   758
  //semicolons
Chengsong
parents:
diff changeset
   759
  val SEMI: Rexp = ";"
Chengsong
parents:
diff changeset
   760
  //operators
Chengsong
parents:
diff changeset
   761
  val OP: Rexp = ":=" | "==" | "-" | "+" | "*" | "!=" | "<" | ">" | "<=" | ">=" | "%" | "/"
Chengsong
parents:
diff changeset
   762
  val AOP: Rexp = ALTS(List(":=" , "==" , "-" , "+" , "*" , "!=" , "<" , ">" , "<=" , ">=" , "%" , "/"))
Chengsong
parents:
diff changeset
   763
  //whitespaces
Chengsong
parents:
diff changeset
   764
  val WHITESPACE = PLUS(" " | "\n" | "\t")
Chengsong
parents:
diff changeset
   765
  //parentheses
Chengsong
parents:
diff changeset
   766
  val RPAREN: Rexp = ")"
Chengsong
parents:
diff changeset
   767
  val LPAREN: Rexp = "("
Chengsong
parents:
diff changeset
   768
  val BEGIN: Rexp = "{"
Chengsong
parents:
diff changeset
   769
  val END: Rexp = "}"
Chengsong
parents:
diff changeset
   770
  //strings...but probably needs not
Chengsong
parents:
diff changeset
   771
  val STRING: Rexp = "\"" ~ SYM.% ~ "\""
Chengsong
parents:
diff changeset
   772
Chengsong
parents:
diff changeset
   773
Chengsong
parents:
diff changeset
   774
Chengsong
parents:
diff changeset
   775
  val WHILE_REGS = (("k" $ KEYWORD) | 
Chengsong
parents:
diff changeset
   776
                    ("i" $ ID) | 
Chengsong
parents:
diff changeset
   777
                    ("o" $ OP) | 
Chengsong
parents:
diff changeset
   778
                    ("n" $ NUM) | 
Chengsong
parents:
diff changeset
   779
                    ("s" $ SEMI) | 
Chengsong
parents:
diff changeset
   780
                    ("str" $ STRING) |
Chengsong
parents:
diff changeset
   781
                    ("p" $ (LPAREN | RPAREN)) | 
Chengsong
parents:
diff changeset
   782
                    ("b" $ (BEGIN | END)) | 
Chengsong
parents:
diff changeset
   783
                    ("w" $ WHITESPACE)).%
Chengsong
parents:
diff changeset
   784
Chengsong
parents:
diff changeset
   785
  val AWHILE_REGS = (
Chengsong
parents:
diff changeset
   786
    ALTS(
Chengsong
parents:
diff changeset
   787
      List(
Chengsong
parents:
diff changeset
   788
        ("k" $ AKEYWORD), 
Chengsong
parents:
diff changeset
   789
                    ("i" $ ID),
Chengsong
parents:
diff changeset
   790
                    ("o" $ AOP) , 
Chengsong
parents:
diff changeset
   791
                    ("n" $ NUM) ,
Chengsong
parents:
diff changeset
   792
                    ("s" $ SEMI) ,
Chengsong
parents:
diff changeset
   793
                    ("str" $ STRING), 
Chengsong
parents:
diff changeset
   794
                    ("p" $ (LPAREN | RPAREN)), 
Chengsong
parents:
diff changeset
   795
                    ("b" $ (BEGIN | END)), 
Chengsong
parents:
diff changeset
   796
                    ("w" $ WHITESPACE)
Chengsong
parents:
diff changeset
   797
      )
Chengsong
parents:
diff changeset
   798
    )
Chengsong
parents:
diff changeset
   799
  ).%
Chengsong
parents:
diff changeset
   800
Chengsong
parents:
diff changeset
   801
*/
Chengsong
parents:
diff changeset
   802
Chengsong
parents:
diff changeset
   803
Chengsong
parents:
diff changeset
   804
  //--------------------------------------------------------------------------------------------------------START OF NON-BITCODE PART (TESTING)
Chengsong
parents:
diff changeset
   805
  /*
Chengsong
parents:
diff changeset
   806
  // Two Simple While programs
Chengsong
parents:
diff changeset
   807
  //========================
Chengsong
parents:
diff changeset
   808
  println("prog0 test")
Chengsong
parents:
diff changeset
   809
Chengsong
parents:
diff changeset
   810
  val prog0 = """read n"""
Chengsong
parents:
diff changeset
   811
  println(env(lexing_simp(WHILE_REGS, prog0)))
Chengsong
parents:
diff changeset
   812
  println(tokenise(WHILE_REGS, prog0))
Chengsong
parents:
diff changeset
   813
Chengsong
parents:
diff changeset
   814
  println("prog1 test")
Chengsong
parents:
diff changeset
   815
Chengsong
parents:
diff changeset
   816
  val prog1 = """read  n; write (n)"""
Chengsong
parents:
diff changeset
   817
  println(tokenise(WHILE_REGS, prog1))
Chengsong
parents:
diff changeset
   818
Chengsong
parents:
diff changeset
   819
  */
Chengsong
parents:
diff changeset
   820
  // Bigger Tests
Chengsong
parents:
diff changeset
   821
  //==============
Chengsong
parents:
diff changeset
   822
Chengsong
parents:
diff changeset
   823
  def escape(raw: String): String = {
Chengsong
parents:
diff changeset
   824
    import scala.reflect.runtime.universe._
Chengsong
parents:
diff changeset
   825
    Literal(Constant(raw)).toString
Chengsong
parents:
diff changeset
   826
  }
Chengsong
parents:
diff changeset
   827
Chengsong
parents:
diff changeset
   828
  val prog2 = """
Chengsong
parents:
diff changeset
   829
  write "Fib";
Chengsong
parents:
diff changeset
   830
  read n;
Chengsong
parents:
diff changeset
   831
  minus1 := 0;
Chengsong
parents:
diff changeset
   832
  minus2 := 1;
Chengsong
parents:
diff changeset
   833
  while n > 0 do {
Chengsong
parents:
diff changeset
   834
    temp := minus2;
Chengsong
parents:
diff changeset
   835
    minus2 := minus1 + minus2;
Chengsong
parents:
diff changeset
   836
    minus1 := temp;
Chengsong
parents:
diff changeset
   837
    n := n - 1
Chengsong
parents:
diff changeset
   838
  };
Chengsong
parents:
diff changeset
   839
  write "Result";
Chengsong
parents:
diff changeset
   840
  write minus2
Chengsong
parents:
diff changeset
   841
  """
Chengsong
parents:
diff changeset
   842
Chengsong
parents:
diff changeset
   843
  val prog3 = """
Chengsong
parents:
diff changeset
   844
  start := 1000;
Chengsong
parents:
diff changeset
   845
  x := start;
Chengsong
parents:
diff changeset
   846
  y := start;
Chengsong
parents:
diff changeset
   847
  z := start;
Chengsong
parents:
diff changeset
   848
  while 0 < x do {
Chengsong
parents:
diff changeset
   849
  while 0 < y do {
Chengsong
parents:
diff changeset
   850
    while 0 < z do {
Chengsong
parents:
diff changeset
   851
      z := z - 1
Chengsong
parents:
diff changeset
   852
    };
Chengsong
parents:
diff changeset
   853
    z := start;
Chengsong
parents:
diff changeset
   854
    y := y - 1
Chengsong
parents:
diff changeset
   855
  };     
Chengsong
parents:
diff changeset
   856
  y := start;
Chengsong
parents:
diff changeset
   857
  x := x - 1
Chengsong
parents:
diff changeset
   858
  }
Chengsong
parents:
diff changeset
   859
  """
Chengsong
parents:
diff changeset
   860
  /*
Chengsong
parents:
diff changeset
   861
  for(i <- 400 to 400 by 1){
Chengsong
parents:
diff changeset
   862
    println(i+":")
Chengsong
parents:
diff changeset
   863
    blexing_simp(WHILE_REGS, prog2 * i)
Chengsong
parents:
diff changeset
   864
  } */
Chengsong
parents:
diff changeset
   865
Chengsong
parents:
diff changeset
   866
    /*
Chengsong
parents:
diff changeset
   867
    for (i <- 2 to 5){
Chengsong
parents:
diff changeset
   868
      for(j <- 1 to 3){
Chengsong
parents:
diff changeset
   869
        println(i,j)
Chengsong
parents:
diff changeset
   870
        small_de = i
Chengsong
parents:
diff changeset
   871
        usual_de = i + j
Chengsong
parents:
diff changeset
   872
        big_de = i + 2*j 
Chengsong
parents:
diff changeset
   873
        blexing_simp(AWHILE_REGS, prog2 * 100)
Chengsong
parents:
diff changeset
   874
      }
Chengsong
parents:
diff changeset
   875
    }*/
Chengsong
parents:
diff changeset
   876
Chengsong
parents:
diff changeset
   877
  /*
Chengsong
parents:
diff changeset
   878
  println("Tokens of prog2")
Chengsong
parents:
diff changeset
   879
  println(tokenise(WHILE_REGS, prog2).mkString("\n"))
Chengsong
parents:
diff changeset
   880
Chengsong
parents:
diff changeset
   881
  val fib_tokens = tokenise(WHILE_REGS, prog2)
Chengsong
parents:
diff changeset
   882
  fib_tokens.map{case (s1, s2) => (escape(s1), escape(s2))}.mkString(",\n")
Chengsong
parents:
diff changeset
   883
Chengsong
parents:
diff changeset
   884
Chengsong
parents:
diff changeset
   885
  val test_tokens = tokenise(WHILE_REGS, prog3)
Chengsong
parents:
diff changeset
   886
  test_tokens.map{case (s1, s2) => (escape(s1), escape(s2))}.mkString(",\n")
Chengsong
parents:
diff changeset
   887
  */
Chengsong
parents:
diff changeset
   888
Chengsong
parents:
diff changeset
   889
  /*
Chengsong
parents:
diff changeset
   890
  println("time test for blexing_simp")
Chengsong
parents:
diff changeset
   891
  for (i <- 1 to 1 by 1) {
Chengsong
parents:
diff changeset
   892
    lexing_simp(WHILE_REGS, prog2 * i)
Chengsong
parents:
diff changeset
   893
    blexing_simp(WHILE_REGS, prog2 * i)
Chengsong
parents:
diff changeset
   894
    for( j <- 0 to each_simp_timeb.length - 1){
Chengsong
parents:
diff changeset
   895
      if( each_simp_timeb(j)/each_simp_time(j) >= 10.0 )
Chengsong
parents:
diff changeset
   896
        println(j, each_simp_timeb(j), each_simp_time(j))
Chengsong
parents:
diff changeset
   897
    }
Chengsong
parents:
diff changeset
   898
  }
Chengsong
parents:
diff changeset
   899
  */
Chengsong
parents:
diff changeset
   900
Chengsong
parents:
diff changeset
   901
Chengsong
parents:
diff changeset
   902
  //--------------------------------------------------------------------------------------------------------END OF NON-BITCODE PART (TESTING)
Chengsong
parents:
diff changeset
   903
Chengsong
parents:
diff changeset
   904
Chengsong
parents:
diff changeset
   905
Chengsong
parents:
diff changeset
   906
  def clear() = {
Chengsong
parents:
diff changeset
   907
    print("")
Chengsong
parents:
diff changeset
   908
    //print("\33[H\33[2J")
Chengsong
parents:
diff changeset
   909
  }
Chengsong
parents:
diff changeset
   910
Chengsong
parents:
diff changeset
   911
  //testing the two lexings produce the same value
Chengsong
parents:
diff changeset
   912
  //enumerates strings of length n over alphabet cs
Chengsong
parents:
diff changeset
   913
  def strs(n: Int, cs: String) : Set[String] = {
Chengsong
parents:
diff changeset
   914
    if (n == 0) Set("")
Chengsong
parents:
diff changeset
   915
    else {
Chengsong
parents:
diff changeset
   916
      val ss = strs(n - 1, cs)
Chengsong
parents:
diff changeset
   917
      ss ++
Chengsong
parents:
diff changeset
   918
      (for (s <- ss; c <- cs.toList) yield c + s)
Chengsong
parents:
diff changeset
   919
    }
Chengsong
parents:
diff changeset
   920
  }
Chengsong
parents:
diff changeset
   921
  def enum(n: Int, s: String) : Stream[Rexp] = n match {
Chengsong
parents:
diff changeset
   922
    case 0 => ZERO #:: ONE #:: s.toStream.map(CHAR)
Chengsong
parents:
diff changeset
   923
    case n => {  
Chengsong
parents:
diff changeset
   924
      val rs = enum(n - 1, s)
Chengsong
parents:
diff changeset
   925
      rs #:::
Chengsong
parents:
diff changeset
   926
      (for (r1 <- rs; r2 <- rs) yield ALT(r1, r2)) #:::
Chengsong
parents:
diff changeset
   927
      (for (r1 <- rs; r2 <- rs) yield SEQ(r1, r2)) #:::
Chengsong
parents:
diff changeset
   928
      (for (r1 <- rs) yield STAR(r1))
Chengsong
parents:
diff changeset
   929
    }
Chengsong
parents:
diff changeset
   930
  }
Chengsong
parents:
diff changeset
   931
Chengsong
parents:
diff changeset
   932
  //tests blexing and lexing
Chengsong
parents:
diff changeset
   933
  def tests_blexer_simp(ss: Set[String])(r: Rexp) = {
Chengsong
parents:
diff changeset
   934
    clear()
Chengsong
parents:
diff changeset
   935
    //println(s"Testing ${r}")
Chengsong
parents:
diff changeset
   936
    for (s <- ss.par) yield {
Chengsong
parents:
diff changeset
   937
      val res1 = Try(Some(lexing_simp(r, s))).getOrElse(None)
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   938
      val res2 = Try(Some(super_blexing_simp(r, s))).getOrElse(None)
0
Chengsong
parents:
diff changeset
   939
      if (res1 != res2) println(s"Disagree on ${r} and ${s}")
Chengsong
parents:
diff changeset
   940
      if (res1 != res2) println(s"   ${res1} !=  ${res2}")
Chengsong
parents:
diff changeset
   941
      if (res1 != res2) Some((r, s)) else None
Chengsong
parents:
diff changeset
   942
    }
Chengsong
parents:
diff changeset
   943
  }
Chengsong
parents:
diff changeset
   944
Chengsong
parents:
diff changeset
   945
Chengsong
parents:
diff changeset
   946
5
622ddbb1223a correctness test with enumeration
Chengsong
parents: 3
diff changeset
   947
  
0
Chengsong
parents:
diff changeset
   948
  /*
Chengsong
parents:
diff changeset
   949
  def single_expression_explorer(ar: ARexp, ss: Set[String]): Unit = {
Chengsong
parents:
diff changeset
   950
    for (s <- ss){
Chengsong
parents:
diff changeset
   951
      
Chengsong
parents:
diff changeset
   952
      val der_res = bder(c, ar) 
Chengsong
parents:
diff changeset
   953
      val simp_res = bsimp(der_res)
Chengsong
parents:
diff changeset
   954
      println(asize(der_res))
Chengsong
parents:
diff changeset
   955
      println(asize(simp_res))
Chengsong
parents:
diff changeset
   956
      single_expression_explorer(simp_res, (sc - c))
Chengsong
parents:
diff changeset
   957
    }
Chengsong
parents:
diff changeset
   958
  }*/
Chengsong
parents:
diff changeset
   959
Chengsong
parents:
diff changeset
   960
  //single_expression_explorer(internalise(("c"~("a"+"b"))%) , Set('a','b','c'))
Chengsong
parents:
diff changeset
   961
Chengsong
parents:
diff changeset
   962
Chengsong
parents:
diff changeset
   963
}
Chengsong
parents:
diff changeset
   964
Chengsong
parents:
diff changeset
   965
import Rexp.Bits
Chengsong
parents:
diff changeset
   966
abstract class ARexp 
Chengsong
parents:
diff changeset
   967
case object AZERO extends ARexp
Chengsong
parents:
diff changeset
   968
case class AONE(bs: Bits) extends ARexp
Chengsong
parents:
diff changeset
   969
case class ACHAR(bs: Bits, f: Char) extends ARexp
Chengsong
parents:
diff changeset
   970
case class AALTS(bs: Bits, rs: List[ARexp]) extends ARexp 
Chengsong
parents:
diff changeset
   971
case class ASEQ(bs: Bits, r1: ARexp, r2: ARexp) extends ARexp 
Chengsong
parents:
diff changeset
   972
case class ASTAR(bs: Bits, r: ARexp) extends ARexp 
Chengsong
parents:
diff changeset
   973
Chengsong
parents:
diff changeset
   974
Chengsong
parents:
diff changeset
   975
Chengsong
parents:
diff changeset
   976
abstract class Val
Chengsong
parents:
diff changeset
   977
case object Empty extends Val
Chengsong
parents:
diff changeset
   978
case class Chr(c: Char) extends Val
Chengsong
parents:
diff changeset
   979
case class Sequ(v1: Val, v2: Val) extends Val
Chengsong
parents:
diff changeset
   980
case class Left(v: Val) extends Val
Chengsong
parents:
diff changeset
   981
case class Right(v: Val) extends Val
Chengsong
parents:
diff changeset
   982
case class Stars(vs: List[Val]) extends Val
Chengsong
parents:
diff changeset
   983
case class Rec(x: String, v: Val) extends Val
17
Chengsong
parents: 16
diff changeset
   984
case object undefined extends Val
0
Chengsong
parents:
diff changeset
   985
//case class Pos(i: Int, v: Val) extends Val
Chengsong
parents:
diff changeset
   986
case object Prd extends Val