progs/lexer/lex.sc
changeset 948 6bb67c2dcfd3
parent 936 0b5f06539a84
child 959 64ec1884d860
equal deleted inserted replaced
947:dc31a099dc98 948:6bb67c2dcfd3
    44   def | (s: Rexp) = ALT(r, s)
    44   def | (s: Rexp) = ALT(r, s)
    45   def % = STAR(r)
    45   def % = STAR(r)
    46   def ~ (s: Rexp) = SEQ(r, s)
    46   def ~ (s: Rexp) = SEQ(r, s)
    47 }
    47 }
    48 
    48 
       
    49 // to use & for records, instead of $ which had
       
    50 // its precedence be changed in Scala 3
    49 extension (s: String) {
    51 extension (s: String) {
    50   def | (r: Rexp) = ALT(s, r)
    52   def & (r: Rexp) = RECD(s, r)
    51   def | (r: String) = ALT(s, r)
       
    52   def % = STAR(s)
       
    53   def ~ (r: Rexp) = SEQ(s, r)
       
    54   def ~ (r: String) = SEQ(s, r)
       
    55   def $ (r: Rexp) = RECD(s, r)
       
    56 }
    53 }
    57 
    54 
    58 val TEST = ("ab" | "ba").%
    55 val TEST = ("ab" | "ba").%
    59 
    56 
    60 def nullable(r: Rexp) : Boolean = r match {
    57 def nullable(r: Rexp) : Boolean = r match {
   164 val RPAREN: Rexp = "}"
   161 val RPAREN: Rexp = "}"
   165 val LPAREN: Rexp = "{"
   162 val LPAREN: Rexp = "{"
   166 val STRING: Rexp = "\"" ~ SYM.% ~ "\""
   163 val STRING: Rexp = "\"" ~ SYM.% ~ "\""
   167 
   164 
   168 
   165 
   169 val WHILE_REGS = (("k" $ KEYWORD) | 
   166 val WHILE_REGS = (("k" & KEYWORD) | 
   170                   ("i" $ ID) | 
   167                   ("i" & ID) | 
   171                   ("o" $ OP) | 
   168                   ("o" & OP) | 
   172                   ("n" $ NUM) | 
   169                   ("n" & NUM) | 
   173                   ("s" $ SEMI) | 
   170                   ("s" & SEMI) | 
   174                   ("str" $ STRING) |
   171                   ("str" & STRING) |
   175                   ("p" $ (LPAREN | RPAREN)) | 
   172                   ("p" & (LPAREN | RPAREN)) | 
   176                   ("w" $ WHITESPACE)).%
   173                   ("w" & WHITESPACE)).%
   177 
   174 
   178 val KY : Rexp = "if" | "read" | "write"
   175 val KY : Rexp = "if" | "read" | "write"
   179 val WH : Rexp = " " | "\n"
   176 val WH : Rexp = " " | "\n"
   180 
   177 
   181 val TRIV_REGS = (("k" $ KY) | 
   178 val TRIV_REGS = (("k" & KY) | 
   182                   ("w" $ WHITESPACE)).%
   179                   ("w" & WHITESPACE)).%
   183 
   180 
   184 // Two Simple While Tests
   181 // Two Simple While Tests
   185 //========================
   182 //========================
   186 
   183 
   187 @arg(doc = "small tests")
   184 @arg(doc = "small tests")
   199   val prog2 = """read  n; write n"""  
   196   val prog2 = """read  n; write n"""  
   200   println(s"test: $prog2")
   197   println(s"test: $prog2")
   201   println(lexing(WHILE_REGS, prog2))
   198   println(lexing(WHILE_REGS, prog2))
   202 }
   199 }
   203 
   200 
   204 
       
   205 
       
   206 
       
   207 
       
   208 // runs with amm2 and amm3